projects / mirror_ubuntu-hirsute-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| ee977c2c MZ |
2 | /* |
| 3 | * arch/arch/mach-ixp4xx/vulcan-pci.c | |
| 4 | * | |
| 5 | * Vulcan board-level PCI initialization | |
| 6 | * | |
| 7 | * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org> | |
| 8 | * | |
| 9 | * based on ixdp425-pci.c: | |
| 10 | * Copyright (C) 2002 Intel Corporation. | |
| 11 | * Copyright (C) 2003-2004 MontaVista Software, Inc. | |
| ee977c2c MZ |
12 | */ |
| 13 | ||
| 14 | #include <linux/pci.h> | |
| 15 | #include <linux/init.h> | |
| 16 | #include <linux/irq.h> | |
| 17 | #include <asm/mach/pci.h> | |
| 18 | #include <asm/mach-types.h> | |
| 19 | ||
| 20 | /* PCI controller GPIO to IRQ pin mappings */ | |
| 21 | #define INTA 2 | |
| 22 | #define INTB 3 | |
| 23 | ||
| 24 | void __init vulcan_pci_preinit(void) | |
| 25 | { | |
| 26 | #ifndef CONFIG_IXP4XX_INDIRECT_PCI | |
| 27 | /* | |
| 28 | * Cardbus bridge wants way more than the SoC can actually offer, | |
| 29 | * and leaves the whole PCI bus in a mess. Artificially limit it | |
| 30 | * to 8MB per region. Of course indirect mode doesn't have this | |
| 31 | * limitation... | |
| 32 | */ | |
| 33 | pci_cardbus_mem_size = SZ_8M; | |
| 34 | pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n", | |
| 35 | (int)(pci_cardbus_mem_size >> 20)); | |
| 36 | #endif | |
| 6845664a TG |
37 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); |
| 38 | irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); | |
| ee977c2c MZ |
39 | ixp4xx_pci_preinit(); |
| 40 | } | |
| 41 | ||
| d5341942 | 42 | static int __init vulcan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
| ee977c2c MZ |
43 | { |
| 44 | if (slot == 1) | |
| 45 | return IXP4XX_GPIO_IRQ(INTA); | |
| 46 | ||
| 47 | if (slot == 2) | |
| 48 | return IXP4XX_GPIO_IRQ(INTB); | |
| 49 | ||
| 50 | return -1; | |
| 51 | } | |
| 52 | ||
| 53 | struct hw_pci vulcan_pci __initdata = { | |
| 54 | .nr_controllers = 1, | |
| c23bfc38 | 55 | .ops = &ixp4xx_ops, |
| ee977c2c | 56 | .preinit = vulcan_pci_preinit, |
| ee977c2c | 57 | .setup = ixp4xx_setup, |
| ee977c2c MZ |
58 | .map_irq = vulcan_map_irq, |
| 59 | }; | |
| 60 | ||
| 61 | int __init vulcan_pci_init(void) | |
| 62 | { | |
| 63 | if (machine_is_arcom_vulcan()) | |
| 64 | pci_common_init(&vulcan_pci); | |
| 65 | return 0; | |
| 66 | } | |
| 67 | ||
| 68 | subsys_initcall(vulcan_pci_init); |