[mirror_ubuntu-kernels.git] / arch / arm / mach-ixp4xx / vulcan-setup.c

// SPDX-License-Identifier: GPL-2.0
/*
 * arch/arm/mach-ixp4xx/vulcan-setup.c
 *
 * Arcom/Eurotech Vulcan board-setup
 *
 * Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
 *
 * based on fsg-setup.c:
 *	Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 */

#include <linux/if_ether.h>
#include <linux/irq.h>
#include <linux/serial.h>
#include <linux/serial_8250.h>
#include <linux/io.h>
#include <linux/w1-gpio.h>
#include <linux/mtd/plat-ram.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>

static struct flash_platform_data vulcan_flash_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
};

static struct resource vulcan_flash_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_flash = {
	.name			= "IXP4XX-Flash",
	.id			= 0,
	.dev = {
		.platform_data	= &vulcan_flash_data,
	},
	.resource		= &vulcan_flash_resource,
	.num_resources		= 1,
};

static struct platdata_mtd_ram vulcan_sram_data = {
	.mapname	= "Vulcan SRAM",
	.bankwidth	= 1,
};

static struct resource vulcan_sram_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_sram = {
	.name			= "mtd-ram",
	.id			= 0,
	.dev = {
		.platform_data	= &vulcan_sram_data,
	},
	.resource		= &vulcan_sram_resource,
	.num_resources		= 1,
};

static struct resource vulcan_uart_resources[] = {
	[0] = {
		.start		= IXP4XX_UART1_BASE_PHYS,
		.end		= IXP4XX_UART1_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.start		= IXP4XX_UART2_BASE_PHYS,
		.end		= IXP4XX_UART2_BASE_PHYS + 0x0fff,
		.flags		= IORESOURCE_MEM,
	},
	[2] = {
		.flags		= IORESOURCE_MEM,
	},
};

static struct plat_serial8250_port vulcan_uart_data[] = {
	[0] = {
		.mapbase	= IXP4XX_UART1_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART1,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	[1] = {
		.mapbase	= IXP4XX_UART2_BASE_PHYS,
		.membase	= (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
		.irq		= IRQ_IXP4XX_UART2,
		.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.regshift	= 2,
		.uartclk	= IXP4XX_UART_XTAL,
	},
	[2] = {
		.irq		= IXP4XX_GPIO_IRQ(4),
		.irqflags	= IRQF_TRIGGER_LOW,
		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.uartclk	= 1843200,
	},
	[3] = {
		.irq		= IXP4XX_GPIO_IRQ(4),
		.irqflags	= IRQF_TRIGGER_LOW,
		.flags		= UPF_IOREMAP | UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
		.iotype		= UPIO_MEM,
		.uartclk	= 1843200,
	},
	{ }
};

static struct platform_device vulcan_uart = {
	.name			= "serial8250",
	.id			= PLAT8250_DEV_PLATFORM,
	.dev = {
		.platform_data	= vulcan_uart_data,
	},
	.resource		= vulcan_uart_resources,
	.num_resources		= ARRAY_SIZE(vulcan_uart_resources),
};

static struct eth_plat_info vulcan_plat_eth[] = {
	[0] = {
		.phy		= 0,
		.rxq		= 3,
		.txreadyq	= 20,
	},
	[1] = {
		.phy		= 1,
		.rxq		= 4,
		.txreadyq	= 21,
	},
};

static struct platform_device vulcan_eth[] = {
	[0] = {
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEB,
		.dev = {
			.platform_data	= &vulcan_plat_eth[0],
		},
	},
	[1] = {
		.name			= "ixp4xx_eth",
		.id			= IXP4XX_ETH_NPEC,
		.dev = {
			.platform_data	= &vulcan_plat_eth[1],
		},
	},
};

static struct resource vulcan_max6369_resource = {
	.flags			= IORESOURCE_MEM,
};

static struct platform_device vulcan_max6369 = {
	.name			= "max6369_wdt",
	.id			= -1,
	.resource		= &vulcan_max6369_resource,
	.num_resources		= 1,
};

static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
	.pin			= 14,
	.ext_pullup_enable_pin	= -EINVAL,
};

static struct platform_device vulcan_w1_gpio = {
	.name			= "w1-gpio",
	.id			= 0,
	.dev			= {
		.platform_data	= &vulcan_w1_gpio_pdata,
	},
};

static struct platform_device *vulcan_devices[] __initdata = {
	&vulcan_uart,
	&vulcan_flash,
	&vulcan_sram,
	&vulcan_max6369,
	&vulcan_eth[0],
	&vulcan_eth[1],
	&vulcan_w1_gpio,
};

static void __init vulcan_init(void)
{
	ixp4xx_sys_init();

	/* Flash is spread over both CS0 and CS1 */
	vulcan_flash_resource.start	 = IXP4XX_EXP_BUS_BASE(0);
	vulcan_flash_resource.end	 = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(3)	|
			  IXP4XX_EXP_BUS_SIZE(0xF)	|
			  IXP4XX_EXP_BUS_BYTE_RD16	|
			  IXP4XX_EXP_BUS_WR_EN;
	*IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;

	/* SRAM on CS2, (256kB, 8bit, writable) */
	vulcan_sram_resource.start	= IXP4XX_EXP_BUS_BASE(2);
	vulcan_sram_resource.end	= IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(1)	|
			  IXP4XX_EXP_BUS_HOLD_T(2)	|
			  IXP4XX_EXP_BUS_SIZE(9)	|
			  IXP4XX_EXP_BUS_SPLT_EN	|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
	vulcan_uart_resources[2].start	= IXP4XX_EXP_BUS_BASE(3);
	vulcan_uart_resources[2].end	= IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
	vulcan_uart_data[2].mapbase	= vulcan_uart_resources[2].start;
	vulcan_uart_data[3].mapbase	= vulcan_uart_data[2].mapbase + 8;
	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_STROBE_T(3)	|
			  IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	/* max6369 on CS5 (512 bytes, 8bits, writable) */
	vulcan_max6369_resource.start	= IXP4XX_EXP_BUS_BASE(5);
	vulcan_max6369_resource.end	= IXP4XX_EXP_BUS_BASE(5);
	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN		|
			  IXP4XX_EXP_BUS_WR_EN		|
			  IXP4XX_EXP_BUS_BYTE_EN;

	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
}

MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
	.map_io		= ixp4xx_map_io,
	.init_early	= ixp4xx_init_early,
	.init_irq	= ixp4xx_init_irq,
	.init_time	= ixp4xx_timer_init,
	.atag_offset	= 0x100,
	.init_machine	= vulcan_init,
#if defined(CONFIG_PCI)
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= ixp4xx_restart,
MACHINE_END
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
4d9be47f MZ	2	/*
	3	* arch/arm/mach-ixp4xx/vulcan-setup.c
	4	*
	5	* Arcom/Eurotech Vulcan board-setup
	6	*
	7	* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
	8	*
	9	* based on fsg-setup.c:
	10	* Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
	11	*/
	12
	13	#include <linux/if_ether.h>
	14	#include <linux/irq.h>
	15	#include <linux/serial.h>
	16	#include <linux/serial_8250.h>
	17	#include <linux/io.h>
	18	#include <linux/w1-gpio.h>
	19	#include <linux/mtd/plat-ram.h>
	20	#include <asm/mach-types.h>
	21	#include <asm/mach/arch.h>
	22	#include <asm/mach/flash.h>
	23
	24	static struct flash_platform_data vulcan_flash_data = {
	25	.map_name = "cfi_probe",
	26	.width = 2,
	27	};
	28
	29	static struct resource vulcan_flash_resource = {
	30	.flags = IORESOURCE_MEM,
	31	};
	32
	33	static struct platform_device vulcan_flash = {
	34	.name = "IXP4XX-Flash",
	35	.id = 0,
	36	.dev = {
	37	.platform_data = &vulcan_flash_data,
	38	},
	39	.resource = &vulcan_flash_resource,
	40	.num_resources = 1,
	41	};
	42
	43	static struct platdata_mtd_ram vulcan_sram_data = {
	44	.mapname = "Vulcan SRAM",
	45	.bankwidth = 1,
	46	};
	47
	48	static struct resource vulcan_sram_resource = {
	49	.flags = IORESOURCE_MEM,
	50	};
	51
	52	static struct platform_device vulcan_sram = {
	53	.name = "mtd-ram",
	54	.id = 0,
	55	.dev = {
	56	.platform_data = &vulcan_sram_data,
	57	},
	58	.resource = &vulcan_sram_resource,
	59	.num_resources = 1,
	60	};
	61
	62	static struct resource vulcan_uart_resources[] = {
	63	[0] = {
	64	.start = IXP4XX_UART1_BASE_PHYS,
	65	.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
66	.flags = IORESOURCE_MEM,
67	},
68	[1] = {
69	.start = IXP4XX_UART2_BASE_PHYS,
70	.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
71	.flags = IORESOURCE_MEM,
72	},
73	[2] = {
74	.flags = IORESOURCE_MEM,
75	},
76	};
77
78	static struct plat_serial8250_port vulcan_uart_data[] = {
79	[0] = {
80	.mapbase = IXP4XX_UART1_BASE_PHYS,
81	.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
82	.irq = IRQ_IXP4XX_UART1,
83	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
84	.iotype = UPIO_MEM,
85	.regshift = 2,
86	.uartclk = IXP4XX_UART_XTAL,
87	},
88	[1] = {
89	.mapbase = IXP4XX_UART2_BASE_PHYS,
90	.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
91	.irq = IRQ_IXP4XX_UART2,
92	.flags = UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
93	.iotype = UPIO_MEM,
94	.regshift = 2,
95	.uartclk = IXP4XX_UART_XTAL,
96	},
97	[2] = {
98	.irq = IXP4XX_GPIO_IRQ(4),
99	.irqflags = IRQF_TRIGGER_LOW,
100	.flags = UPF_IOREMAP \| UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
101	.iotype = UPIO_MEM,
102	.uartclk = 1843200,
103	},
104	[3] = {
105	.irq = IXP4XX_GPIO_IRQ(4),
106	.irqflags = IRQF_TRIGGER_LOW,
107	.flags = UPF_IOREMAP \| UPF_BOOT_AUTOCONF \| UPF_SKIP_TEST,
108	.iotype = UPIO_MEM,
109	.uartclk = 1843200,
110	},
111	{ }
112	};
113
114	static struct platform_device vulcan_uart = {
115	.name = "serial8250",
116	.id = PLAT8250_DEV_PLATFORM,
117	.dev = {
118	.platform_data = vulcan_uart_data,
119	},
120	.resource = vulcan_uart_resources,
121	.num_resources = ARRAY_SIZE(vulcan_uart_resources),
122	};
123
124	static struct eth_plat_info vulcan_plat_eth[] = {
125	[0] = {
126	.phy = 0,
127	.rxq = 3,
128	.txreadyq = 20,
129	},
130	[1] = {
131	.phy = 1,
132	.rxq = 4,
133	.txreadyq = 21,
134	},
135	};
136
137	static struct platform_device vulcan_eth[] = {
138	[0] = {
139	.name = "ixp4xx_eth",
140	.id = IXP4XX_ETH_NPEB,
141	.dev = {
142	.platform_data = &vulcan_plat_eth[0],
143	},
144	},
145	[1] = {
146	.name = "ixp4xx_eth",
147	.id = IXP4XX_ETH_NPEC,
148	.dev = {
149	.platform_data = &vulcan_plat_eth[1],
150	},
151	},
152	};
153
154	static struct resource vulcan_max6369_resource = {
155	.flags = IORESOURCE_MEM,
156	};
157
158	static struct platform_device vulcan_max6369 = {
159	.name = "max6369_wdt",
160	.id = -1,
161	.resource = &vulcan_max6369_resource,
162	.num_resources = 1,
163	};
164
165	static struct w1_gpio_platform_data vulcan_w1_gpio_pdata = {
166	.pin = 14,
2d798a3f	167	.ext_pullup_enable_pin = -EINVAL,
4d9be47f MZ	168	};
	169
	170	static struct platform_device vulcan_w1_gpio = {
	171	.name = "w1-gpio",
	172	.id = 0,
	173	.dev = {
	174	.platform_data = &vulcan_w1_gpio_pdata,
	175	},
	176	};
	177
	178	static struct platform_device *vulcan_devices[] __initdata = {
	179	&vulcan_uart,
	180	&vulcan_flash,
	181	&vulcan_sram,
	182	&vulcan_max6369,
	183	&vulcan_eth[0],
	184	&vulcan_eth[1],
	185	&vulcan_w1_gpio,
	186	};
	187
	188	static void __init vulcan_init(void)
	189	{
	190	ixp4xx_sys_init();
	191
	192	/* Flash is spread over both CS0 and CS1 */
	193	vulcan_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
	194	vulcan_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
	195	*IXP4XX_EXP_CS0 = IXP4XX_EXP_BUS_CS_EN \|
	196	IXP4XX_EXP_BUS_STROBE_T(3) \|
	197	IXP4XX_EXP_BUS_SIZE(0xF) \|
	198	IXP4XX_EXP_BUS_BYTE_RD16 \|
	199	IXP4XX_EXP_BUS_WR_EN;
	200	IXP4XX_EXP_CS1 = IXP4XX_EXP_CS0;
	201
	202	/* SRAM on CS2, (256kB, 8bit, writable) */
	203	vulcan_sram_resource.start = IXP4XX_EXP_BUS_BASE(2);
	204	vulcan_sram_resource.end = IXP4XX_EXP_BUS_BASE(2) + SZ_256K - 1;
	205	*IXP4XX_EXP_CS2 = IXP4XX_EXP_BUS_CS_EN \|
	206	IXP4XX_EXP_BUS_STROBE_T(1) \|
	207	IXP4XX_EXP_BUS_HOLD_T(2) \|
	208	IXP4XX_EXP_BUS_SIZE(9) \|
	209	IXP4XX_EXP_BUS_SPLT_EN \|
	210	IXP4XX_EXP_BUS_WR_EN \|
	211	IXP4XX_EXP_BUS_BYTE_EN;
	212
	213	/* XR16L2551 on CS3 (Moto style, 512 bytes, 8bits, writable) */
	214	vulcan_uart_resources[2].start = IXP4XX_EXP_BUS_BASE(3);
	215	vulcan_uart_resources[2].end = IXP4XX_EXP_BUS_BASE(3) + 16 - 1;
	216	vulcan_uart_data[2].mapbase = vulcan_uart_resources[2].start;
	217	vulcan_uart_data[3].mapbase = vulcan_uart_data[2].mapbase + 8;
	218	*IXP4XX_EXP_CS3 = IXP4XX_EXP_BUS_CS_EN \|
	219	IXP4XX_EXP_BUS_STROBE_T(3) \|
	220	IXP4XX_EXP_BUS_CYCLES(IXP4XX_EXP_BUS_CYCLES_MOTOROLA)\|
	221	IXP4XX_EXP_BUS_WR_EN \|
	222	IXP4XX_EXP_BUS_BYTE_EN;
	223
	224	/* GPIOS on CS4 (512 bytes, 8bits, writable) */
	225	*IXP4XX_EXP_CS4 = IXP4XX_EXP_BUS_CS_EN \|
	226	IXP4XX_EXP_BUS_WR_EN \|
	227	IXP4XX_EXP_BUS_BYTE_EN;
	228
	229	/* max6369 on CS5 (512 bytes, 8bits, writable) */
	230	vulcan_max6369_resource.start = IXP4XX_EXP_BUS_BASE(5);
	231	vulcan_max6369_resource.end = IXP4XX_EXP_BUS_BASE(5);
232	*IXP4XX_EXP_CS5 = IXP4XX_EXP_BUS_CS_EN \|
233	IXP4XX_EXP_BUS_WR_EN \|
234	IXP4XX_EXP_BUS_BYTE_EN;
235
236	platform_add_devices(vulcan_devices, ARRAY_SIZE(vulcan_devices));
237	}
238
239	MACHINE_START(ARCOM_VULCAN, "Arcom/Eurotech Vulcan")
240	/* Maintainer: Marc Zyngier <maz@misterjones.org> */
4d9be47f	241	.map_io = ixp4xx_map_io,
f449588c	242	.init_early = ixp4xx_init_early,
4d9be47f	243	.init_irq = ixp4xx_init_irq,
6bb27d73	244	.init_time = ixp4xx_timer_init,
e022c729	245	.atag_offset = 0x100,
4d9be47f	246	.init_machine = vulcan_init,
7553ee77 NP	247	#if defined(CONFIG_PCI)
	248	.dma_zone_size = SZ_64M,
	249	#endif
d1b860fb	250	.restart = ixp4xx_restart,
4d9be47f	251	MACHINE_END