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651c74c7
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1/*
2 * arch/arm/mach-kirkwood/common.c
3 *
4 * Core functions for Marvell Kirkwood SoCs
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/serial_8250.h>
15#include <linux/mbus.h>
16#include <linux/mv643xx_eth.h>
6574e001 17#include <linux/mv643xx_i2c.h>
651c74c7 18#include <linux/ata_platform.h>
18365d18 19#include <linux/spi/orion_spi.h>
dcf1cece 20#include <net/dsa.h>
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21#include <asm/page.h>
22#include <asm/timex.h>
23#include <asm/mach/map.h>
24#include <asm/mach/time.h>
a09e64fb 25#include <mach/kirkwood.h>
fdd8b079 26#include <mach/bridge-regs.h>
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27#include <plat/cache-feroceon-l2.h>
28#include <plat/ehci-orion.h>
8235ee00 29#include <plat/mvsdio.h>
09c0ed2e 30#include <plat/mv_xor.h>
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31#include <plat/orion_nand.h>
32#include <plat/time.h>
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33#include "common.h"
34
35/*****************************************************************************
36 * I/O Address Mapping
37 ****************************************************************************/
38static struct map_desc kirkwood_io_desc[] __initdata = {
39 {
40 .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
41 .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
42 .length = KIRKWOOD_PCIE_IO_SIZE,
43 .type = MT_DEVICE,
44 }, {
45 .virtual = KIRKWOOD_REGS_VIRT_BASE,
46 .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
47 .length = KIRKWOOD_REGS_SIZE,
48 .type = MT_DEVICE,
49 },
50};
51
52void __init kirkwood_map_io(void)
53{
54 iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
55}
56
57
58/*****************************************************************************
59 * EHCI
60 ****************************************************************************/
61static struct orion_ehci_data kirkwood_ehci_data = {
62 .dram = &kirkwood_mbus_dram_info,
fb6f5529 63 .phy_version = EHCI_PHY_NA,
651c74c7
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64};
65
66static u64 ehci_dmamask = 0xffffffffUL;
67
68
69/*****************************************************************************
70 * EHCI0
71 ****************************************************************************/
72static struct resource kirkwood_ehci_resources[] = {
73 {
74 .start = USB_PHYS_BASE,
75 .end = USB_PHYS_BASE + 0x0fff,
76 .flags = IORESOURCE_MEM,
77 }, {
78 .start = IRQ_KIRKWOOD_USB,
79 .end = IRQ_KIRKWOOD_USB,
80 .flags = IORESOURCE_IRQ,
81 },
82};
83
84static struct platform_device kirkwood_ehci = {
85 .name = "orion-ehci",
86 .id = 0,
87 .dev = {
88 .dma_mask = &ehci_dmamask,
89 .coherent_dma_mask = 0xffffffff,
90 .platform_data = &kirkwood_ehci_data,
91 },
92 .resource = kirkwood_ehci_resources,
93 .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
94};
95
96void __init kirkwood_ehci_init(void)
97{
98 platform_device_register(&kirkwood_ehci);
99}
100
101
102/*****************************************************************************
103 * GE00
104 ****************************************************************************/
105struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
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106 .dram = &kirkwood_mbus_dram_info,
107};
108
109static struct resource kirkwood_ge00_shared_resources[] = {
110 {
111 .name = "ge00 base",
112 .start = GE00_PHYS_BASE + 0x2000,
113 .end = GE00_PHYS_BASE + 0x3fff,
114 .flags = IORESOURCE_MEM,
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115 }, {
116 .name = "ge00 err irq",
117 .start = IRQ_KIRKWOOD_GE00_ERR,
118 .end = IRQ_KIRKWOOD_GE00_ERR,
119 .flags = IORESOURCE_IRQ,
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120 },
121};
122
123static struct platform_device kirkwood_ge00_shared = {
124 .name = MV643XX_ETH_SHARED_NAME,
125 .id = 0,
126 .dev = {
127 .platform_data = &kirkwood_ge00_shared_data,
128 },
144f814a 129 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
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130 .resource = kirkwood_ge00_shared_resources,
131};
132
133static struct resource kirkwood_ge00_resources[] = {
134 {
135 .name = "ge00 irq",
136 .start = IRQ_KIRKWOOD_GE00_SUM,
137 .end = IRQ_KIRKWOOD_GE00_SUM,
138 .flags = IORESOURCE_IRQ,
139 },
140};
141
142static struct platform_device kirkwood_ge00 = {
143 .name = MV643XX_ETH_NAME,
144 .id = 0,
145 .num_resources = 1,
146 .resource = kirkwood_ge00_resources,
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147 .dev = {
148 .coherent_dma_mask = 0xffffffff,
149 },
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150};
151
152void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
153{
154 eth_data->shared = &kirkwood_ge00_shared;
155 kirkwood_ge00.dev.platform_data = eth_data;
156
157 platform_device_register(&kirkwood_ge00_shared);
158 platform_device_register(&kirkwood_ge00);
159}
160
161
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162/*****************************************************************************
163 * GE01
164 ****************************************************************************/
165struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
166 .dram = &kirkwood_mbus_dram_info,
167 .shared_smi = &kirkwood_ge00_shared,
168};
169
170static struct resource kirkwood_ge01_shared_resources[] = {
171 {
172 .name = "ge01 base",
173 .start = GE01_PHYS_BASE + 0x2000,
174 .end = GE01_PHYS_BASE + 0x3fff,
175 .flags = IORESOURCE_MEM,
176 }, {
177 .name = "ge01 err irq",
178 .start = IRQ_KIRKWOOD_GE01_ERR,
179 .end = IRQ_KIRKWOOD_GE01_ERR,
180 .flags = IORESOURCE_IRQ,
181 },
182};
183
184static struct platform_device kirkwood_ge01_shared = {
185 .name = MV643XX_ETH_SHARED_NAME,
186 .id = 1,
187 .dev = {
188 .platform_data = &kirkwood_ge01_shared_data,
189 },
190 .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
191 .resource = kirkwood_ge01_shared_resources,
192};
193
194static struct resource kirkwood_ge01_resources[] = {
195 {
196 .name = "ge01 irq",
197 .start = IRQ_KIRKWOOD_GE01_SUM,
198 .end = IRQ_KIRKWOOD_GE01_SUM,
199 .flags = IORESOURCE_IRQ,
200 },
201};
202
203static struct platform_device kirkwood_ge01 = {
204 .name = MV643XX_ETH_NAME,
205 .id = 1,
206 .num_resources = 1,
207 .resource = kirkwood_ge01_resources,
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208 .dev = {
209 .coherent_dma_mask = 0xffffffff,
210 },
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211};
212
213void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
214{
215 eth_data->shared = &kirkwood_ge01_shared;
216 kirkwood_ge01.dev.platform_data = eth_data;
217
218 platform_device_register(&kirkwood_ge01_shared);
219 platform_device_register(&kirkwood_ge01);
220}
221
222
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223/*****************************************************************************
224 * Ethernet switch
225 ****************************************************************************/
226static struct resource kirkwood_switch_resources[] = {
227 {
228 .start = 0,
229 .end = 0,
230 .flags = IORESOURCE_IRQ,
231 },
232};
233
234static struct platform_device kirkwood_switch_device = {
235 .name = "dsa",
236 .id = 0,
237 .num_resources = 0,
238 .resource = kirkwood_switch_resources,
239};
240
241void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
242{
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243 int i;
244
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245 if (irq != NO_IRQ) {
246 kirkwood_switch_resources[0].start = irq;
247 kirkwood_switch_resources[0].end = irq;
248 kirkwood_switch_device.num_resources = 1;
249 }
250
dcf1cece 251 d->netdev = &kirkwood_ge00.dev;
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252 for (i = 0; i < d->nr_chips; i++)
253 d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
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254 kirkwood_switch_device.dev.platform_data = d;
255
256 platform_device_register(&kirkwood_switch_device);
257}
258
259
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260/*****************************************************************************
261 * SoC RTC
262 ****************************************************************************/
263static struct resource kirkwood_rtc_resource = {
264 .start = RTC_PHYS_BASE,
265 .end = RTC_PHYS_BASE + SZ_16 - 1,
266 .flags = IORESOURCE_MEM,
267};
268
5b99d534 269static void __init kirkwood_rtc_init(void)
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270{
271 platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
272}
273
274
275/*****************************************************************************
276 * SATA
277 ****************************************************************************/
278static struct resource kirkwood_sata_resources[] = {
279 {
280 .name = "sata base",
281 .start = SATA_PHYS_BASE,
282 .end = SATA_PHYS_BASE + 0x5000 - 1,
283 .flags = IORESOURCE_MEM,
284 }, {
285 .name = "sata irq",
286 .start = IRQ_KIRKWOOD_SATA,
287 .end = IRQ_KIRKWOOD_SATA,
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292static struct platform_device kirkwood_sata = {
293 .name = "sata_mv",
294 .id = 0,
295 .dev = {
296 .coherent_dma_mask = 0xffffffff,
297 },
298 .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
299 .resource = kirkwood_sata_resources,
300};
301
302void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
303{
304 sata_data->dram = &kirkwood_mbus_dram_info;
305 kirkwood_sata.dev.platform_data = sata_data;
306 platform_device_register(&kirkwood_sata);
307}
308
309
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310/*****************************************************************************
311 * SD/SDIO/MMC
312 ****************************************************************************/
313static struct resource mvsdio_resources[] = {
314 [0] = {
315 .start = SDIO_PHYS_BASE,
316 .end = SDIO_PHYS_BASE + SZ_1K - 1,
317 .flags = IORESOURCE_MEM,
318 },
319 [1] = {
320 .start = IRQ_KIRKWOOD_SDIO,
321 .end = IRQ_KIRKWOOD_SDIO,
322 .flags = IORESOURCE_IRQ,
323 },
324};
325
326static u64 mvsdio_dmamask = 0xffffffffUL;
327
328static struct platform_device kirkwood_sdio = {
329 .name = "mvsdio",
330 .id = -1,
331 .dev = {
332 .dma_mask = &mvsdio_dmamask,
333 .coherent_dma_mask = 0xffffffff,
334 },
335 .num_resources = ARRAY_SIZE(mvsdio_resources),
336 .resource = mvsdio_resources,
337};
338
339void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
340{
341 u32 dev, rev;
342
343 kirkwood_pcie_id(&dev, &rev);
344 if (rev == 0) /* catch all Kirkwood Z0's */
345 mvsdio_data->clock = 100000000;
346 else
347 mvsdio_data->clock = 200000000;
348 mvsdio_data->dram = &kirkwood_mbus_dram_info;
349 kirkwood_sdio.dev.platform_data = mvsdio_data;
350 platform_device_register(&kirkwood_sdio);
351}
352
353
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354/*****************************************************************************
355 * SPI
356 ****************************************************************************/
357static struct orion_spi_info kirkwood_spi_plat_data = {
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LB
358};
359
360static struct resource kirkwood_spi_resources[] = {
361 {
362 .start = SPI_PHYS_BASE,
363 .end = SPI_PHYS_BASE + SZ_512 - 1,
364 .flags = IORESOURCE_MEM,
365 },
366};
367
368static struct platform_device kirkwood_spi = {
369 .name = "orion_spi",
370 .id = 0,
371 .resource = kirkwood_spi_resources,
372 .dev = {
373 .platform_data = &kirkwood_spi_plat_data,
374 },
375 .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
376};
377
378void __init kirkwood_spi_init()
379{
380 platform_device_register(&kirkwood_spi);
381}
382
383
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MM
384/*****************************************************************************
385 * I2C
386 ****************************************************************************/
387static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
388 .freq_m = 8, /* assumes 166 MHz TCLK */
389 .freq_n = 3,
390 .timeout = 1000, /* Default timeout of 1 second */
391};
392
393static struct resource kirkwood_i2c_resources[] = {
394 {
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395 .start = I2C_PHYS_BASE,
396 .end = I2C_PHYS_BASE + 0x1f,
397 .flags = IORESOURCE_MEM,
398 }, {
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399 .start = IRQ_KIRKWOOD_TWSI,
400 .end = IRQ_KIRKWOOD_TWSI,
401 .flags = IORESOURCE_IRQ,
402 },
403};
404
405static struct platform_device kirkwood_i2c = {
406 .name = MV64XXX_I2C_CTLR_NAME,
407 .id = 0,
408 .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
409 .resource = kirkwood_i2c_resources,
410 .dev = {
411 .platform_data = &kirkwood_i2c_pdata,
412 },
413};
414
415void __init kirkwood_i2c_init(void)
416{
417 platform_device_register(&kirkwood_i2c);
418}
419
420
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421/*****************************************************************************
422 * UART0
423 ****************************************************************************/
424static struct plat_serial8250_port kirkwood_uart0_data[] = {
425 {
426 .mapbase = UART0_PHYS_BASE,
427 .membase = (char *)UART0_VIRT_BASE,
428 .irq = IRQ_KIRKWOOD_UART_0,
429 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
430 .iotype = UPIO_MEM,
431 .regshift = 2,
79d4dd77 432 .uartclk = 0,
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433 }, {
434 },
435};
436
437static struct resource kirkwood_uart0_resources[] = {
438 {
439 .start = UART0_PHYS_BASE,
440 .end = UART0_PHYS_BASE + 0xff,
441 .flags = IORESOURCE_MEM,
442 }, {
443 .start = IRQ_KIRKWOOD_UART_0,
444 .end = IRQ_KIRKWOOD_UART_0,
445 .flags = IORESOURCE_IRQ,
446 },
447};
448
449static struct platform_device kirkwood_uart0 = {
450 .name = "serial8250",
451 .id = 0,
452 .dev = {
453 .platform_data = kirkwood_uart0_data,
454 },
455 .resource = kirkwood_uart0_resources,
456 .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
457};
458
459void __init kirkwood_uart0_init(void)
460{
461 platform_device_register(&kirkwood_uart0);
462}
463
464
465/*****************************************************************************
466 * UART1
467 ****************************************************************************/
468static struct plat_serial8250_port kirkwood_uart1_data[] = {
469 {
470 .mapbase = UART1_PHYS_BASE,
471 .membase = (char *)UART1_VIRT_BASE,
472 .irq = IRQ_KIRKWOOD_UART_1,
473 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
474 .iotype = UPIO_MEM,
475 .regshift = 2,
79d4dd77 476 .uartclk = 0,
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477 }, {
478 },
479};
480
481static struct resource kirkwood_uart1_resources[] = {
482 {
483 .start = UART1_PHYS_BASE,
484 .end = UART1_PHYS_BASE + 0xff,
485 .flags = IORESOURCE_MEM,
486 }, {
487 .start = IRQ_KIRKWOOD_UART_1,
488 .end = IRQ_KIRKWOOD_UART_1,
489 .flags = IORESOURCE_IRQ,
490 },
491};
492
493static struct platform_device kirkwood_uart1 = {
494 .name = "serial8250",
495 .id = 1,
496 .dev = {
497 .platform_data = kirkwood_uart1_data,
498 },
499 .resource = kirkwood_uart1_resources,
500 .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
501};
502
503void __init kirkwood_uart1_init(void)
504{
505 platform_device_register(&kirkwood_uart1);
506}
507
508
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SB
509/*****************************************************************************
510 * XOR
511 ****************************************************************************/
512static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
513 .dram = &kirkwood_mbus_dram_info,
514};
515
284901a9 516static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
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517
518
519/*****************************************************************************
520 * XOR0
521 ****************************************************************************/
522static struct resource kirkwood_xor0_shared_resources[] = {
523 {
524 .name = "xor 0 low",
525 .start = XOR0_PHYS_BASE,
526 .end = XOR0_PHYS_BASE + 0xff,
527 .flags = IORESOURCE_MEM,
528 }, {
529 .name = "xor 0 high",
530 .start = XOR0_HIGH_PHYS_BASE,
531 .end = XOR0_HIGH_PHYS_BASE + 0xff,
532 .flags = IORESOURCE_MEM,
533 },
534};
535
536static struct platform_device kirkwood_xor0_shared = {
537 .name = MV_XOR_SHARED_NAME,
538 .id = 0,
539 .dev = {
540 .platform_data = &kirkwood_xor_shared_data,
541 },
542 .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
543 .resource = kirkwood_xor0_shared_resources,
544};
545
546static struct resource kirkwood_xor00_resources[] = {
547 [0] = {
548 .start = IRQ_KIRKWOOD_XOR_00,
549 .end = IRQ_KIRKWOOD_XOR_00,
550 .flags = IORESOURCE_IRQ,
551 },
552};
553
554static struct mv_xor_platform_data kirkwood_xor00_data = {
555 .shared = &kirkwood_xor0_shared,
556 .hw_id = 0,
557 .pool_size = PAGE_SIZE,
558};
559
560static struct platform_device kirkwood_xor00_channel = {
561 .name = MV_XOR_NAME,
562 .id = 0,
563 .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
564 .resource = kirkwood_xor00_resources,
565 .dev = {
566 .dma_mask = &kirkwood_xor_dmamask,
6a35528a 567 .coherent_dma_mask = DMA_BIT_MASK(64),
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568 .platform_data = (void *)&kirkwood_xor00_data,
569 },
570};
571
572static struct resource kirkwood_xor01_resources[] = {
573 [0] = {
574 .start = IRQ_KIRKWOOD_XOR_01,
575 .end = IRQ_KIRKWOOD_XOR_01,
576 .flags = IORESOURCE_IRQ,
577 },
578};
579
580static struct mv_xor_platform_data kirkwood_xor01_data = {
581 .shared = &kirkwood_xor0_shared,
582 .hw_id = 1,
583 .pool_size = PAGE_SIZE,
584};
585
586static struct platform_device kirkwood_xor01_channel = {
587 .name = MV_XOR_NAME,
588 .id = 1,
589 .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
590 .resource = kirkwood_xor01_resources,
591 .dev = {
592 .dma_mask = &kirkwood_xor_dmamask,
6a35528a 593 .coherent_dma_mask = DMA_BIT_MASK(64),
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594 .platform_data = (void *)&kirkwood_xor01_data,
595 },
596};
597
5b99d534 598static void __init kirkwood_xor0_init(void)
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599{
600 platform_device_register(&kirkwood_xor0_shared);
601
602 /*
603 * two engines can't do memset simultaneously, this limitation
604 * satisfied by removing memset support from one of the engines.
605 */
606 dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
607 dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
608 platform_device_register(&kirkwood_xor00_channel);
609
610 dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
611 dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
612 dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
613 platform_device_register(&kirkwood_xor01_channel);
614}
615
616
617/*****************************************************************************
618 * XOR1
619 ****************************************************************************/
620static struct resource kirkwood_xor1_shared_resources[] = {
621 {
622 .name = "xor 1 low",
623 .start = XOR1_PHYS_BASE,
624 .end = XOR1_PHYS_BASE + 0xff,
625 .flags = IORESOURCE_MEM,
626 }, {
627 .name = "xor 1 high",
628 .start = XOR1_HIGH_PHYS_BASE,
629 .end = XOR1_HIGH_PHYS_BASE + 0xff,
630 .flags = IORESOURCE_MEM,
631 },
632};
633
634static struct platform_device kirkwood_xor1_shared = {
635 .name = MV_XOR_SHARED_NAME,
636 .id = 1,
637 .dev = {
638 .platform_data = &kirkwood_xor_shared_data,
639 },
640 .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
641 .resource = kirkwood_xor1_shared_resources,
642};
643
644static struct resource kirkwood_xor10_resources[] = {
645 [0] = {
646 .start = IRQ_KIRKWOOD_XOR_10,
647 .end = IRQ_KIRKWOOD_XOR_10,
648 .flags = IORESOURCE_IRQ,
649 },
650};
651
652static struct mv_xor_platform_data kirkwood_xor10_data = {
653 .shared = &kirkwood_xor1_shared,
654 .hw_id = 0,
655 .pool_size = PAGE_SIZE,
656};
657
658static struct platform_device kirkwood_xor10_channel = {
659 .name = MV_XOR_NAME,
660 .id = 2,
661 .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
662 .resource = kirkwood_xor10_resources,
663 .dev = {
664 .dma_mask = &kirkwood_xor_dmamask,
6a35528a 665 .coherent_dma_mask = DMA_BIT_MASK(64),
09c0ed2e
SB
666 .platform_data = (void *)&kirkwood_xor10_data,
667 },
668};
669
670static struct resource kirkwood_xor11_resources[] = {
671 [0] = {
672 .start = IRQ_KIRKWOOD_XOR_11,
673 .end = IRQ_KIRKWOOD_XOR_11,
674 .flags = IORESOURCE_IRQ,
675 },
676};
677
678static struct mv_xor_platform_data kirkwood_xor11_data = {
679 .shared = &kirkwood_xor1_shared,
680 .hw_id = 1,
681 .pool_size = PAGE_SIZE,
682};
683
684static struct platform_device kirkwood_xor11_channel = {
685 .name = MV_XOR_NAME,
686 .id = 3,
687 .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
688 .resource = kirkwood_xor11_resources,
689 .dev = {
690 .dma_mask = &kirkwood_xor_dmamask,
6a35528a 691 .coherent_dma_mask = DMA_BIT_MASK(64),
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692 .platform_data = (void *)&kirkwood_xor11_data,
693 },
694};
695
5b99d534 696static void __init kirkwood_xor1_init(void)
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697{
698 platform_device_register(&kirkwood_xor1_shared);
699
700 /*
701 * two engines can't do memset simultaneously, this limitation
702 * satisfied by removing memset support from one of the engines.
703 */
704 dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
705 dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
706 platform_device_register(&kirkwood_xor10_channel);
707
708 dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
709 dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
710 dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
711 platform_device_register(&kirkwood_xor11_channel);
712}
713
714
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715/*****************************************************************************
716 * Time handling
717 ****************************************************************************/
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718int kirkwood_tclk;
719
720int __init kirkwood_find_tclk(void)
721{
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722 u32 dev, rev;
723
724 kirkwood_pcie_id(&dev, &rev);
725 if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
726 return 200000000;
727
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728 return 166666667;
729}
730
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731static void kirkwood_timer_init(void)
732{
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733 kirkwood_tclk = kirkwood_find_tclk();
734 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
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735}
736
737struct sys_timer kirkwood_timer = {
738 .init = kirkwood_timer_init,
739};
740
741
742/*****************************************************************************
743 * General
744 ****************************************************************************/
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745/*
746 * Identify device ID and revision.
747 */
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748static char * __init kirkwood_id(void)
749{
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750 u32 dev, rev;
751
752 kirkwood_pcie_id(&dev, &rev);
753
754 if (dev == MV88F6281_DEV_ID) {
755 if (rev == MV88F6281_REV_Z0)
756 return "MV88F6281-Z0";
757 else if (rev == MV88F6281_REV_A0)
758 return "MV88F6281-A0";
759 else
760 return "MV88F6281-Rev-Unsupported";
761 } else if (dev == MV88F6192_DEV_ID) {
762 if (rev == MV88F6192_REV_Z0)
763 return "MV88F6192-Z0";
764 else if (rev == MV88F6192_REV_A0)
765 return "MV88F6192-A0";
766 else
767 return "MV88F6192-Rev-Unsupported";
768 } else if (dev == MV88F6180_DEV_ID) {
769 if (rev == MV88F6180_REV_A0)
770 return "MV88F6180-Rev-A0";
771 else
772 return "MV88F6180-Rev-Unsupported";
773 } else {
774 return "Device-Unknown";
651c74c7 775 }
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776}
777
4360bb41 778static void __init kirkwood_l2_init(void)
13387603 779{
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780#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
781 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
782 feroceon_l2_init(1);
783#else
784 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
785 feroceon_l2_init(0);
786#endif
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787}
788
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789void __init kirkwood_init(void)
790{
791 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
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792 kirkwood_id(), kirkwood_tclk);
793 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
13731d1a 794 kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
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795 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
796 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
797 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
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798
799 kirkwood_setup_cpu_mbus();
800
801#ifdef CONFIG_CACHE_FEROCEON_L2
4360bb41 802 kirkwood_l2_init();
651c74c7 803#endif
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804
805 /* internal devices that every board has */
806 kirkwood_rtc_init();
807 kirkwood_xor0_init();
808 kirkwood_xor1_init();
651c74c7 809}