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651c74c7 SB |
1 | /* |
2 | * arch/arm/mach-kirkwood/common.c | |
3 | * | |
4 | * Core functions for Marvell Kirkwood SoCs | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/serial_8250.h> | |
651c74c7 | 15 | #include <linux/ata_platform.h> |
fb7b2d3f | 16 | #include <linux/mtd/nand.h> |
ee962723 | 17 | #include <linux/dma-mapping.h> |
2f129bf4 AL |
18 | #include <linux/clk-provider.h> |
19 | #include <linux/spinlock.h> | |
dcf1cece | 20 | #include <net/dsa.h> |
651c74c7 SB |
21 | #include <asm/page.h> |
22 | #include <asm/timex.h> | |
9c15364f | 23 | #include <asm/kexec.h> |
651c74c7 SB |
24 | #include <asm/mach/map.h> |
25 | #include <asm/mach/time.h> | |
a09e64fb | 26 | #include <mach/kirkwood.h> |
fdd8b079 | 27 | #include <mach/bridge-regs.h> |
49106c72 | 28 | #include <plat/audio.h> |
6f088f1d | 29 | #include <plat/cache-feroceon-l2.h> |
8235ee00 | 30 | #include <plat/mvsdio.h> |
6f088f1d | 31 | #include <plat/orion_nand.h> |
72053353 | 32 | #include <plat/ehci-orion.h> |
28a2b450 | 33 | #include <plat/common.h> |
6f088f1d | 34 | #include <plat/time.h> |
45173d5e | 35 | #include <plat/addr-map.h> |
2f129bf4 | 36 | #include <plat/mv_xor.h> |
651c74c7 SB |
37 | #include "common.h" |
38 | ||
39 | /***************************************************************************** | |
40 | * I/O Address Mapping | |
41 | ****************************************************************************/ | |
42 | static struct map_desc kirkwood_io_desc[] __initdata = { | |
43 | { | |
44 | .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE, | |
45 | .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE), | |
46 | .length = KIRKWOOD_PCIE_IO_SIZE, | |
47 | .type = MT_DEVICE, | |
ffd58bd2 SB |
48 | }, { |
49 | .virtual = KIRKWOOD_PCIE1_IO_VIRT_BASE, | |
50 | .pfn = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE), | |
51 | .length = KIRKWOOD_PCIE1_IO_SIZE, | |
52 | .type = MT_DEVICE, | |
651c74c7 SB |
53 | }, { |
54 | .virtual = KIRKWOOD_REGS_VIRT_BASE, | |
55 | .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE), | |
56 | .length = KIRKWOOD_REGS_SIZE, | |
57 | .type = MT_DEVICE, | |
58 | }, | |
59 | }; | |
60 | ||
61 | void __init kirkwood_map_io(void) | |
62 | { | |
63 | iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc)); | |
64 | } | |
65 | ||
2f129bf4 AL |
66 | /***************************************************************************** |
67 | * CLK tree | |
68 | ****************************************************************************/ | |
98d9986c AL |
69 | |
70 | static void disable_sata0(void) | |
71 | { | |
72 | /* Disable PLL and IVREF */ | |
73 | writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2); | |
74 | /* Disable PHY */ | |
75 | writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL); | |
76 | } | |
77 | ||
78 | static void disable_sata1(void) | |
79 | { | |
80 | /* Disable PLL and IVREF */ | |
81 | writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2); | |
82 | /* Disable PHY */ | |
83 | writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL); | |
84 | } | |
85 | ||
86 | static void disable_pcie0(void) | |
87 | { | |
88 | writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL); | |
89 | while (1) | |
90 | if (readl(PCIE_STATUS) & 0x1) | |
91 | break; | |
92 | writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL); | |
93 | } | |
94 | ||
95 | static void disable_pcie1(void) | |
96 | { | |
97 | u32 dev, rev; | |
98 | ||
99 | kirkwood_pcie_id(&dev, &rev); | |
100 | ||
101 | if (dev == MV88F6282_DEV_ID) { | |
102 | writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL); | |
103 | while (1) | |
104 | if (readl(PCIE1_STATUS) & 0x1) | |
105 | break; | |
106 | writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL); | |
107 | } | |
108 | } | |
109 | ||
110 | /* An extended version of the gated clk. This calls fn() before | |
111 | * disabling the clock. We use this to turn off PHYs etc. */ | |
112 | struct clk_gate_fn { | |
113 | struct clk_gate gate; | |
114 | void (*fn)(void); | |
115 | }; | |
116 | ||
117 | #define to_clk_gate_fn(_gate) container_of(_gate, struct clk_gate_fn, gate) | |
118 | #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) | |
119 | ||
120 | static void clk_gate_fn_disable(struct clk_hw *hw) | |
121 | { | |
122 | struct clk_gate *gate = to_clk_gate(hw); | |
123 | struct clk_gate_fn *gate_fn = to_clk_gate_fn(gate); | |
124 | ||
125 | if (gate_fn->fn) | |
126 | gate_fn->fn(); | |
127 | ||
128 | clk_gate_ops.disable(hw); | |
129 | } | |
130 | ||
131 | static struct clk_ops clk_gate_fn_ops; | |
132 | ||
133 | static struct clk __init *clk_register_gate_fn(struct device *dev, | |
134 | const char *name, | |
135 | const char *parent_name, unsigned long flags, | |
136 | void __iomem *reg, u8 bit_idx, | |
137 | u8 clk_gate_flags, spinlock_t *lock, | |
138 | void (*fn)(void)) | |
139 | { | |
140 | struct clk_gate_fn *gate_fn; | |
141 | struct clk *clk; | |
142 | struct clk_init_data init; | |
143 | ||
144 | gate_fn = kzalloc(sizeof(struct clk_gate_fn), GFP_KERNEL); | |
145 | if (!gate_fn) { | |
146 | pr_err("%s: could not allocate gated clk\n", __func__); | |
147 | return ERR_PTR(-ENOMEM); | |
148 | } | |
149 | ||
150 | init.name = name; | |
151 | init.ops = &clk_gate_fn_ops; | |
152 | init.flags = flags; | |
153 | init.parent_names = (parent_name ? &parent_name : NULL); | |
154 | init.num_parents = (parent_name ? 1 : 0); | |
155 | ||
156 | /* struct clk_gate assignments */ | |
157 | gate_fn->gate.reg = reg; | |
158 | gate_fn->gate.bit_idx = bit_idx; | |
159 | gate_fn->gate.flags = clk_gate_flags; | |
160 | gate_fn->gate.lock = lock; | |
161 | gate_fn->gate.hw.init = &init; | |
5fb2ce11 | 162 | gate_fn->fn = fn; |
98d9986c AL |
163 | |
164 | /* ops is the gate ops, but with our disable function */ | |
165 | if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { | |
166 | clk_gate_fn_ops = clk_gate_ops; | |
167 | clk_gate_fn_ops.disable = clk_gate_fn_disable; | |
168 | } | |
169 | ||
170 | clk = clk_register(dev, &gate_fn->gate.hw); | |
171 | ||
172 | if (IS_ERR(clk)) | |
173 | kfree(gate_fn); | |
174 | ||
175 | return clk; | |
176 | } | |
177 | ||
2f129bf4 AL |
178 | static DEFINE_SPINLOCK(gating_lock); |
179 | static struct clk *tclk; | |
180 | ||
181 | static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx) | |
182 | { | |
98d9986c | 183 | return clk_register_gate(NULL, name, "tclk", 0, |
2f129bf4 AL |
184 | (void __iomem *)CLOCK_GATING_CTRL, |
185 | bit_idx, 0, &gating_lock); | |
186 | } | |
187 | ||
98d9986c AL |
188 | static struct clk __init *kirkwood_register_gate_fn(const char *name, |
189 | u8 bit_idx, | |
190 | void (*fn)(void)) | |
191 | { | |
192 | return clk_register_gate_fn(NULL, name, "tclk", 0, | |
193 | (void __iomem *)CLOCK_GATING_CTRL, | |
194 | bit_idx, 0, &gating_lock, fn); | |
195 | } | |
196 | ||
128789a8 AL |
197 | static struct clk *ge0, *ge1; |
198 | ||
2f129bf4 AL |
199 | void __init kirkwood_clk_init(void) |
200 | { | |
128789a8 | 201 | struct clk *runit, *sata0, *sata1, *usb0, *sdio; |
e919c716 | 202 | struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; |
4574b886 | 203 | |
2f129bf4 AL |
204 | tclk = clk_register_fixed_rate(NULL, "tclk", NULL, |
205 | CLK_IS_ROOT, kirkwood_tclk); | |
206 | ||
4574b886 | 207 | runit = kirkwood_register_gate("runit", CGC_BIT_RUNIT); |
452503eb AL |
208 | ge0 = kirkwood_register_gate("ge0", CGC_BIT_GE0); |
209 | ge1 = kirkwood_register_gate("ge1", CGC_BIT_GE1); | |
98d9986c AL |
210 | sata0 = kirkwood_register_gate_fn("sata0", CGC_BIT_SATA0, |
211 | disable_sata0); | |
212 | sata1 = kirkwood_register_gate_fn("sata1", CGC_BIT_SATA1, | |
213 | disable_sata1); | |
8c869eda | 214 | usb0 = kirkwood_register_gate("usb0", CGC_BIT_USB0); |
f4f7561e | 215 | sdio = kirkwood_register_gate("sdio", CGC_BIT_SDIO); |
1f80b126 | 216 | crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO); |
c510182b AL |
217 | xor0 = kirkwood_register_gate("xor0", CGC_BIT_XOR0); |
218 | xor1 = kirkwood_register_gate("xor1", CGC_BIT_XOR1); | |
98d9986c AL |
219 | pex0 = kirkwood_register_gate_fn("pex0", CGC_BIT_PEX0, |
220 | disable_pcie0); | |
221 | pex1 = kirkwood_register_gate_fn("pex1", CGC_BIT_PEX1, | |
222 | disable_pcie1); | |
e919c716 | 223 | audio = kirkwood_register_gate("audio", CGC_BIT_AUDIO); |
2f129bf4 AL |
224 | kirkwood_register_gate("tdm", CGC_BIT_TDM); |
225 | kirkwood_register_gate("tsu", CGC_BIT_TSU); | |
4574b886 AL |
226 | |
227 | /* clkdev entries, mapping clks to devices */ | |
228 | orion_clkdev_add(NULL, "orion_spi.0", runit); | |
229 | orion_clkdev_add(NULL, "orion_spi.1", runit); | |
452503eb AL |
230 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", ge0); |
231 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", ge1); | |
4f04be62 | 232 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
eee98990 AL |
233 | orion_clkdev_add("0", "sata_mv.0", sata0); |
234 | orion_clkdev_add("1", "sata_mv.0", sata1); | |
8c869eda | 235 | orion_clkdev_add(NULL, "orion-ehci.0", usb0); |
9c2bd504 | 236 | orion_clkdev_add(NULL, "orion_nand", runit); |
f4f7561e | 237 | orion_clkdev_add(NULL, "mvsdio", sdio); |
1f80b126 | 238 | orion_clkdev_add(NULL, "mv_crypto", crypto); |
c510182b AL |
239 | orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0); |
240 | orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1); | |
27e53cfb AL |
241 | orion_clkdev_add("0", "pcie", pex0); |
242 | orion_clkdev_add("1", "pcie", pex1); | |
e919c716 | 243 | orion_clkdev_add(NULL, "kirkwood-i2s", audio); |
2f129bf4 AL |
244 | } |
245 | ||
651c74c7 SB |
246 | /***************************************************************************** |
247 | * EHCI0 | |
248 | ****************************************************************************/ | |
651c74c7 SB |
249 | void __init kirkwood_ehci_init(void) |
250 | { | |
72053353 | 251 | orion_ehci_init(USB_PHYS_BASE, IRQ_KIRKWOOD_USB, EHCI_PHY_NA); |
651c74c7 SB |
252 | } |
253 | ||
254 | ||
255 | /***************************************************************************** | |
256 | * GE00 | |
257 | ****************************************************************************/ | |
651c74c7 SB |
258 | void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data) |
259 | { | |
db33f4de | 260 | orion_ge00_init(eth_data, |
7e3819d8 | 261 | GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, |
452503eb | 262 | IRQ_KIRKWOOD_GE00_ERR); |
128789a8 AL |
263 | /* The interface forgets the MAC address assigned by u-boot if |
264 | the clock is turned off, so claim the clk now. */ | |
265 | clk_prepare_enable(ge0); | |
651c74c7 SB |
266 | } |
267 | ||
268 | ||
d15fb9ef RS |
269 | /***************************************************************************** |
270 | * GE01 | |
271 | ****************************************************************************/ | |
d15fb9ef RS |
272 | void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data) |
273 | { | |
db33f4de | 274 | orion_ge01_init(eth_data, |
7e3819d8 | 275 | GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, |
452503eb | 276 | IRQ_KIRKWOOD_GE01_ERR); |
128789a8 | 277 | clk_prepare_enable(ge1); |
d15fb9ef RS |
278 | } |
279 | ||
280 | ||
dcf1cece LB |
281 | /***************************************************************************** |
282 | * Ethernet switch | |
283 | ****************************************************************************/ | |
dcf1cece LB |
284 | void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq) |
285 | { | |
7e3819d8 | 286 | orion_ge00_switch_init(d, irq); |
dcf1cece LB |
287 | } |
288 | ||
289 | ||
fb7b2d3f NP |
290 | /***************************************************************************** |
291 | * NAND flash | |
292 | ****************************************************************************/ | |
293 | static struct resource kirkwood_nand_resource = { | |
294 | .flags = IORESOURCE_MEM, | |
295 | .start = KIRKWOOD_NAND_MEM_PHYS_BASE, | |
296 | .end = KIRKWOOD_NAND_MEM_PHYS_BASE + | |
297 | KIRKWOOD_NAND_MEM_SIZE - 1, | |
298 | }; | |
299 | ||
300 | static struct orion_nand_data kirkwood_nand_data = { | |
301 | .cle = 0, | |
302 | .ale = 1, | |
303 | .width = 8, | |
304 | }; | |
305 | ||
306 | static struct platform_device kirkwood_nand_flash = { | |
307 | .name = "orion_nand", | |
308 | .id = -1, | |
309 | .dev = { | |
310 | .platform_data = &kirkwood_nand_data, | |
311 | }, | |
312 | .resource = &kirkwood_nand_resource, | |
313 | .num_resources = 1, | |
314 | }; | |
315 | ||
316 | void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts, | |
317 | int chip_delay) | |
318 | { | |
319 | kirkwood_nand_data.parts = parts; | |
320 | kirkwood_nand_data.nr_parts = nr_parts; | |
321 | kirkwood_nand_data.chip_delay = chip_delay; | |
322 | platform_device_register(&kirkwood_nand_flash); | |
323 | } | |
324 | ||
010937ec BD |
325 | void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts, |
326 | int (*dev_ready)(struct mtd_info *)) | |
327 | { | |
010937ec BD |
328 | kirkwood_nand_data.parts = parts; |
329 | kirkwood_nand_data.nr_parts = nr_parts; | |
330 | kirkwood_nand_data.dev_ready = dev_ready; | |
331 | platform_device_register(&kirkwood_nand_flash); | |
332 | } | |
fb7b2d3f | 333 | |
651c74c7 SB |
334 | /***************************************************************************** |
335 | * SoC RTC | |
336 | ****************************************************************************/ | |
e871b87a | 337 | static void __init kirkwood_rtc_init(void) |
651c74c7 | 338 | { |
4748058c | 339 | orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC); |
651c74c7 SB |
340 | } |
341 | ||
342 | ||
343 | /***************************************************************************** | |
344 | * SATA | |
345 | ****************************************************************************/ | |
651c74c7 SB |
346 | void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) |
347 | { | |
db33f4de | 348 | orion_sata_init(sata_data, SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA); |
651c74c7 SB |
349 | } |
350 | ||
351 | ||
8235ee00 NP |
352 | /***************************************************************************** |
353 | * SD/SDIO/MMC | |
354 | ****************************************************************************/ | |
355 | static struct resource mvsdio_resources[] = { | |
356 | [0] = { | |
357 | .start = SDIO_PHYS_BASE, | |
358 | .end = SDIO_PHYS_BASE + SZ_1K - 1, | |
359 | .flags = IORESOURCE_MEM, | |
360 | }, | |
361 | [1] = { | |
362 | .start = IRQ_KIRKWOOD_SDIO, | |
363 | .end = IRQ_KIRKWOOD_SDIO, | |
364 | .flags = IORESOURCE_IRQ, | |
365 | }, | |
366 | }; | |
367 | ||
5c602551 | 368 | static u64 mvsdio_dmamask = DMA_BIT_MASK(32); |
8235ee00 NP |
369 | |
370 | static struct platform_device kirkwood_sdio = { | |
371 | .name = "mvsdio", | |
372 | .id = -1, | |
373 | .dev = { | |
374 | .dma_mask = &mvsdio_dmamask, | |
5c602551 | 375 | .coherent_dma_mask = DMA_BIT_MASK(32), |
8235ee00 NP |
376 | }, |
377 | .num_resources = ARRAY_SIZE(mvsdio_resources), | |
378 | .resource = mvsdio_resources, | |
379 | }; | |
380 | ||
381 | void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) | |
382 | { | |
383 | u32 dev, rev; | |
384 | ||
385 | kirkwood_pcie_id(&dev, &rev); | |
1e4d2d3d | 386 | if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */ |
8235ee00 NP |
387 | mvsdio_data->clock = 100000000; |
388 | else | |
389 | mvsdio_data->clock = 200000000; | |
8235ee00 NP |
390 | kirkwood_sdio.dev.platform_data = mvsdio_data; |
391 | platform_device_register(&kirkwood_sdio); | |
392 | } | |
393 | ||
394 | ||
18365d18 LB |
395 | /***************************************************************************** |
396 | * SPI | |
397 | ****************************************************************************/ | |
18365d18 LB |
398 | void __init kirkwood_spi_init() |
399 | { | |
4574b886 | 400 | orion_spi_init(SPI_PHYS_BASE); |
18365d18 LB |
401 | } |
402 | ||
403 | ||
6574e001 MM |
404 | /***************************************************************************** |
405 | * I2C | |
406 | ****************************************************************************/ | |
6574e001 MM |
407 | void __init kirkwood_i2c_init(void) |
408 | { | |
aac7ffa3 | 409 | orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8); |
6574e001 MM |
410 | } |
411 | ||
412 | ||
651c74c7 SB |
413 | /***************************************************************************** |
414 | * UART0 | |
415 | ****************************************************************************/ | |
651c74c7 SB |
416 | |
417 | void __init kirkwood_uart0_init(void) | |
418 | { | |
28a2b450 | 419 | orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE, |
74c33576 | 420 | IRQ_KIRKWOOD_UART_0, tclk); |
651c74c7 SB |
421 | } |
422 | ||
423 | ||
424 | /***************************************************************************** | |
425 | * UART1 | |
426 | ****************************************************************************/ | |
651c74c7 SB |
427 | void __init kirkwood_uart1_init(void) |
428 | { | |
28a2b450 | 429 | orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE, |
74c33576 | 430 | IRQ_KIRKWOOD_UART_1, tclk); |
651c74c7 SB |
431 | } |
432 | ||
ae5c8c83 NP |
433 | /***************************************************************************** |
434 | * Cryptographic Engines and Security Accelerator (CESA) | |
435 | ****************************************************************************/ | |
ae5c8c83 NP |
436 | void __init kirkwood_crypto_init(void) |
437 | { | |
44350061 AL |
438 | orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE, |
439 | KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO); | |
ae5c8c83 NP |
440 | } |
441 | ||
442 | ||
09c0ed2e SB |
443 | /***************************************************************************** |
444 | * XOR0 | |
445 | ****************************************************************************/ | |
2b45e05f | 446 | void __init kirkwood_xor0_init(void) |
09c0ed2e | 447 | { |
db33f4de | 448 | orion_xor0_init(XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE, |
ee962723 | 449 | IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01); |
09c0ed2e SB |
450 | } |
451 | ||
452 | ||
453 | /***************************************************************************** | |
454 | * XOR1 | |
455 | ****************************************************************************/ | |
2b45e05f | 456 | void __init kirkwood_xor1_init(void) |
09c0ed2e | 457 | { |
ee962723 AL |
458 | orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE, |
459 | IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11); | |
09c0ed2e SB |
460 | } |
461 | ||
462 | ||
054bd3f0 TR |
463 | /***************************************************************************** |
464 | * Watchdog | |
465 | ****************************************************************************/ | |
2b45e05f | 466 | void __init kirkwood_wdt_init(void) |
054bd3f0 | 467 | { |
4f04be62 | 468 | orion_wdt_init(); |
054bd3f0 TR |
469 | } |
470 | ||
471 | ||
651c74c7 SB |
472 | /***************************************************************************** |
473 | * Time handling | |
474 | ****************************************************************************/ | |
4ee1f6b5 LB |
475 | void __init kirkwood_init_early(void) |
476 | { | |
477 | orion_time_set_base(TIMER_VIRT_BASE); | |
478 | } | |
479 | ||
79d4dd77 RS |
480 | int kirkwood_tclk; |
481 | ||
9b8ebfec | 482 | static int __init kirkwood_find_tclk(void) |
79d4dd77 | 483 | { |
b2b3dc2f RS |
484 | u32 dev, rev; |
485 | ||
486 | kirkwood_pcie_id(&dev, &rev); | |
1e4d2d3d | 487 | |
2fa0f939 SG |
488 | if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) |
489 | if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) | |
490 | return 200000000; | |
b2b3dc2f | 491 | |
79d4dd77 RS |
492 | return 166666667; |
493 | } | |
494 | ||
6de95c19 | 495 | static void __init kirkwood_timer_init(void) |
651c74c7 | 496 | { |
79d4dd77 | 497 | kirkwood_tclk = kirkwood_find_tclk(); |
4ee1f6b5 LB |
498 | |
499 | orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, | |
500 | IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); | |
651c74c7 SB |
501 | } |
502 | ||
503 | struct sys_timer kirkwood_timer = { | |
504 | .init = kirkwood_timer_init, | |
505 | }; | |
506 | ||
49106c72 | 507 | /***************************************************************************** |
508 | * Audio | |
509 | ****************************************************************************/ | |
510 | static struct resource kirkwood_i2s_resources[] = { | |
511 | [0] = { | |
512 | .start = AUDIO_PHYS_BASE, | |
513 | .end = AUDIO_PHYS_BASE + SZ_16K - 1, | |
514 | .flags = IORESOURCE_MEM, | |
515 | }, | |
516 | [1] = { | |
517 | .start = IRQ_KIRKWOOD_I2S, | |
518 | .end = IRQ_KIRKWOOD_I2S, | |
519 | .flags = IORESOURCE_IRQ, | |
520 | }, | |
521 | }; | |
522 | ||
523 | static struct kirkwood_asoc_platform_data kirkwood_i2s_data = { | |
49106c72 | 524 | .burst = 128, |
525 | }; | |
526 | ||
527 | static struct platform_device kirkwood_i2s_device = { | |
528 | .name = "kirkwood-i2s", | |
529 | .id = -1, | |
530 | .num_resources = ARRAY_SIZE(kirkwood_i2s_resources), | |
531 | .resource = kirkwood_i2s_resources, | |
532 | .dev = { | |
533 | .platform_data = &kirkwood_i2s_data, | |
534 | }, | |
535 | }; | |
536 | ||
f0fba2ad | 537 | static struct platform_device kirkwood_pcm_device = { |
c88e7b93 | 538 | .name = "kirkwood-pcm-audio", |
f0fba2ad LG |
539 | .id = -1, |
540 | }; | |
541 | ||
49106c72 | 542 | void __init kirkwood_audio_init(void) |
543 | { | |
49106c72 | 544 | platform_device_register(&kirkwood_i2s_device); |
f0fba2ad | 545 | platform_device_register(&kirkwood_pcm_device); |
49106c72 | 546 | } |
651c74c7 SB |
547 | |
548 | /***************************************************************************** | |
549 | * General | |
550 | ****************************************************************************/ | |
b2b3dc2f RS |
551 | /* |
552 | * Identify device ID and revision. | |
553 | */ | |
2b45e05f | 554 | char * __init kirkwood_id(void) |
651c74c7 | 555 | { |
b2b3dc2f RS |
556 | u32 dev, rev; |
557 | ||
558 | kirkwood_pcie_id(&dev, &rev); | |
559 | ||
560 | if (dev == MV88F6281_DEV_ID) { | |
561 | if (rev == MV88F6281_REV_Z0) | |
562 | return "MV88F6281-Z0"; | |
563 | else if (rev == MV88F6281_REV_A0) | |
564 | return "MV88F6281-A0"; | |
aec1bad3 SG |
565 | else if (rev == MV88F6281_REV_A1) |
566 | return "MV88F6281-A1"; | |
b2b3dc2f RS |
567 | else |
568 | return "MV88F6281-Rev-Unsupported"; | |
569 | } else if (dev == MV88F6192_DEV_ID) { | |
570 | if (rev == MV88F6192_REV_Z0) | |
571 | return "MV88F6192-Z0"; | |
572 | else if (rev == MV88F6192_REV_A0) | |
573 | return "MV88F6192-A0"; | |
1c2003a1 SB |
574 | else if (rev == MV88F6192_REV_A1) |
575 | return "MV88F6192-A1"; | |
b2b3dc2f RS |
576 | else |
577 | return "MV88F6192-Rev-Unsupported"; | |
578 | } else if (dev == MV88F6180_DEV_ID) { | |
579 | if (rev == MV88F6180_REV_A0) | |
580 | return "MV88F6180-Rev-A0"; | |
1c2003a1 SB |
581 | else if (rev == MV88F6180_REV_A1) |
582 | return "MV88F6180-Rev-A1"; | |
b2b3dc2f RS |
583 | else |
584 | return "MV88F6180-Rev-Unsupported"; | |
1e4d2d3d SB |
585 | } else if (dev == MV88F6282_DEV_ID) { |
586 | if (rev == MV88F6282_REV_A0) | |
587 | return "MV88F6282-Rev-A0"; | |
a87d89e7 MM |
588 | else if (rev == MV88F6282_REV_A1) |
589 | return "MV88F6282-Rev-A1"; | |
1e4d2d3d SB |
590 | else |
591 | return "MV88F6282-Rev-Unsupported"; | |
b2b3dc2f RS |
592 | } else { |
593 | return "Device-Unknown"; | |
651c74c7 | 594 | } |
651c74c7 SB |
595 | } |
596 | ||
2b45e05f | 597 | void __init kirkwood_l2_init(void) |
13387603 | 598 | { |
4360bb41 RS |
599 | #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH |
600 | writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG); | |
601 | feroceon_l2_init(1); | |
602 | #else | |
603 | writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG); | |
604 | feroceon_l2_init(0); | |
605 | #endif | |
13387603 SB |
606 | } |
607 | ||
651c74c7 SB |
608 | void __init kirkwood_init(void) |
609 | { | |
610 | printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", | |
79d4dd77 | 611 | kirkwood_id(), kirkwood_tclk); |
651c74c7 | 612 | |
2bf30108 LB |
613 | /* |
614 | * Disable propagation of mbus errors to the CPU local bus, | |
615 | * as this causes mbus errors (which can occur for example | |
616 | * for PCI aborts) to throw CPU aborts, which we're not set | |
617 | * up to deal with. | |
618 | */ | |
619 | writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); | |
620 | ||
651c74c7 SB |
621 | kirkwood_setup_cpu_mbus(); |
622 | ||
623 | #ifdef CONFIG_CACHE_FEROCEON_L2 | |
4360bb41 | 624 | kirkwood_l2_init(); |
651c74c7 | 625 | #endif |
5b99d534 | 626 | |
2f129bf4 AL |
627 | /* Setup root of clk tree */ |
628 | kirkwood_clk_init(); | |
629 | ||
5b99d534 NP |
630 | /* internal devices that every board has */ |
631 | kirkwood_rtc_init(); | |
054bd3f0 | 632 | kirkwood_wdt_init(); |
5b99d534 NP |
633 | kirkwood_xor0_init(); |
634 | kirkwood_xor1_init(); | |
ae5c8c83 | 635 | kirkwood_crypto_init(); |
9c15364f EC |
636 | |
637 | #ifdef CONFIG_KEXEC | |
638 | kexec_reinit = kirkwood_enable_pcie; | |
639 | #endif | |
651c74c7 | 640 | } |
e8b2b7ba | 641 | |
cb15dff4 RK |
642 | void kirkwood_restart(char mode, const char *cmd) |
643 | { | |
644 | /* | |
645 | * Enable soft reset to assert RSTOUTn. | |
646 | */ | |
647 | writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); | |
648 | ||
649 | /* | |
650 | * Assert soft reset. | |
651 | */ | |
652 | writel(SOFT_RESET, SYSTEM_SOFT_RESET); | |
653 | ||
654 | while (1) | |
655 | ; | |
656 | } |