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b2fdb566 AC |
1 | /* |
2 | * arch/arm/mach-kirkwood/openrd-setup.c | |
3 | * | |
43b56074 | 4 | * Marvell OpenRD (Base|Client|Ultimate) Board Setup |
b2fdb566 AC |
5 | * |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/mtd/nand.h> | |
15 | #include <linux/mtd/partitions.h> | |
16 | #include <linux/ata_platform.h> | |
17 | #include <linux/mv643xx_eth.h> | |
492e2bf1 | 18 | #include <linux/i2c.h> |
fd2ce9c5 | 19 | #include <linux/gpio.h> |
b2fdb566 AC |
20 | #include <asm/mach-types.h> |
21 | #include <asm/mach/arch.h> | |
22 | #include <mach/kirkwood.h> | |
c02cecb9 | 23 | #include <linux/platform_data/mmc-mvsdio.h> |
b2fdb566 AC |
24 | #include "common.h" |
25 | #include "mpp.h" | |
26 | ||
27 | static struct mtd_partition openrd_nand_parts[] = { | |
28 | { | |
29 | .name = "u-boot", | |
30 | .offset = 0, | |
31 | .size = SZ_1M, | |
32 | .mask_flags = MTD_WRITEABLE | |
33 | }, { | |
34 | .name = "uImage", | |
35 | .offset = MTDPART_OFS_NXTBLK, | |
36 | .size = SZ_4M | |
37 | }, { | |
38 | .name = "root", | |
39 | .offset = MTDPART_OFS_NXTBLK, | |
40 | .size = MTDPART_SIZ_FULL | |
41 | }, | |
42 | }; | |
43 | ||
44 | static struct mv643xx_eth_platform_data openrd_ge00_data = { | |
45 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | |
46 | }; | |
47 | ||
48 | static struct mv643xx_eth_platform_data openrd_ge01_data = { | |
49 | .phy_addr = MV643XX_ETH_PHY_ADDR(24), | |
50 | }; | |
51 | ||
52 | static struct mv_sata_platform_data openrd_sata_data = { | |
53 | .n_ports = 2, | |
54 | }; | |
55 | ||
56 | static struct mvsdio_platform_data openrd_mvsdio_data = { | |
57 | .gpio_card_detect = 29, /* MPP29 used as SD card detect */ | |
58 | }; | |
59 | ||
60 | static unsigned int openrd_mpp_config[] __initdata = { | |
fd2ce9c5 TU |
61 | MPP12_SD_CLK, |
62 | MPP13_SD_CMD, | |
63 | MPP14_SD_D0, | |
64 | MPP15_SD_D1, | |
65 | MPP16_SD_D2, | |
66 | MPP17_SD_D3, | |
67 | MPP28_GPIO, | |
b2fdb566 | 68 | MPP29_GPIO, |
fd2ce9c5 TU |
69 | MPP34_GPIO, |
70 | 0 | |
71 | }; | |
72 | ||
73 | /* Configure MPP for UART1 */ | |
74 | static unsigned int openrd_uart1_mpp_config[] __initdata = { | |
75 | MPP13_UART1_TXD, | |
76 | MPP14_UART1_RXD, | |
b2fdb566 AC |
77 | 0 |
78 | }; | |
79 | ||
492e2bf1 | 80 | static struct i2c_board_info i2c_board_info[] __initdata = { |
81 | { | |
82 | I2C_BOARD_INFO("cs42l51", 0x4a), | |
83 | }, | |
84 | }; | |
85 | ||
6d6761aa AL |
86 | static struct platform_device openrd_client_audio_device = { |
87 | .name = "openrd-client-audio", | |
88 | .id = -1, | |
89 | }; | |
90 | ||
fd2ce9c5 TU |
91 | static int __initdata uart1; |
92 | ||
93 | static int __init sd_uart_selection(char *str) | |
94 | { | |
95 | uart1 = -EINVAL; | |
96 | ||
97 | /* Default is SD. Change if required, for UART */ | |
98 | if (!str) | |
99 | return 0; | |
100 | ||
101 | if (!strncmp(str, "232", 3)) { | |
102 | uart1 = 232; | |
103 | } else if (!strncmp(str, "485", 3)) { | |
104 | /* OpenRD-Base doesn't have RS485. Treat is as an | |
105 | * unknown argument & just have default setting - | |
106 | * which is SD */ | |
107 | if (machine_is_openrd_base()) { | |
108 | uart1 = -ENODEV; | |
109 | return 1; | |
110 | } | |
111 | ||
112 | uart1 = 485; | |
113 | } | |
114 | return 1; | |
115 | } | |
116 | /* Parse boot_command_line string kw_openrd_init_uart1=232/485 */ | |
117 | __setup("kw_openrd_init_uart1=", sd_uart_selection); | |
118 | ||
119 | static int __init uart1_mpp_config(void) | |
120 | { | |
121 | kirkwood_mpp_conf(openrd_uart1_mpp_config); | |
122 | ||
123 | if (gpio_request(34, "SD_UART1_SEL")) { | |
98adf932 | 124 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); |
fd2ce9c5 TU |
125 | return -EIO; |
126 | } | |
127 | ||
128 | if (gpio_request(28, "RS232_RS485_SEL")) { | |
98adf932 | 129 | pr_err("GPIO request 28 failed for RS232/RS485 selection\n"); |
fd2ce9c5 TU |
130 | gpio_free(34); |
131 | return -EIO; | |
132 | } | |
133 | ||
134 | /* Select UART1 | |
135 | * Pin # 34: 0 => UART1, 1 => SD */ | |
136 | gpio_direction_output(34, 0); | |
137 | ||
138 | /* Select RS232 OR RS485 | |
139 | * Pin # 28: 0 => RS232, 1 => RS485 */ | |
140 | if (uart1 == 232) | |
141 | gpio_direction_output(28, 0); | |
142 | else | |
143 | gpio_direction_output(28, 1); | |
144 | ||
145 | gpio_free(34); | |
146 | gpio_free(28); | |
147 | ||
148 | return 0; | |
149 | } | |
150 | ||
b2fdb566 AC |
151 | static void __init openrd_init(void) |
152 | { | |
153 | /* | |
154 | * Basic setup. Needs to be called early. | |
155 | */ | |
156 | kirkwood_init(); | |
157 | kirkwood_mpp_conf(openrd_mpp_config); | |
158 | ||
159 | kirkwood_uart0_init(); | |
160 | kirkwood_nand_init(ARRAY_AND_SIZE(openrd_nand_parts), 25); | |
161 | ||
162 | kirkwood_ehci_init(); | |
163 | ||
43b56074 DM |
164 | if (machine_is_openrd_ultimate()) { |
165 | openrd_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0); | |
166 | openrd_ge01_data.phy_addr = MV643XX_ETH_PHY_ADDR(1); | |
167 | } | |
168 | ||
b2fdb566 | 169 | kirkwood_ge00_init(&openrd_ge00_data); |
43b56074 | 170 | if (!machine_is_openrd_base()) |
b2fdb566 | 171 | kirkwood_ge01_init(&openrd_ge01_data); |
43b56074 | 172 | |
b2fdb566 | 173 | kirkwood_sata_init(&openrd_sata_data); |
b2fdb566 AC |
174 | |
175 | kirkwood_i2c_init(); | |
492e2bf1 | 176 | |
3c9e28e7 | 177 | if (machine_is_openrd_client() || machine_is_openrd_ultimate()) { |
6d6761aa | 178 | platform_device_register(&openrd_client_audio_device); |
492e2bf1 | 179 | i2c_register_board_info(0, i2c_board_info, |
180 | ARRAY_SIZE(i2c_board_info)); | |
181 | kirkwood_audio_init(); | |
182 | } | |
fd2ce9c5 TU |
183 | |
184 | if (uart1 <= 0) { | |
185 | if (uart1 < 0) | |
98adf932 AL |
186 | pr_err("Invalid kernel parameter to select UART1. Defaulting to SD. ERROR CODE: %d\n", |
187 | uart1); | |
fd2ce9c5 TU |
188 | |
189 | /* Select SD | |
190 | * Pin # 34: 0 => UART1, 1 => SD */ | |
191 | if (gpio_request(34, "SD_UART1_SEL")) { | |
98adf932 | 192 | pr_err("GPIO request 34 failed for SD/UART1 selection\n"); |
fd2ce9c5 TU |
193 | } else { |
194 | ||
195 | gpio_direction_output(34, 1); | |
196 | gpio_free(34); | |
197 | kirkwood_sdio_init(&openrd_mvsdio_data); | |
198 | } | |
199 | } else { | |
200 | if (!uart1_mpp_config()) | |
201 | kirkwood_uart1_init(); | |
202 | } | |
b2fdb566 AC |
203 | } |
204 | ||
205 | static int __init openrd_pci_init(void) | |
206 | { | |
43b56074 DM |
207 | if (machine_is_openrd_base() || |
208 | machine_is_openrd_client() || | |
209 | machine_is_openrd_ultimate()) | |
ffd58bd2 | 210 | kirkwood_pcie_init(KW_PCIE0); |
b2fdb566 AC |
211 | |
212 | return 0; | |
213 | } | |
214 | subsys_initcall(openrd_pci_init); | |
215 | ||
216 | #ifdef CONFIG_MACH_OPENRD_BASE | |
217 | MACHINE_START(OPENRD_BASE, "Marvell OpenRD Base Board") | |
218 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | |
1b7bd28c | 219 | .atag_offset = 0x100, |
b2fdb566 AC |
220 | .init_machine = openrd_init, |
221 | .map_io = kirkwood_map_io, | |
4ee1f6b5 | 222 | .init_early = kirkwood_init_early, |
b2fdb566 | 223 | .init_irq = kirkwood_init_irq, |
6bb27d73 | 224 | .init_time = kirkwood_timer_init, |
cb15dff4 | 225 | .restart = kirkwood_restart, |
b2fdb566 AC |
226 | MACHINE_END |
227 | #endif | |
228 | ||
229 | #ifdef CONFIG_MACH_OPENRD_CLIENT | |
230 | MACHINE_START(OPENRD_CLIENT, "Marvell OpenRD Client Board") | |
231 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | |
1b7bd28c | 232 | .atag_offset = 0x100, |
b2fdb566 AC |
233 | .init_machine = openrd_init, |
234 | .map_io = kirkwood_map_io, | |
4ee1f6b5 | 235 | .init_early = kirkwood_init_early, |
b2fdb566 | 236 | .init_irq = kirkwood_init_irq, |
6bb27d73 | 237 | .init_time = kirkwood_timer_init, |
cb15dff4 | 238 | .restart = kirkwood_restart, |
b2fdb566 AC |
239 | MACHINE_END |
240 | #endif | |
43b56074 DM |
241 | |
242 | #ifdef CONFIG_MACH_OPENRD_ULTIMATE | |
243 | MACHINE_START(OPENRD_ULTIMATE, "Marvell OpenRD Ultimate Board") | |
244 | /* Maintainer: Dhaval Vasa <dhaval.vasa@einfochips.com> */ | |
1b7bd28c | 245 | .atag_offset = 0x100, |
43b56074 DM |
246 | .init_machine = openrd_init, |
247 | .map_io = kirkwood_map_io, | |
4ee1f6b5 | 248 | .init_early = kirkwood_init_early, |
43b56074 | 249 | .init_irq = kirkwood_init_irq, |
6bb27d73 | 250 | .init_time = kirkwood_timer_init, |
cb15dff4 | 251 | .restart = kirkwood_restart, |
43b56074 DM |
252 | MACHINE_END |
253 | #endif |