[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-ks8695 / pci.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * arch/arm/mach-ks8695/pci.c
 *
 *  Copyright (C) 2003, Micrel Semiconductors
 *  Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com>
 *  Copyright (C) 2006, Ben Dooks
 *  Copyright (C) 2007, Andrew Victor
 */

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/io.h>

#include <asm/signal.h>
#include <asm/mach/pci.h>
#include <mach/hardware.h>

#include "devices.h"
#include "regs-pci.h"


static int pci_dbg;

static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where)
{
	unsigned long pbca;

	pbca = PBCA_ENABLE | (where & ~3);
	pbca |= PCI_SLOT(devfn) << 11 ;
	pbca |= PCI_FUNC(devfn) << 8;
	pbca |= bus_nr << 16;

	if (bus_nr == 0) {
		/* use Type-0 transaction */
		__raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA);
	} else {
		/* use Type-1 transaction */
		__raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA);
	}
}

static void __iomem *ks8695_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
					int where)
{
	ks8695_pci_setupconfig(bus->number, devfn, where);
	return KS8695_PCI_VA +  KS8695_PBCD;
}

static void ks8695_local_writeconfig(int where, u32 value)
{
	ks8695_pci_setupconfig(0, 0, where);
	__raw_writel(value, KS8695_PCI_VA + KS8695_PBCD);
}

static struct pci_ops ks8695_pci_ops = {
	.map_bus = ks8695_pci_map_bus,
	.read	= pci_generic_config_read32,
	.write	= pci_generic_config_write32,
};

static struct resource pci_mem = {
	.name	= "PCI Memory space",
	.start	= KS8695_PCIMEM_PA,
	.end	= KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1),
	.flags	= IORESOURCE_MEM,
};

static struct resource pci_io = {
	.name	= "PCI IO space",
	.start	= KS8695_PCIIO_PA,
	.end	= KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1),
	.flags	= IORESOURCE_IO,
};

static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
{
	if (nr > 0)
		return 0;

	request_resource(&iomem_resource, &pci_mem);
	request_resource(&ioport_resource, &pci_io);

	pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset);
	pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset);

	/* Assign and enable processor bridge */
	ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);

	/* Enable bus-master & Memory Space access */
	ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);

	/* Set cache-line size & latency. */
	ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) | (L1_CACHE_BYTES / sizeof(u32)));

	/* Reserve PCI memory space for PCI-AHB resources */
	if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) {
		printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n");
		return -EBUSY;
	}

	return 1;
}

static inline unsigned int size_mask(unsigned long size)
{
	return (~size) + 1;
}

static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
{
	unsigned long pc = instruction_pointer(regs);
	unsigned long instr = *(unsigned long *)pc;
	unsigned long cmdstat;

	cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS);

	printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n",
		addr, fsr, regs->ARM_pc, regs->ARM_lr,
		cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ",
		cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ",
		cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ",
		cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ",
		cmdstat & (PCI_STATUS_DETECTED_PARITY << 16)  ? "Parity" : " "
	);

	__raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS);

	/*
	 * If the instruction being executed was a read,
	 * make it look like it read all-ones.
	 */
	if ((instr & 0x0c100000) == 0x04100000) {
		int reg = (instr >> 12) & 15;
		unsigned long val;

		if (instr & 0x00400000)
			val = 255;
		else
			val = -1;

		regs->uregs[reg] = val;
		regs->ARM_pc += 4;
		return 0;
	}

	if ((instr & 0x0e100090) == 0x00100090) {
		int reg = (instr >> 12) & 15;

		regs->uregs[reg] = -1;
		regs->ARM_pc += 4;
		return 0;
	}

	return 1;
}

static void __init ks8695_pci_preinit(void)
{
	/* make software reset to avoid freeze if PCI bus was messed up */
	__raw_writel(0x80000000, KS8695_PCI_VA + KS8695_PBCS);

	/* stage 1 initialization, subid, subdevice = 0x0001 */
	__raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID);

	/* stage 2 initialization */
	/* prefetch limits with 16 words, retry enable */
	__raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS);

	/* configure memory mapping */
	__raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA);
	__raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM);
	__raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT);
	__raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC);

	/* configure IO mapping */
	__raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA);
	__raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM);
	__raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT);
	__raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC);

	/* hook in fault handlers */
	hook_fault_code(8, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
	hook_fault_code(10, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
}

static void ks8695_show_pciregs(void)
{
	if (!pci_dbg)
		return;

	printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID));
	printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS));
	printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV));
	printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT));
	printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA));
	printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID));
	printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT));

	printk(KERN_INFO "PCI: PBM    = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM));
	printk(KERN_INFO "PCI: PBCS   = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS));

	printk(KERN_INFO "PCI: PMBA   = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA));
	printk(KERN_INFO "PCI: PMBAC  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC));
	printk(KERN_INFO "PCI: PMBAM  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM));
	printk(KERN_INFO "PCI: PMBAT  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT));

	printk(KERN_INFO "PCI: PIOBA  = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA));
	printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC));
	printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM));
	printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT));
}


static struct hw_pci ks8695_pci __initdata = {
	.nr_controllers	= 1,
	.ops		= &ks8695_pci_ops,
	.preinit	= ks8695_pci_preinit,
	.setup		= ks8695_pci_setup,
	.postinit	= NULL,
	.map_irq	= NULL,
};

void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
{
	if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) {
		printk("PCI: KS8695 in guest mode, not initialising\n");
		return;
	}

	pcibios_min_io = 0;
	pcibios_min_mem = 0;

	printk(KERN_INFO "PCI: Initialising\n");
	ks8695_show_pciregs();

	/* set Mode */
	__raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM);

	ks8695_pci.map_irq = cfg->map_irq;	/* board-specific map_irq method */

	pci_common_init(&ks8695_pci);
}
Commit	Line	Data
1a59d1b8	1	// SPDX-License-Identifier: GPL-2.0-or-later
7d77ce8f AV	2	/*
	3	* arch/arm/mach-ks8695/pci.c
	4	*
	5	* Copyright (C) 2003, Micrel Semiconductors
	6	* Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com>
	7	* Copyright (C) 2006, Ben Dooks
	8	* Copyright (C) 2007, Andrew Victor
7d77ce8f AV	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/pci.h>
	13	#include <linux/mm.h>
	14	#include <linux/init.h>
	15	#include <linux/irq.h>
	16	#include <linux/delay.h>
fced80c7	17	#include <linux/io.h>
7d77ce8f	18
7d77ce8f AV	19	#include <asm/signal.h>
7d77ce8f AV	20	#include <asm/mach/pci.h>
a09e64fb	21	#include <mach/hardware.h>
7d77ce8f	22
d8b2823e AB	23	#include "devices.h"
d8b2823e AB	24	#include "regs-pci.h"
7d77ce8f AV	25
	26
	27	static int pci_dbg;
7d77ce8f AV	28
	29	static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where)
	30	{
	31	unsigned long pbca;
	32
	33	pbca = PBCA_ENABLE \| (where & ~3);
	34	pbca \|= PCI_SLOT(devfn) << 11 ;
	35	pbca \|= PCI_FUNC(devfn) << 8;
	36	pbca \|= bus_nr << 16;
	37
	38	if (bus_nr == 0) {
	39	/* use Type-0 transaction */
	40	__raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA);
	41	} else {
	42	/* use Type-1 transaction */
	43	__raw_writel(pbca \| PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA);
	44	}
	45	}
	46
8d6bd97d RH	47	static void __iomem ks8695_pci_map_bus(struct pci_bus bus, unsigned int devfn,
8d6bd97d RH	48	int where)
7d77ce8f	49	{
7d77ce8f	50	ks8695_pci_setupconfig(bus->number, devfn, where);
8d6bd97d	51	return KS8695_PCI_VA + KS8695_PBCD;
7d77ce8f AV	52	}
	53
	54	static void ks8695_local_writeconfig(int where, u32 value)
	55	{
	56	ks8695_pci_setupconfig(0, 0, where);
	57	__raw_writel(value, KS8695_PCI_VA + KS8695_PBCD);
	58	}
	59
	60	static struct pci_ops ks8695_pci_ops = {
8d6bd97d RH	61	.map_bus = ks8695_pci_map_bus,
	62	.read = pci_generic_config_read32,
	63	.write = pci_generic_config_write32,
7d77ce8f AV	64	};
7d77ce8f AV	65
7d77ce8f AV	66	static struct resource pci_mem = {
	67	.name = "PCI Memory space",
	68	.start = KS8695_PCIMEM_PA,
	69	.end = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1),
	70	.flags = IORESOURCE_MEM,
	71	};
	72
	73	static struct resource pci_io = {
	74	.name = "PCI IO space",
	75	.start = KS8695_PCIIO_PA,
	76	.end = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1),
	77	.flags = IORESOURCE_IO,
	78	};
	79
	80	static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys)
	81	{
	82	if (nr > 0)
	83	return 0;
	84
	85	request_resource(&iomem_resource, &pci_mem);
	86	request_resource(&ioport_resource, &pci_io);
	87
9f786d03 BH	88	pci_add_resource_offset(&sys->resources, &pci_io, sys->io_offset);
9f786d03 BH	89	pci_add_resource_offset(&sys->resources, &pci_mem, sys->mem_offset);
7d77ce8f AV	90
	91	/* Assign and enable processor bridge */
	92	ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA);
	93
	94	/* Enable bus-master & Memory Space access */
	95	ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER \| PCI_COMMAND_MEMORY);
	96
	97	/* Set cache-line size & latency. */
	98	ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) \| (L1_CACHE_BYTES / sizeof(u32)));
	99
	100	/* Reserve PCI memory space for PCI-AHB resources */
	101	if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) {
	102	printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n");
	103	return -EBUSY;
	104	}
	105
	106	return 1;
	107	}
	108
	109	static inline unsigned int size_mask(unsigned long size)
	110	{
	111	return (~size) + 1;
	112	}
	113
	114	static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
	115	{
	116	unsigned long pc = instruction_pointer(regs);
	117	unsigned long instr = (unsigned long )pc;
	118	unsigned long cmdstat;
	119
	120	cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS);
	121
	122	printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n",
	123	addr, fsr, regs->ARM_pc, regs->ARM_lr,
	124	cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ",
	125	cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ",
	126	cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ",
	127	cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ",
	128	cmdstat & (PCI_STATUS_DETECTED_PARITY << 16) ? "Parity" : " "
	129	);
	130
	131	__raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS);
	132
	133	/*
	134	* If the instruction being executed was a read,
	135	* make it look like it read all-ones.
	136	*/
	137	if ((instr & 0x0c100000) == 0x04100000) {
	138	int reg = (instr >> 12) & 15;
	139	unsigned long val;
	140
	141	if (instr & 0x00400000)
	142	val = 255;
	143	else
	144	val = -1;
	145
	146	regs->uregs[reg] = val;
	147	regs->ARM_pc += 4;
	148	return 0;
	149	}
	150
	151	if ((instr & 0x0e100090) == 0x00100090) {
	152	int reg = (instr >> 12) & 15;
	153
154	regs->uregs[reg] = -1;
155	regs->ARM_pc += 4;
156	return 0;
157	}
158
159	return 1;
160	}
161
162	static void __init ks8695_pci_preinit(void)
163	{
320145fa YY	164	/* make software reset to avoid freeze if PCI bus was messed up */
	165	__raw_writel(0x80000000, KS8695_PCI_VA + KS8695_PBCS);
	166
7d77ce8f AV	167	/* stage 1 initialization, subid, subdevice = 0x0001 */
	168	__raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID);
	169
	170	/* stage 2 initialization */
	171	/* prefetch limits with 16 words, retry enable */
	172	__raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS);
	173
	174	/* configure memory mapping */
	175	__raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA);
	176	__raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM);
	177	__raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT);
	178	__raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC);
	179
	180	/* configure IO mapping */
	181	__raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA);
	182	__raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM);
	183	__raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT);
	184	__raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC);
	185
	186	/* hook in fault handlers */
6338a6aa KS	187	hook_fault_code(8, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
6338a6aa KS	188	hook_fault_code(10, ks8695_pci_fault, SIGBUS, 0, "external abort on non-linefetch");
7d77ce8f AV	189	}
	190
	191	static void ks8695_show_pciregs(void)
	192	{
	193	if (!pci_dbg)
	194	return;
	195
	196	printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID));
	197	printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS));
	198	printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV));
	199	printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT));
	200	printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA));
	201	printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID));
	202	printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT));
	203
	204	printk(KERN_INFO "PCI: PBM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM));
	205	printk(KERN_INFO "PCI: PBCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS));
	206
	207	printk(KERN_INFO "PCI: PMBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA));
	208	printk(KERN_INFO "PCI: PMBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC));
	209	printk(KERN_INFO "PCI: PMBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM));
	210	printk(KERN_INFO "PCI: PMBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT));
	211
	212	printk(KERN_INFO "PCI: PIOBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA));
	213	printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC));
	214	printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM));
	215	printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT));
	216	}
	217
	218
	219	static struct hw_pci ks8695_pci __initdata = {
	220	.nr_controllers = 1,
c23bfc38	221	.ops = &ks8695_pci_ops,
7d77ce8f AV	222	.preinit = ks8695_pci_preinit,
7d77ce8f AV	223	.setup = ks8695_pci_setup,
7d77ce8f	224	.postinit = NULL,
7d77ce8f AV	225	.map_irq = NULL,
	226	};
	227
	228	void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
	229	{
	230	if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) {
	231	printk("PCI: KS8695 in guest mode, not initialising\n");
	232	return;
	233	}
	234
c9d95fbe RH	235	pcibios_min_io = 0;
	236	pcibios_min_mem = 0;
	237
7d77ce8f AV	238	printk(KERN_INFO "PCI: Initialising\n");
	239	ks8695_show_pciregs();
	240
	241	/* set Mode */
	242	__raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM);
	243
	244	ks8695_pci.map_irq = cfg->map_irq; /* board-specific map_irq method */
	245
	246	pci_common_init(&ks8695_pci);
	247	}