projects / mirror_ubuntu-zesty-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| f682a218 MB |
1 | /* |
| 2 | * Device Tree support for Mediatek SoCs | |
| 3 | * | |
| 4 | * Copyright (c) 2014 MundoReader S.L. | |
| 5 | * Author: Matthias Brugger <matthias.bgg@gmail.com> | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License as published by | |
| 9 | * the Free Software Foundation; either version 2 of the License, or | |
| 10 | * (at your option) any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| 16 | */ | |
| 17 | #include <linux/init.h> | |
| 18 | #include <asm/mach/arch.h> | |
| 9821e545 MB |
19 | #include <linux/of.h> |
| 20 | #include <linux/clk-provider.h> | |
| 21 | #include <linux/clocksource.h> | |
| 22 | ||
| 23 | ||
| 24 | #define GPT6_CON_MT65xx 0x10008060 | |
| 25 | #define GPT_ENABLE 0x31 | |
| 26 | ||
| 27 | static void __init mediatek_timer_init(void) | |
| 28 | { | |
| 29 | void __iomem *gpt_base; | |
| 30 | ||
| 31 | if (of_machine_is_compatible("mediatek,mt6589") || | |
| 601bac76 | 32 | of_machine_is_compatible("mediatek,mt7623") || |
| 9821e545 MB |
33 | of_machine_is_compatible("mediatek,mt8135") || |
| 34 | of_machine_is_compatible("mediatek,mt8127")) { | |
| 35 | /* turn on GPT6 which ungates arch timer clocks */ | |
| 36 | gpt_base = ioremap(GPT6_CON_MT65xx, 0x04); | |
| 37 | ||
| 38 | /* enable clock and set to free-run */ | |
| 39 | writel(GPT_ENABLE, gpt_base); | |
| 40 | iounmap(gpt_base); | |
| 41 | } | |
| 42 | ||
| 43 | of_clk_init(NULL); | |
| 56e04649 | 44 | clocksource_probe(); |
| 9821e545 | 45 | }; |
| f682a218 MB |
46 | |
| 47 | static const char * const mediatek_board_dt_compat[] = { | |
| 74d25721 | 48 | "mediatek,mt2701", |
| f682a218 | 49 | "mediatek,mt6589", |
| 4542172e | 50 | "mediatek,mt6592", |
| 31ac0d69 | 51 | "mediatek,mt7623", |
| 1ccd653c | 52 | "mediatek,mt8127", |
| 0c3fb203 | 53 | "mediatek,mt8135", |
| f682a218 MB |
54 | NULL, |
| 55 | }; | |
| 56 | ||
| 57 | DT_MACHINE_START(MEDIATEK_DT, "Mediatek Cortex-A7 (Device Tree)") | |
| 58 | .dt_compat = mediatek_board_dt_compat, | |
| 9821e545 | 59 | .init_time = mediatek_timer_init, |
| f682a218 | 60 | MACHINE_END |