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49cbe786 EM |
1 | /* |
2 | * linux/arch/arm/mach-mmp/aspenite.c | |
3 | * | |
4 | * Support for the Marvell PXA168-based Aspenite and Zylonite2 | |
5 | * Development Platform. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * publishhed by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/init.h> | |
9c291f0f | 13 | #include <linux/kernel.h> |
a6b993c6 EM |
14 | #include <linux/platform_device.h> |
15 | #include <linux/smc91x.h> | |
49cbe786 EM |
16 | |
17 | #include <asm/mach-types.h> | |
18 | #include <asm/mach/arch.h> | |
19 | #include <mach/addr-map.h> | |
9c291f0f EM |
20 | #include <mach/mfp-pxa168.h> |
21 | #include <mach/pxa168.h> | |
a6b993c6 | 22 | #include <mach/gpio.h> |
49cbe786 EM |
23 | |
24 | #include "common.h" | |
25 | ||
9c291f0f | 26 | static unsigned long common_pin_config[] __initdata = { |
a6b993c6 EM |
27 | /* Data Flash Interface */ |
28 | GPIO0_DFI_D15, | |
29 | GPIO1_DFI_D14, | |
30 | GPIO2_DFI_D13, | |
31 | GPIO3_DFI_D12, | |
32 | GPIO4_DFI_D11, | |
33 | GPIO5_DFI_D10, | |
34 | GPIO6_DFI_D9, | |
35 | GPIO7_DFI_D8, | |
36 | GPIO8_DFI_D7, | |
37 | GPIO9_DFI_D6, | |
38 | GPIO10_DFI_D5, | |
39 | GPIO11_DFI_D4, | |
40 | GPIO12_DFI_D3, | |
41 | GPIO13_DFI_D2, | |
42 | GPIO14_DFI_D1, | |
43 | GPIO15_DFI_D0, | |
44 | ||
45 | /* Static Memory Controller */ | |
46 | GPIO18_SMC_nCS0, | |
47 | GPIO34_SMC_nCS1, | |
48 | GPIO23_SMC_nLUA, | |
49 | GPIO25_SMC_nLLA, | |
50 | GPIO28_SMC_RDY, | |
51 | GPIO29_SMC_SCLK, | |
52 | GPIO35_SMC_BE1, | |
53 | GPIO36_SMC_BE2, | |
54 | GPIO27_GPIO, /* Ethernet IRQ */ | |
55 | ||
9c291f0f EM |
56 | /* UART1 */ |
57 | GPIO107_UART1_RXD, | |
58 | GPIO108_UART1_TXD, | |
59 | }; | |
60 | ||
a6b993c6 EM |
61 | static struct smc91x_platdata smc91x_info = { |
62 | .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT, | |
63 | }; | |
64 | ||
65 | static struct resource smc91x_resources[] = { | |
66 | [0] = { | |
67 | .start = SMC_CS1_PHYS_BASE + 0x300, | |
68 | .end = SMC_CS1_PHYS_BASE + 0xfffff, | |
69 | .flags = IORESOURCE_MEM, | |
70 | }, | |
71 | [1] = { | |
72 | .start = gpio_to_irq(27), | |
73 | .end = gpio_to_irq(27), | |
74 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
75 | } | |
76 | }; | |
77 | ||
78 | static struct platform_device smc91x_device = { | |
79 | .name = "smc91x", | |
80 | .id = 0, | |
81 | .dev = { | |
82 | .platform_data = &smc91x_info, | |
83 | }, | |
84 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
85 | .resource = smc91x_resources, | |
86 | }; | |
87 | ||
49cbe786 EM |
88 | static void __init common_init(void) |
89 | { | |
9c291f0f EM |
90 | mfp_config(ARRAY_AND_SIZE(common_pin_config)); |
91 | ||
a6b993c6 | 92 | /* on-chip devices */ |
9c291f0f | 93 | pxa168_add_uart(1); |
a6b993c6 EM |
94 | |
95 | /* off-chip devices */ | |
96 | platform_device_register(&smc91x_device); | |
49cbe786 EM |
97 | } |
98 | ||
99 | MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform") | |
100 | .phys_io = APB_PHYS_BASE, | |
101 | .boot_params = 0x00000100, | |
102 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | |
103 | .map_io = pxa_map_io, | |
104 | .init_irq = pxa168_init_irq, | |
105 | .timer = &pxa168_timer, | |
106 | .init_machine = common_init, | |
107 | MACHINE_END | |
108 | ||
109 | MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform") | |
110 | .phys_io = APB_PHYS_BASE, | |
111 | .boot_params = 0x00000100, | |
112 | .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc, | |
113 | .map_io = pxa_map_io, | |
114 | .init_irq = pxa168_init_irq, | |
115 | .timer = &pxa168_timer, | |
116 | .init_machine = common_init, | |
117 | MACHINE_END |