]>
Commit | Line | Data |
---|---|---|
bcc0f6af BS |
1 | /* linux/arch/arm/mach-msm/devices.c |
2 | * | |
3 | * Copyright (C) 2008 Google, Inc. | |
4 | * | |
5 | * This software is licensed under the terms of the GNU General Public | |
6 | * License version 2, as published by the Free Software Foundation, and | |
7 | * may be copied, distributed, and modified under those terms. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/platform_device.h> | |
18 | ||
80b02c17 | 19 | #include <mach/irqs.h> |
bcc0f6af BS |
20 | #include <mach/msm_iomap.h> |
21 | #include "devices.h" | |
22 | ||
23 | #include <asm/mach/flash.h> | |
24 | #include <linux/mtd/nand.h> | |
25 | #include <linux/mtd/partitions.h> | |
26 | ||
5d4f77ff SM |
27 | #include <mach/mmc.h> |
28 | ||
bcc0f6af BS |
29 | static struct resource resources_uart1[] = { |
30 | { | |
31 | .start = INT_UART1, | |
32 | .end = INT_UART1, | |
33 | .flags = IORESOURCE_IRQ, | |
34 | }, | |
35 | { | |
36 | .start = MSM_UART1_PHYS, | |
37 | .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1, | |
38 | .flags = IORESOURCE_MEM, | |
39 | }, | |
40 | }; | |
41 | ||
42 | static struct resource resources_uart2[] = { | |
43 | { | |
44 | .start = INT_UART2, | |
45 | .end = INT_UART2, | |
46 | .flags = IORESOURCE_IRQ, | |
47 | }, | |
48 | { | |
49 | .start = MSM_UART2_PHYS, | |
50 | .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1, | |
51 | .flags = IORESOURCE_MEM, | |
52 | }, | |
53 | }; | |
54 | ||
55 | static struct resource resources_uart3[] = { | |
56 | { | |
57 | .start = INT_UART3, | |
58 | .end = INT_UART3, | |
59 | .flags = IORESOURCE_IRQ, | |
60 | }, | |
61 | { | |
62 | .start = MSM_UART3_PHYS, | |
63 | .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1, | |
64 | .flags = IORESOURCE_MEM, | |
65 | }, | |
66 | }; | |
67 | ||
68 | struct platform_device msm_device_uart1 = { | |
69 | .name = "msm_serial", | |
70 | .id = 0, | |
71 | .num_resources = ARRAY_SIZE(resources_uart1), | |
72 | .resource = resources_uart1, | |
73 | }; | |
74 | ||
75 | struct platform_device msm_device_uart2 = { | |
76 | .name = "msm_serial", | |
77 | .id = 1, | |
78 | .num_resources = ARRAY_SIZE(resources_uart2), | |
79 | .resource = resources_uart2, | |
80 | }; | |
81 | ||
82 | struct platform_device msm_device_uart3 = { | |
83 | .name = "msm_serial", | |
84 | .id = 2, | |
85 | .num_resources = ARRAY_SIZE(resources_uart3), | |
86 | .resource = resources_uart3, | |
87 | }; | |
88 | ||
89 | static struct resource resources_i2c[] = { | |
90 | { | |
91 | .start = MSM_I2C_PHYS, | |
92 | .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1, | |
93 | .flags = IORESOURCE_MEM, | |
94 | }, | |
95 | { | |
96 | .start = INT_PWB_I2C, | |
97 | .end = INT_PWB_I2C, | |
98 | .flags = IORESOURCE_IRQ, | |
99 | }, | |
100 | }; | |
101 | ||
102 | struct platform_device msm_device_i2c = { | |
103 | .name = "msm_i2c", | |
104 | .id = 0, | |
105 | .num_resources = ARRAY_SIZE(resources_i2c), | |
106 | .resource = resources_i2c, | |
107 | }; | |
108 | ||
109 | static struct resource resources_hsusb[] = { | |
110 | { | |
111 | .start = MSM_HSUSB_PHYS, | |
112 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, | |
113 | .flags = IORESOURCE_MEM, | |
114 | }, | |
115 | { | |
116 | .start = INT_USB_HS, | |
117 | .end = INT_USB_HS, | |
118 | .flags = IORESOURCE_IRQ, | |
119 | }, | |
120 | }; | |
121 | ||
122 | struct platform_device msm_device_hsusb = { | |
123 | .name = "msm_hsusb", | |
124 | .id = -1, | |
125 | .num_resources = ARRAY_SIZE(resources_hsusb), | |
126 | .resource = resources_hsusb, | |
127 | .dev = { | |
128 | .coherent_dma_mask = 0xffffffff, | |
129 | }, | |
130 | }; | |
131 | ||
132 | struct flash_platform_data msm_nand_data = { | |
133 | .parts = NULL, | |
134 | .nr_parts = 0, | |
135 | }; | |
136 | ||
137 | static struct resource resources_nand[] = { | |
138 | [0] = { | |
139 | .start = 7, | |
140 | .end = 7, | |
141 | .flags = IORESOURCE_DMA, | |
142 | }, | |
143 | }; | |
144 | ||
145 | struct platform_device msm_device_nand = { | |
146 | .name = "msm_nand", | |
147 | .id = -1, | |
148 | .num_resources = ARRAY_SIZE(resources_nand), | |
149 | .resource = resources_nand, | |
150 | .dev = { | |
151 | .platform_data = &msm_nand_data, | |
152 | }, | |
153 | }; | |
154 | ||
155 | struct platform_device msm_device_smd = { | |
156 | .name = "msm_smd", | |
157 | .id = -1, | |
158 | }; | |
159 | ||
160 | static struct resource resources_sdc1[] = { | |
161 | { | |
162 | .start = MSM_SDC1_PHYS, | |
163 | .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1, | |
164 | .flags = IORESOURCE_MEM, | |
165 | }, | |
166 | { | |
167 | .start = INT_SDC1_0, | |
830d843b DZ |
168 | .end = INT_SDC1_0, |
169 | .flags = IORESOURCE_IRQ, | |
170 | .name = "cmd_irq", | |
171 | }, | |
172 | { | |
173 | .start = INT_SDC1_1, | |
bcc0f6af BS |
174 | .end = INT_SDC1_1, |
175 | .flags = IORESOURCE_IRQ, | |
830d843b DZ |
176 | .name = "pio_irq", |
177 | }, | |
178 | { | |
179 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
180 | .name = "status_irq" | |
bcc0f6af BS |
181 | }, |
182 | { | |
183 | .start = 8, | |
184 | .end = 8, | |
185 | .flags = IORESOURCE_DMA, | |
186 | }, | |
187 | }; | |
188 | ||
189 | static struct resource resources_sdc2[] = { | |
190 | { | |
191 | .start = MSM_SDC2_PHYS, | |
192 | .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1, | |
193 | .flags = IORESOURCE_MEM, | |
194 | }, | |
195 | { | |
196 | .start = INT_SDC2_0, | |
830d843b DZ |
197 | .end = INT_SDC2_0, |
198 | .flags = IORESOURCE_IRQ, | |
199 | .name = "cmd_irq", | |
200 | }, | |
201 | { | |
202 | .start = INT_SDC2_1, | |
bcc0f6af BS |
203 | .end = INT_SDC2_1, |
204 | .flags = IORESOURCE_IRQ, | |
830d843b DZ |
205 | .name = "pio_irq", |
206 | }, | |
207 | { | |
208 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
209 | .name = "status_irq" | |
bcc0f6af BS |
210 | }, |
211 | { | |
212 | .start = 8, | |
213 | .end = 8, | |
214 | .flags = IORESOURCE_DMA, | |
215 | }, | |
216 | }; | |
217 | ||
218 | static struct resource resources_sdc3[] = { | |
219 | { | |
220 | .start = MSM_SDC3_PHYS, | |
221 | .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1, | |
222 | .flags = IORESOURCE_MEM, | |
223 | }, | |
224 | { | |
225 | .start = INT_SDC3_0, | |
830d843b DZ |
226 | .end = INT_SDC3_0, |
227 | .flags = IORESOURCE_IRQ, | |
228 | .name = "cmd_irq", | |
229 | }, | |
230 | { | |
231 | .start = INT_SDC3_1, | |
bcc0f6af BS |
232 | .end = INT_SDC3_1, |
233 | .flags = IORESOURCE_IRQ, | |
830d843b DZ |
234 | .name = "pio_irq", |
235 | }, | |
236 | { | |
237 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
238 | .name = "status_irq" | |
bcc0f6af BS |
239 | }, |
240 | { | |
241 | .start = 8, | |
242 | .end = 8, | |
243 | .flags = IORESOURCE_DMA, | |
244 | }, | |
245 | }; | |
246 | ||
247 | static struct resource resources_sdc4[] = { | |
248 | { | |
249 | .start = MSM_SDC4_PHYS, | |
250 | .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1, | |
251 | .flags = IORESOURCE_MEM, | |
252 | }, | |
253 | { | |
254 | .start = INT_SDC4_0, | |
830d843b DZ |
255 | .end = INT_SDC4_0, |
256 | .flags = IORESOURCE_IRQ, | |
257 | .name = "cmd_irq", | |
258 | }, | |
259 | { | |
260 | .start = INT_SDC4_1, | |
bcc0f6af BS |
261 | .end = INT_SDC4_1, |
262 | .flags = IORESOURCE_IRQ, | |
830d843b DZ |
263 | .name = "pio_irq", |
264 | }, | |
265 | { | |
266 | .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED, | |
267 | .name = "status_irq" | |
bcc0f6af BS |
268 | }, |
269 | { | |
270 | .start = 8, | |
271 | .end = 8, | |
272 | .flags = IORESOURCE_DMA, | |
273 | }, | |
274 | }; | |
275 | ||
276 | struct platform_device msm_device_sdc1 = { | |
277 | .name = "msm_sdcc", | |
278 | .id = 1, | |
279 | .num_resources = ARRAY_SIZE(resources_sdc1), | |
280 | .resource = resources_sdc1, | |
281 | .dev = { | |
282 | .coherent_dma_mask = 0xffffffff, | |
283 | }, | |
284 | }; | |
285 | ||
286 | struct platform_device msm_device_sdc2 = { | |
287 | .name = "msm_sdcc", | |
288 | .id = 2, | |
289 | .num_resources = ARRAY_SIZE(resources_sdc2), | |
290 | .resource = resources_sdc2, | |
291 | .dev = { | |
292 | .coherent_dma_mask = 0xffffffff, | |
293 | }, | |
294 | }; | |
295 | ||
296 | struct platform_device msm_device_sdc3 = { | |
297 | .name = "msm_sdcc", | |
298 | .id = 3, | |
299 | .num_resources = ARRAY_SIZE(resources_sdc3), | |
300 | .resource = resources_sdc3, | |
301 | .dev = { | |
302 | .coherent_dma_mask = 0xffffffff, | |
303 | }, | |
304 | }; | |
305 | ||
306 | struct platform_device msm_device_sdc4 = { | |
307 | .name = "msm_sdcc", | |
308 | .id = 4, | |
309 | .num_resources = ARRAY_SIZE(resources_sdc4), | |
310 | .resource = resources_sdc4, | |
311 | .dev = { | |
312 | .coherent_dma_mask = 0xffffffff, | |
313 | }, | |
314 | }; | |
5d4f77ff SM |
315 | |
316 | static struct platform_device *msm_sdcc_devices[] __initdata = { | |
317 | &msm_device_sdc1, | |
318 | &msm_device_sdc2, | |
319 | &msm_device_sdc3, | |
320 | &msm_device_sdc4, | |
321 | }; | |
322 | ||
830d843b DZ |
323 | int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat, |
324 | unsigned int stat_irq, unsigned long stat_irq_flags) | |
5d4f77ff SM |
325 | { |
326 | struct platform_device *pdev; | |
830d843b | 327 | struct resource *res; |
5d4f77ff SM |
328 | |
329 | if (controller < 1 || controller > 4) | |
330 | return -EINVAL; | |
331 | ||
332 | pdev = msm_sdcc_devices[controller-1]; | |
333 | pdev->dev.platform_data = plat; | |
830d843b DZ |
334 | |
335 | res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq"); | |
336 | if (!res) | |
337 | return -EINVAL; | |
338 | else if (stat_irq) { | |
339 | res->start = res->end = stat_irq; | |
340 | res->flags &= ~IORESOURCE_DISABLED; | |
341 | res->flags |= stat_irq_flags; | |
342 | } | |
343 | ||
5d4f77ff SM |
344 | return platform_device_register(pdev); |
345 | } | |
346 |