[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-msm / include / mach / clk.h

/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */
#ifndef __MACH_CLK_H
#define __MACH_CLK_H

/* Magic rate value for use with PM QOS to request the board's maximum
 * supported AXI rate. PM QOS will only pass positive s32 rate values
 * through to the clock driver, so INT_MAX is used.
 */
#define MSM_AXI_MAX_FREQ	LONG_MAX

enum clk_reset_action {
	CLK_RESET_DEASSERT	= 0,
	CLK_RESET_ASSERT	= 1
};

struct clk;

/* Assert/Deassert reset to a hardware block associated with a clock */
int clk_reset(struct clk *clk, enum clk_reset_action action);

#endif
Commit	Line	Data
5e96da5d DW	1	/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
5e96da5d DW	2	*
3162aa2f DB	3	* This program is free software; you can redistribute it and/or modify
	4	* it under the terms of the GNU General Public License version 2 and
	5	* only version 2 as published by the Free Software Foundation.
5e96da5d	6	*
3162aa2f DB	7	* This program is distributed in the hope that it will be useful,
	8	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	9	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	10	* GNU General Public License for more details.
5e96da5d DW	11	*/
	12	#ifndef __MACH_CLK_H
	13	#define __MACH_CLK_H
	14
	15	/* Magic rate value for use with PM QOS to request the board's maximum
	16	* supported AXI rate. PM QOS will only pass positive s32 rate values
	17	* through to the clock driver, so INT_MAX is used.
	18	*/
	19	#define MSM_AXI_MAX_FREQ LONG_MAX
	20
	21	enum clk_reset_action {
	22	CLK_RESET_DEASSERT = 0,
	23	CLK_RESET_ASSERT = 1
	24	};
	25
	26	struct clk;
	27
5e96da5d DW	28	/* Assert/Deassert reset to a hardware block associated with a clock */
	29	int clk_reset(struct clk *clk, enum clk_reset_action action);
	30
5e96da5d	31	#endif