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1 | /* Copyright (c) 2010, Code Aurora Forum. All rights reserved. |
2 | * | |
3 | * This program is free software; you can redistribute it and/or modify | |
4 | * it under the terms of the GNU General Public License version 2 and | |
5 | * only version 2 as published by the Free Software Foundation. | |
6 | * | |
7 | * This program is distributed in the hope that it will be useful, | |
8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
10 | * GNU General Public License for more details. | |
11 | * | |
12 | * You should have received a copy of the GNU General Public License | |
13 | * along with this program; if not, write to the Free Software | |
14 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
15 | * 02110-1301, USA. | |
16 | */ | |
17 | ||
18 | #ifndef MSM_IOMMU_H | |
19 | #define MSM_IOMMU_H | |
20 | ||
21 | #include <linux/interrupt.h> | |
22 | ||
23 | /* Maximum number of Machine IDs that we are allowing to be mapped to the same | |
24 | * context bank. The number of MIDs mapped to the same CB does not affect | |
25 | * performance, but there is a practical limit on how many distinct MIDs may | |
26 | * be present. These mappings are typically determined at design time and are | |
27 | * not expected to change at run time. | |
28 | */ | |
29 | #define MAX_NUM_MIDS 16 | |
30 | ||
31 | /** | |
32 | * struct msm_iommu_dev - a single IOMMU hardware instance | |
33 | * name Human-readable name given to this IOMMU HW instance | |
34 | * clk_rate Rate to set for this IOMMU's clock, if applicable to this | |
35 | * particular IOMMU. 0 means don't set a rate. | |
36 | * -1 means it is an AXI clock with no valid rate | |
37 | * | |
38 | */ | |
39 | struct msm_iommu_dev { | |
40 | const char *name; | |
41 | int clk_rate; | |
42 | }; | |
43 | ||
44 | /** | |
45 | * struct msm_iommu_ctx_dev - an IOMMU context bank instance | |
46 | * name Human-readable name given to this context bank | |
47 | * num Index of this context bank within the hardware | |
48 | * mids List of Machine IDs that are to be mapped into this context | |
49 | * bank, terminated by -1. The MID is a set of signals on the | |
50 | * AXI bus that identifies the function associated with a specific | |
51 | * memory request. (See ARM spec). | |
52 | */ | |
53 | struct msm_iommu_ctx_dev { | |
54 | const char *name; | |
55 | int num; | |
56 | int mids[MAX_NUM_MIDS]; | |
57 | }; | |
58 | ||
59 | ||
60 | /** | |
61 | * struct msm_iommu_drvdata - A single IOMMU hardware instance | |
62 | * @base: IOMMU config port base address (VA) | |
63 | * @irq: Interrupt number | |
64 | * | |
65 | * A msm_iommu_drvdata holds the global driver data about a single piece | |
66 | * of an IOMMU hardware instance. | |
67 | */ | |
68 | struct msm_iommu_drvdata { | |
69 | void __iomem *base; | |
70 | int irq; | |
71 | }; | |
72 | ||
73 | /** | |
74 | * struct msm_iommu_ctx_drvdata - an IOMMU context bank instance | |
75 | * @num: Hardware context number of this context | |
76 | * @pdev: Platform device associated wit this HW instance | |
77 | * @attached_elm: List element for domains to track which devices are | |
78 | * attached to them | |
79 | * | |
80 | * A msm_iommu_ctx_drvdata holds the driver data for a single context bank | |
81 | * within each IOMMU hardware instance | |
82 | */ | |
83 | struct msm_iommu_ctx_drvdata { | |
84 | int num; | |
85 | struct platform_device *pdev; | |
86 | struct list_head attached_elm; | |
87 | }; | |
88 | ||
89 | /* | |
90 | * Look up an IOMMU context device by its context name. NULL if none found. | |
91 | * Useful for testing and drivers that do not yet fully have IOMMU stuff in | |
92 | * their platform devices. | |
93 | */ | |
94 | struct device *msm_iommu_get_ctx(const char *ctx_name); | |
95 | ||
96 | /* | |
97 | * Interrupt handler for the IOMMU context fault interrupt. Hooking the | |
98 | * interrupt is not supported in the API yet, but this will print an error | |
99 | * message and dump useful IOMMU registers. | |
100 | */ | |
101 | irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id); | |
102 | ||
103 | #endif |