[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-mvebu / board-v7.c

/*
 * Device Tree support for Armada 370 and XP platforms.
 *
 * Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/clk-provider.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/io.h>
#include <linux/clocksource.h>
#include <linux/dma-mapping.h>
#include <linux/mbus.h>
#include <linux/signal.h>
#include <linux/slab.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/smp_scu.h>
#include "armada-370-xp.h"
#include "common.h"
#include "coherency.h"
#include "mvebu-soc-id.h"

/*
 * Enables the SCU when available. Obviously, this is only useful on
 * Cortex-A based SOCs, not on PJ4B based ones.
 */
static void __init mvebu_scu_enable(void)
{
	void __iomem *scu_base;

	struct device_node *np =
		of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
	if (np) {
		scu_base = of_iomap(np, 0);
		scu_enable(scu_base);
		of_node_put(np);
	}
}

/*
 * Early versions of Armada 375 SoC have a bug where the BootROM
 * leaves an external data abort pending. The kernel is hit by this
 * data abort as soon as it enters userspace, because it unmasks the
 * data aborts at this moment. We register a custom abort handler
 * below to ignore the first data abort to work around this
 * problem.
 */
static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
					struct pt_regs *regs)
{
	static int ignore_first;

	if (!ignore_first && fsr == 0x1406) {
		ignore_first = 1;
		return 0;
	}

	return 1;
}

static void __init mvebu_timer_and_clk_init(void)
{
	of_clk_init(NULL);
	clocksource_of_init();
	mvebu_scu_enable();
	coherency_init();
	BUG_ON(mvebu_mbus_dt_init(coherency_available()));
	l2x0_of_init(0, ~0UL);

	if (of_machine_is_compatible("marvell,armada375"))
		hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
				"imprecise external abort");
}

static void __init i2c_quirk(void)
{
	struct device_node *np;
	u32 dev, rev;

	/*
	 * Only revisons more recent than A0 support the offload
	 * mechanism. We can exit only if we are sure that we can
	 * get the SoC revision and it is more recent than A0.
	 */
	if (mvebu_get_soc_id(&rev, &dev) == 0 && dev > MV78XX0_A0_REV)
		return;

	for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") {
		struct property *new_compat;

		new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL);

		new_compat->name = kstrdup("compatible", GFP_KERNEL);
		new_compat->length = sizeof("marvell,mv78230-a0-i2c");
		new_compat->value = kstrdup("marvell,mv78230-a0-i2c",
						GFP_KERNEL);

		of_update_property(np, new_compat);
	}
	return;
}

static void __init mvebu_dt_init(void)
{
	if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
		i2c_quirk();
	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

static const char * const armada_370_xp_dt_compat[] = {
	"marvell,armada-370-xp",
	NULL,
};

DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
	.smp		= smp_ops(armada_xp_smp_ops),
	.init_machine	= mvebu_dt_init,
	.init_time	= mvebu_timer_and_clk_init,
	.restart	= mvebu_restart,
	.dt_compat	= armada_370_xp_dt_compat,
MACHINE_END

static const char * const armada_375_dt_compat[] = {
	"marvell,armada375",
	NULL,
};

DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
	.init_time	= mvebu_timer_and_clk_init,
	.restart	= mvebu_restart,
	.dt_compat	= armada_375_dt_compat,
MACHINE_END

static const char * const armada_38x_dt_compat[] = {
	"marvell,armada380",
	"marvell,armada385",
	NULL,
};

DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
	.init_time	= mvebu_timer_and_clk_init,
	.restart	= mvebu_restart,
	.dt_compat	= armada_38x_dt_compat,
MACHINE_END
Commit	Line	Data
9ae6f740 TP	1	/*
	2	* Device Tree support for Armada 370 and XP platforms.
	3	*
	4	* Copyright (C) 2012 Marvell
	5	*
	6	* Lior Amsalem <alior@marvell.com>
	7	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	8	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	9	*
	10	* This file is licensed under the terms of the GNU General Public
	11	* License version 2. This program is licensed "as is" without any
	12	* warranty of any kind, whether express or implied.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
9cbbc515	17	#include <linux/clk-provider.h>
d834d26a	18	#include <linux/of_address.h>
9ae6f740 TP	19	#include <linux/of_platform.h>
9ae6f740 TP	20	#include <linux/io.h>
573145f0	21	#include <linux/clocksource.h>
53d2f889	22	#include <linux/dma-mapping.h>
87e1bed4	23	#include <linux/mbus.h>
9e128041	24	#include <linux/signal.h>
85e618a1	25	#include <linux/slab.h>
e33369cb	26	#include <asm/hardware/cache-l2x0.h>
9ae6f740 TP	27	#include <asm/mach/arch.h>
	28	#include <asm/mach/map.h>
	29	#include <asm/mach/time.h>
8e6ac203	30	#include <asm/smp_scu.h>
6eb5be34	31	#include "armada-370-xp.h"
9ae6f740	32	#include "common.h"
45f5984a	33	#include "coherency.h"
85e618a1	34	#include "mvebu-soc-id.h"
9ae6f740	35
8e6ac203 TP	36	/*
	37	* Enables the SCU when available. Obviously, this is only useful on
	38	* Cortex-A based SOCs, not on PJ4B based ones.
	39	*/
	40	static void __init mvebu_scu_enable(void)
	41	{
	42	void __iomem *scu_base;
	43
	44	struct device_node *np =
	45	of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
	46	if (np) {
	47	scu_base = of_iomap(np, 0);
	48	scu_enable(scu_base);
	49	of_node_put(np);
	50	}
	51	}
	52
ca4a6f87 TP	53	/*
	54	* Early versions of Armada 375 SoC have a bug where the BootROM
	55	* leaves an external data abort pending. The kernel is hit by this
	56	* data abort as soon as it enters userspace, because it unmasks the
	57	* data aborts at this moment. We register a custom abort handler
	58	* below to ignore the first data abort to work around this
	59	* problem.
	60	*/
	61	static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
	62	struct pt_regs *regs)
	63	{
	64	static int ignore_first;
	65
	66	if (!ignore_first && fsr == 0x1406) {
	67	ignore_first = 1;
	68	return 0;
	69	}
	70
	71	return 1;
	72	}
	73
99b3d294	74	static void __init mvebu_timer_and_clk_init(void)
d834d26a	75	{
5ae13ef4	76	of_clk_init(NULL);
573145f0	77	clocksource_of_init();
8e6ac203	78	mvebu_scu_enable();
d834d26a	79	coherency_init();
5686a1e5	80	BUG_ON(mvebu_mbus_dt_init(coherency_available()));
e33369cb	81	l2x0_of_init(0, ~0UL);
ca4a6f87 TP	82
	83	if (of_machine_is_compatible("marvell,armada375"))
	84	hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
	85	"imprecise external abort");
53d2f889 GC	86	}
53d2f889 GC	87
85e618a1 GC	88	static void __init i2c_quirk(void)
	89	{
	90	struct device_node *np;
	91	u32 dev, rev;
	92
	93	/*
	94	* Only revisons more recent than A0 support the offload
	95	* mechanism. We can exit only if we are sure that we can
	96	* get the SoC revision and it is more recent than A0.
	97	*/
	98	if (mvebu_get_soc_id(&rev, &dev) == 0 && dev > MV78XX0_A0_REV)
	99	return;
	100
	101	for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") {
	102	struct property *new_compat;
	103
	104	new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL);
	105
	106	new_compat->name = kstrdup("compatible", GFP_KERNEL);
	107	new_compat->length = sizeof("marvell,mv78230-a0-i2c");
	108	new_compat->value = kstrdup("marvell,mv78230-a0-i2c",
	109	GFP_KERNEL);
	110
	111	of_update_property(np, new_compat);
	112	}
	113	return;
	114	}
	115
99b3d294	116	static void __init mvebu_dt_init(void)
9ae6f740	117	{
85e618a1 GC	118	if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
85e618a1 GC	119	i2c_quirk();
9ae6f740 TP	120	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
	121	}
	122
61505e11 TP	123	static const char * const armada_370_xp_dt_compat[] = {
61505e11 TP	124	"marvell,armada-370-xp",
9ae6f740 TP	125	NULL,
	126	};
	127
a017dbb6	128	DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
45f5984a	129	.smp = smp_ops(armada_xp_smp_ops),
99b3d294 TP	130	.init_machine = mvebu_dt_init,
99b3d294 TP	131	.init_time = mvebu_timer_and_clk_init,
9ae6f740	132	.restart = mvebu_restart,
61505e11	133	.dt_compat = armada_370_xp_dt_compat,
9ae6f740	134	MACHINE_END
d3ce7f25 GC	135
	136	static const char * const armada_375_dt_compat[] = {
	137	"marvell,armada375",
	138	NULL,
	139	};
	140
	141	DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
	142	.init_time = mvebu_timer_and_clk_init,
	143	.restart = mvebu_restart,
	144	.dt_compat = armada_375_dt_compat,
	145	MACHINE_END
9aa30f1c TP	146
	147	static const char * const armada_38x_dt_compat[] = {
	148	"marvell,armada380",
	149	"marvell,armada385",
	150	NULL,
	151	};
	152
	153	DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
	154	.init_time = mvebu_timer_and_clk_init,
	155	.restart = mvebu_restart,
	156	.dt_compat = armada_38x_dt_compat,
	157	MACHINE_END