[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-mvebu / platsmp.c

/*
 * Symmetric Multi Processing (SMP) support for Armada XP
 *
 * Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Yehuda Yitschak <yehuday@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
 * This file implements the routines for preparing the SMP infrastructure
 * and waking up the secondary CPUs
 */

#include <linux/init.h>
#include <linux/smp.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/mbus.h>
#include <asm/cacheflush.h>
#include <asm/smp_plat.h>
#include "common.h"
#include "armada-370-xp.h"
#include "pmsu.h"
#include "coherency.h"

#define ARMADA_XP_MAX_CPUS 4

#define AXP_BOOTROM_BASE 0xfff00000
#define AXP_BOOTROM_SIZE 0x100000

static struct clk *get_cpu_clk(int cpu)
{
	struct clk *cpu_clk;
	struct device_node *np = of_get_cpu_node(cpu, NULL);

	if (WARN(!np, "missing cpu node\n"))
		return NULL;
	cpu_clk = of_clk_get(np, 0);
	if (WARN_ON(IS_ERR(cpu_clk)))
		return NULL;
	return cpu_clk;
}

static void set_secondary_cpu_clock(unsigned int cpu)
{
	int thiscpu;
	unsigned long rate;
	struct clk *cpu_clk;

	thiscpu = get_cpu();

	cpu_clk = get_cpu_clk(thiscpu);
	if (!cpu_clk)
		goto out;
	clk_prepare_enable(cpu_clk);
	rate = clk_get_rate(cpu_clk);

	cpu_clk = get_cpu_clk(cpu);
	if (!cpu_clk)
		goto out;
	clk_set_rate(cpu_clk, rate);
	clk_prepare_enable(cpu_clk);

out:
	put_cpu();
}

static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
	int ret, hw_cpu;

	pr_info("Booting CPU %d\n", cpu);

	hw_cpu = cpu_logical_map(cpu);
	set_secondary_cpu_clock(hw_cpu);
	mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);

	/*
	 * This is needed to wake up CPUs in the offline state after
	 * using CPU hotplug.
	 */
	arch_send_wakeup_ipi_mask(cpumask_of(cpu));

	/*
	 * This is needed to take secondary CPUs out of reset on the
	 * initial boot.
	 */
	ret = mvebu_cpu_reset_deassert(hw_cpu);
	if (ret) {
		pr_warn("unable to boot CPU: %d\n", ret);
		return ret;
	}

	return 0;
}

/*
 * When a CPU is brought back online, either through CPU hotplug, or
 * because of the boot of a kexec'ed kernel, the PMSU configuration
 * for this CPU might be in the deep idle state, preventing this CPU
 * from receiving interrupts. Here, we therefore take out the current
 * CPU from this state, which was entered by armada_xp_cpu_die()
 * below.
 */
static void armada_xp_secondary_init(unsigned int cpu)
{
	mvebu_v7_pmsu_idle_exit();
}

static void __init armada_xp_smp_init_cpus(void)
{
	unsigned int ncores = num_possible_cpus();

	if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS)
		panic("Invalid number of CPUs in DT\n");
}

static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
{
	struct device_node *node;
	struct resource res;
	int err;

	flush_cache_all();
	set_cpu_coherent();

	/*
	 * In order to boot the secondary CPUs we need to ensure
	 * the bootROM is mapped at the correct address.
	 */
	node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
	if (!node)
		panic("Cannot find 'marvell,bootrom' compatible node");

	err = of_address_to_resource(node, 0, &res);
	of_node_put(node);
	if (err < 0)
		panic("Cannot get 'bootrom' node address");

	if (res.start != AXP_BOOTROM_BASE ||
	    resource_size(&res) != AXP_BOOTROM_SIZE)
		panic("The address for the BootROM is incorrect");
}

#ifdef CONFIG_HOTPLUG_CPU
static void armada_xp_cpu_die(unsigned int cpu)
{
	/*
	 * CPU hotplug is implemented by putting offline CPUs into the
	 * deep idle sleep state.
	 */
	armada_370_xp_pmsu_idle_enter(true);
}

/*
 * We need a dummy function, so that platform_can_cpu_hotplug() knows
 * we support CPU hotplug. However, the function does not need to do
 * anything, because CPUs going offline can enter the deep idle state
 * by themselves, without any help from a still alive CPU.
 */
static int armada_xp_cpu_kill(unsigned int cpu)
{
	return 1;
}
#endif

const struct smp_operations armada_xp_smp_ops __initconst = {
	.smp_init_cpus		= armada_xp_smp_init_cpus,
	.smp_prepare_cpus	= armada_xp_smp_prepare_cpus,
	.smp_boot_secondary	= armada_xp_boot_secondary,
	.smp_secondary_init     = armada_xp_secondary_init,
#ifdef CONFIG_HOTPLUG_CPU
	.cpu_die		= armada_xp_cpu_die,
	.cpu_kill               = armada_xp_cpu_kill,
#endif
};

CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
		      &armada_xp_smp_ops);

#define MV98DX3236_CPU_RESUME_CTRL_REG 0x08
#define MV98DX3236_CPU_RESUME_ADDR_REG 0x04

static const struct of_device_id of_mv98dx3236_resume_table[] = {
	{
		.compatible = "marvell,98dx3336-resume-ctrl",
	},
	{ /* end of list */ },
};

static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
{
	struct device_node *np;
	void __iomem *base;
	WARN_ON(hw_cpu != 1);

	np = of_find_matching_node(NULL, of_mv98dx3236_resume_table);
	if (!np)
		return -ENODEV;

	base = of_io_request_and_map(np, 0, of_node_full_name(np));
	of_node_put(np);
	if (IS_ERR(base))
		return PTR_ERR(base);

	writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG);
	writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);

	iounmap(base);

	return 0;
}

static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
	int ret, hw_cpu;

	hw_cpu = cpu_logical_map(cpu);
	set_secondary_cpu_clock(hw_cpu);
	mv98dx3236_resume_set_cpu_boot_addr(hw_cpu,
					    armada_xp_secondary_startup);

	/*
	 * This is needed to wake up CPUs in the offline state after
	 * using CPU hotplug.
	 */
	arch_send_wakeup_ipi_mask(cpumask_of(cpu));

	/*
	 * This is needed to take secondary CPUs out of reset on the
	 * initial boot.
	 */
	ret = mvebu_cpu_reset_deassert(hw_cpu);
	if (ret) {
		pr_warn("unable to boot CPU: %d\n", ret);
		return ret;
	}

	return 0;
}

static const struct smp_operations mv98dx3236_smp_ops __initconst = {
	.smp_init_cpus		= armada_xp_smp_init_cpus,
	.smp_prepare_cpus	= armada_xp_smp_prepare_cpus,
	.smp_boot_secondary	= mv98dx3236_boot_secondary,
	.smp_secondary_init     = armada_xp_secondary_init,
#ifdef CONFIG_HOTPLUG_CPU
	.cpu_die		= armada_xp_cpu_die,
	.cpu_kill               = armada_xp_cpu_kill,
#endif
};

CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
		      &mv98dx3236_smp_ops);
Commit	Line	Data
45f5984a GC	1	/*
	2	* Symmetric Multi Processing (SMP) support for Armada XP
	3	*
	4	* Copyright (C) 2012 Marvell
	5	*
	6	* Lior Amsalem <alior@marvell.com>
	7	* Yehuda Yitschak <yehuday@marvell.com>
	8	* Gregory CLEMENT <gregory.clement@free-electrons.com>
	9	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	10	*
	11	* This file is licensed under the terms of the GNU General Public
	12	* License version 2. This program is licensed "as is" without any
	13	* warranty of any kind, whether express or implied.
	14	*
	15	* The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency
	16	* This file implements the routines for preparing the SMP infrastructure
	17	* and waking up the secondary CPUs
	18	*/
	19
	20	#include <linux/init.h>
	21	#include <linux/smp.h>
	22	#include <linux/clk.h>
	23	#include <linux/of.h>
994c8c94	24	#include <linux/of_address.h>
87e1bed4	25	#include <linux/mbus.h>
45f5984a GC	26	#include <asm/cacheflush.h>
	27	#include <asm/smp_plat.h>
	28	#include "common.h"
	29	#include "armada-370-xp.h"
	30	#include "pmsu.h"
	31	#include "coherency.h"
	32
316fbbc4 GC	33	#define ARMADA_XP_MAX_CPUS 4
316fbbc4 GC	34
994c8c94 EG	35	#define AXP_BOOTROM_BASE 0xfff00000
	36	#define AXP_BOOTROM_SIZE 0x100000
	37
b9b1de0f	38	static struct clk *get_cpu_clk(int cpu)
f6cec7cd SH	39	{
	40	struct clk *cpu_clk;
	41	struct device_node *np = of_get_cpu_node(cpu, NULL);
	42
	43	if (WARN(!np, "missing cpu node\n"))
	44	return NULL;
	45	cpu_clk = of_clk_get(np, 0);
	46	if (WARN_ON(IS_ERR(cpu_clk)))
	47	return NULL;
	48	return cpu_clk;
	49	}
	50
b9b1de0f	51	static void set_secondary_cpu_clock(unsigned int cpu)
45f5984a	52	{
b9b1de0f	53	int thiscpu;
45f5984a	54	unsigned long rate;
f6cec7cd	55	struct clk *cpu_clk;
45f5984a	56
b9b1de0f TP	57	thiscpu = get_cpu();
b9b1de0f TP	58
f6cec7cd SH	59	cpu_clk = get_cpu_clk(thiscpu);
f6cec7cd SH	60	if (!cpu_clk)
b9b1de0f	61	goto out;
45f5984a GC	62	clk_prepare_enable(cpu_clk);
	63	rate = clk_get_rate(cpu_clk);
	64
b9b1de0f TP	65	cpu_clk = get_cpu_clk(cpu);
	66	if (!cpu_clk)
	67	goto out;
	68	clk_set_rate(cpu_clk, rate);
	69	clk_prepare_enable(cpu_clk);
	70
	71	out:
	72	put_cpu();
45f5984a GC	73	}
45f5984a GC	74
8bd26e3a	75	static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
45f5984a	76	{
05ad6906 TP	77	int ret, hw_cpu;
05ad6906 TP	78
45f5984a GC	79	pr_info("Booting CPU %d\n", cpu);
45f5984a GC	80
05ad6906	81	hw_cpu = cpu_logical_map(cpu);
b9b1de0f	82	set_secondary_cpu_clock(hw_cpu);
05ad6906	83	mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup);
26337779 TP	84
	85	/*
	86	* This is needed to wake up CPUs in the offline state after
	87	* using CPU hotplug.
	88	*/
	89	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
	90
	91	/*
	92	* This is needed to take secondary CPUs out of reset on the
	93	* initial boot.
	94	*/
05ad6906 TP	95	ret = mvebu_cpu_reset_deassert(hw_cpu);
	96	if (ret) {
	97	pr_warn("unable to boot CPU: %d\n", ret);
	98	return ret;
	99	}
45f5984a GC	100
	101	return 0;
	102	}
	103
26337779 TP	104	/*
	105	* When a CPU is brought back online, either through CPU hotplug, or
	106	* because of the boot of a kexec'ed kernel, the PMSU configuration
	107	* for this CPU might be in the deep idle state, preventing this CPU
	108	* from receiving interrupts. Here, we therefore take out the current
	109	* CPU from this state, which was entered by armada_xp_cpu_die()
	110	* below.
	111	*/
	112	static void armada_xp_secondary_init(unsigned int cpu)
	113	{
898ef3e9	114	mvebu_v7_pmsu_idle_exit();
26337779 TP	115	}
26337779 TP	116
45f5984a GC	117	static void __init armada_xp_smp_init_cpus(void)
45f5984a GC	118	{
a7160b7e	119	unsigned int ncores = num_possible_cpus();
b21dcafe	120
b21dcafe TP	121	if (ncores == 0 \|\| ncores > ARMADA_XP_MAX_CPUS)
b21dcafe TP	122	panic("Invalid number of CPUs in DT\n");
45f5984a GC	123	}
45f5984a GC	124
b12634e3	125	static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus)
45f5984a	126	{
994c8c94 EG	127	struct device_node *node;
	128	struct resource res;
	129	int err;
	130
45f5984a	131	flush_cache_all();
952f4ca7	132	set_cpu_coherent();
994c8c94 EG	133
	134	/*
	135	* In order to boot the secondary CPUs we need to ensure
	136	* the bootROM is mapped at the correct address.
	137	*/
	138	node = of_find_compatible_node(NULL, NULL, "marvell,bootrom");
	139	if (!node)
	140	panic("Cannot find 'marvell,bootrom' compatible node");
	141
	142	err = of_address_to_resource(node, 0, &res);
7d8f9ac1	143	of_node_put(node);
994c8c94 EG	144	if (err < 0)
	145	panic("Cannot get 'bootrom' node address");
	146
	147	if (res.start != AXP_BOOTROM_BASE \|\|
	148	resource_size(&res) != AXP_BOOTROM_SIZE)
	149	panic("The address for the BootROM is incorrect");
45f5984a GC	150	}
45f5984a GC	151
26337779 TP	152	#ifdef CONFIG_HOTPLUG_CPU
	153	static void armada_xp_cpu_die(unsigned int cpu)
	154	{
	155	/*
	156	* CPU hotplug is implemented by putting offline CPUs into the
	157	* deep idle sleep state.
	158	*/
	159	armada_370_xp_pmsu_idle_enter(true);
	160	}
	161
	162	/*
	163	* We need a dummy function, so that platform_can_cpu_hotplug() knows
	164	* we support CPU hotplug. However, the function does not need to do
	165	* anything, because CPUs going offline can enter the deep idle state
	166	* by themselves, without any help from a still alive CPU.
	167	*/
	168	static int armada_xp_cpu_kill(unsigned int cpu)
	169	{
	170	return 1;
	171	}
	172	#endif
	173
75305275	174	const struct smp_operations armada_xp_smp_ops __initconst = {
45f5984a GC	175	.smp_init_cpus = armada_xp_smp_init_cpus,
45f5984a GC	176	.smp_prepare_cpus = armada_xp_smp_prepare_cpus,
45f5984a	177	.smp_boot_secondary = armada_xp_boot_secondary,
26337779	178	.smp_secondary_init = armada_xp_secondary_init,
45f5984a GC	179	#ifdef CONFIG_HOTPLUG_CPU
45f5984a GC	180	.cpu_die = armada_xp_cpu_die,
26337779	181	.cpu_kill = armada_xp_cpu_kill,
45f5984a GC	182	#endif
45f5984a GC	183	};
2c9b2240 TP	184
	185	CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp",
	186	&armada_xp_smp_ops);
db889778 CP	187
	188	#define MV98DX3236_CPU_RESUME_CTRL_REG 0x08
	189	#define MV98DX3236_CPU_RESUME_ADDR_REG 0x04
	190
	191	static const struct of_device_id of_mv98dx3236_resume_table[] = {
	192	{
	193	.compatible = "marvell,98dx3336-resume-ctrl",
	194	},
	195	{ /* end of list */ },
	196	};
	197
	198	static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
	199	{
	200	struct device_node *np;
	201	void __iomem *base;
	202	WARN_ON(hw_cpu != 1);
	203
	204	np = of_find_matching_node(NULL, of_mv98dx3236_resume_table);
	205	if (!np)
	206	return -ENODEV;
	207
	208	base = of_io_request_and_map(np, 0, of_node_full_name(np));
	209	of_node_put(np);
	210	if (IS_ERR(base))
	211	return PTR_ERR(base);
	212
	213	writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG);
76127d6f	214	writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
db889778 CP	215
	216	iounmap(base);
	217
	218	return 0;
	219	}
	220
	221	static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle)
	222	{
	223	int ret, hw_cpu;
	224
	225	hw_cpu = cpu_logical_map(cpu);
	226	set_secondary_cpu_clock(hw_cpu);
	227	mv98dx3236_resume_set_cpu_boot_addr(hw_cpu,
	228	armada_xp_secondary_startup);
	229
	230	/*
	231	* This is needed to wake up CPUs in the offline state after
	232	* using CPU hotplug.
	233	*/
	234	arch_send_wakeup_ipi_mask(cpumask_of(cpu));
	235
	236	/*
	237	* This is needed to take secondary CPUs out of reset on the
	238	* initial boot.
	239	*/
	240	ret = mvebu_cpu_reset_deassert(hw_cpu);
	241	if (ret) {
	242	pr_warn("unable to boot CPU: %d\n", ret);
	243	return ret;
	244	}
	245
	246	return 0;
	247	}
	248
	249	static const struct smp_operations mv98dx3236_smp_ops __initconst = {
	250	.smp_init_cpus = armada_xp_smp_init_cpus,
	251	.smp_prepare_cpus = armada_xp_smp_prepare_cpus,
	252	.smp_boot_secondary = mv98dx3236_boot_secondary,
	253	.smp_secondary_init = armada_xp_secondary_init,
	254	#ifdef CONFIG_HOTPLUG_CPU
	255	.cpu_die = armada_xp_cpu_die,
	256	.cpu_kill = armada_xp_cpu_kill,
	257	#endif
	258	};
	259
	260	CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp",
	261	&mv98dx3236_smp_ops);