[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-mvebu / pmsu.c

/*
 * Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
 *
 * Copyright (C) 2012 Marvell
 *
 * Yehuda Yitschak <yehuday@marvell.com>
 * Gregory Clement <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * The Armada 370 and Armada XP SOCs have a power management service
 * unit which is responsible for powering down and waking up CPUs and
 * other SOC units
 */

#define pr_fmt(fmt) "mvebu-pmsu: " fmt

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/of_address.h>
#include <linux/io.h>
#include <linux/smp.h>
#include <linux/resource.h>
#include <asm/smp_plat.h>
#include "common.h"
#include "pmsu.h"

static void __iomem *pmsu_mp_base;

#define PMSU_BASE_OFFSET    0x100
#define PMSU_REG_SIZE	    0x1000

/* PMSU MP registers */
#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)

/* PMSU fabric registers */
#define L2C_NFABRIC_PM_CTL		    0x4
#define L2C_NFABRIC_PM_CTL_PWR_DOWN		BIT(20)

static struct of_device_id of_pmsu_table[] = {
	{ .compatible = "marvell,armada-370-pmsu", },
	{ .compatible = "marvell,armada-370-xp-pmsu", },
	{ .compatible = "marvell,armada-380-pmsu", },
	{ /* end of list */ },
};

void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
{
	writel(virt_to_phys(boot_addr), pmsu_mp_base +
		PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
}

static int __init armada_370_xp_pmsu_init(void)
{
	struct device_node *np;
	struct resource res;
	int ret = 0;

	np = of_find_matching_node(NULL, of_pmsu_table);
	if (!np)
		return 0;

	pr_info("Initializing Power Management Service Unit\n");

	if (of_address_to_resource(np, 0, &res)) {
		pr_err("unable to get resource\n");
		ret = -ENOENT;
		goto out;
	}

	if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) {
		pr_warn(FW_WARN "deprecated pmsu binding\n");
		res.start = res.start - PMSU_BASE_OFFSET;
		res.end = res.start + PMSU_REG_SIZE - 1;
	}

	if (!request_mem_region(res.start, resource_size(&res),
				np->full_name)) {
		pr_err("unable to request region\n");
		ret = -EBUSY;
		goto out;
	}

	pmsu_mp_base = ioremap(res.start, resource_size(&res));
	if (!pmsu_mp_base) {
		pr_err("unable to map registers\n");
		release_mem_region(res.start, resource_size(&res));
		ret = -ENOMEM;
		goto out;
	}

 out:
	of_node_put(np);
	return ret;
}

static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
{
	u32 reg;

	if (pmsu_mp_base == NULL)
		return;

	/* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
	reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
	reg |= L2C_NFABRIC_PM_CTL_PWR_DOWN;
	writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
}

early_initcall(armada_370_xp_pmsu_init);
Commit	Line	Data
7444dad2 GC	1	/*
	2	* Power Management Service Unit(PMSU) support for Armada 370/XP platforms.
	3	*
	4	* Copyright (C) 2012 Marvell
	5	*
	6	* Yehuda Yitschak <yehuday@marvell.com>
	7	* Gregory Clement <gregory.clement@free-electrons.com>
	8	* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
	9	*
	10	* This file is licensed under the terms of the GNU General Public
	11	* License version 2. This program is licensed "as is" without any
	12	* warranty of any kind, whether express or implied.
	13	*
	14	* The Armada 370 and Armada XP SOCs have a power management service
	15	* unit which is responsible for powering down and waking up CPUs and
	16	* other SOC units
	17	*/
	18
bd045a1e TP	19	#define pr_fmt(fmt) "mvebu-pmsu: " fmt
bd045a1e TP	20
7444dad2 GC	21	#include <linux/kernel.h>
	22	#include <linux/init.h>
	23	#include <linux/of_address.h>
	24	#include <linux/io.h>
	25	#include <linux/smp.h>
49754ffe	26	#include <linux/resource.h>
7444dad2	27	#include <asm/smp_plat.h>
49754ffe	28	#include "common.h"
b12634e3	29	#include "pmsu.h"
7444dad2 GC	30
7444dad2 GC	31	static void __iomem *pmsu_mp_base;
7444dad2	32
0c3acc74 GC	33	#define PMSU_BASE_OFFSET 0x100
	34	#define PMSU_REG_SIZE 0x1000
	35
f713c7e7 GC	36	/* PMSU MP registers */
	37	#define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124)
	38
	39	/* PMSU fabric registers */
	40	#define L2C_NFABRIC_PM_CTL 0x4
	41	#define L2C_NFABRIC_PM_CTL_PWR_DOWN BIT(20)
7444dad2 GC	42
7444dad2 GC	43	static struct of_device_id of_pmsu_table[] = {
0c3acc74 GC	44	{ .compatible = "marvell,armada-370-pmsu", },
0c3acc74 GC	45	{ .compatible = "marvell,armada-370-xp-pmsu", },
b4bca249	46	{ .compatible = "marvell,armada-380-pmsu", },
7444dad2 GC	47	{ /* end of list */ },
	48	};
	49
05ad6906	50	void mvebu_pmsu_set_cpu_boot_addr(int hw_cpu, void *boot_addr)
02e7b067 GC	51	{
	52	writel(virt_to_phys(boot_addr), pmsu_mp_base +
	53	PMSU_BOOT_ADDR_REDIRECT_OFFSET(hw_cpu));
	54	}
	55
b12634e3	56	static int __init armada_370_xp_pmsu_init(void)
7444dad2 GC	57	{
7444dad2 GC	58	struct device_node *np;
bd045a1e TP	59	struct resource res;
bd045a1e TP	60	int ret = 0;
7444dad2 GC	61
7444dad2 GC	62	np = of_find_matching_node(NULL, of_pmsu_table);
bd045a1e TP	63	if (!np)
	64	return 0;
	65
	66	pr_info("Initializing Power Management Service Unit\n");
	67
	68	if (of_address_to_resource(np, 0, &res)) {
	69	pr_err("unable to get resource\n");
	70	ret = -ENOENT;
	71	goto out;
7444dad2 GC	72	}
7444dad2 GC	73
0c3acc74 GC	74	if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) {
	75	pr_warn(FW_WARN "deprecated pmsu binding\n");
	76	res.start = res.start - PMSU_BASE_OFFSET;
	77	res.end = res.start + PMSU_REG_SIZE - 1;
	78	}
	79
bd045a1e TP	80	if (!request_mem_region(res.start, resource_size(&res),
	81	np->full_name)) {
	82	pr_err("unable to request region\n");
	83	ret = -EBUSY;
	84	goto out;
	85	}
	86
	87	pmsu_mp_base = ioremap(res.start, resource_size(&res));
	88	if (!pmsu_mp_base) {
	89	pr_err("unable to map registers\n");
	90	release_mem_region(res.start, resource_size(&res));
	91	ret = -ENOMEM;
	92	goto out;
	93	}
	94
	95	out:
	96	of_node_put(np);
	97	return ret;
7444dad2 GC	98	}
7444dad2 GC	99
f713c7e7 GC	100	static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
	101	{
	102	u32 reg;
	103
	104	if (pmsu_mp_base == NULL)
	105	return;
	106
	107	/* Enable L2 & Fabric powerdown in Deep-Idle mode - Fabric */
	108	reg = readl(pmsu_mp_base + L2C_NFABRIC_PM_CTL);
	109	reg \|= L2C_NFABRIC_PM_CTL_PWR_DOWN;
	110	writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
	111	}
	112
7444dad2	113	early_initcall(armada_370_xp_pmsu_init);