[mirror_ubuntu-eoan-kernel.git] / arch / arm / mach-mx2 / pcm038.c

/*
 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx1-mx2.h>
#include <asm/mach/time.h>
#include <mach/imx-uart.h>
#include <mach/board-pcm038.h>

#include "devices.h"

/*
 * Phytec's phyCORE-i.MX27 comes with 32MiB flash,
 * 16 bit width
 */
static struct physmap_flash_data pcm038_flash_data = {
	.width = 2,
};

static struct resource pcm038_flash_resource = {
	.start = 0xc0000000,
	.end   = 0xc1ffffff,
	.flags = IORESOURCE_MEM,
};

static struct platform_device pcm038_nor_mtd_device = {
	.name = "physmap-flash",
	.id = 0,
	.dev = {
		.platform_data = &pcm038_flash_data,
	},
	.num_resources = 1,
	.resource = &pcm038_flash_resource,
};

static int mxc_uart0_pins[] = {
	PE12_PF_UART1_TXD,
	PE13_PF_UART1_RXD,
	PE14_PF_UART1_CTS,
	PE15_PF_UART1_RTS
};

static int uart_mxc_port0_init(struct platform_device *pdev)
{
	return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
			ARRAY_SIZE(mxc_uart0_pins), "UART0");
}

static int uart_mxc_port0_exit(struct platform_device *pdev)
{
	mxc_gpio_release_multiple_pins(mxc_uart0_pins,
			ARRAY_SIZE(mxc_uart0_pins));
	return 0;
}

static int mxc_uart1_pins[] = {
	PE3_PF_UART2_CTS,
	PE4_PF_UART2_RTS,
	PE6_PF_UART2_TXD,
	PE7_PF_UART2_RXD
};

static int uart_mxc_port1_init(struct platform_device *pdev)
{
	return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
			ARRAY_SIZE(mxc_uart1_pins), "UART1");
}

static int uart_mxc_port1_exit(struct platform_device *pdev)
{
	mxc_gpio_release_multiple_pins(mxc_uart1_pins,
			ARRAY_SIZE(mxc_uart1_pins));
	return 0;
}

static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
				PE9_PF_UART3_RXD,
				PE10_PF_UART3_CTS,
				PE9_PF_UART3_RXD };

static int uart_mxc_port2_init(struct platform_device *pdev)
{
	return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
			ARRAY_SIZE(mxc_uart2_pins), "UART2");
}

static int uart_mxc_port2_exit(struct platform_device *pdev)
{
	mxc_gpio_release_multiple_pins(mxc_uart2_pins,
			ARRAY_SIZE(mxc_uart2_pins));
	return 0;
}

static struct imxuart_platform_data uart_pdata[] = {
	{
		.init = uart_mxc_port0_init,
		.exit = uart_mxc_port0_exit,
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.init = uart_mxc_port1_init,
		.exit = uart_mxc_port1_exit,
		.flags = IMXUART_HAVE_RTSCTS,
	}, {
		.init = uart_mxc_port2_init,
		.exit = uart_mxc_port2_exit,
		.flags = IMXUART_HAVE_RTSCTS,
	},
};

static int mxc_fec_pins[] = {
	PD0_AIN_FEC_TXD0,
	PD1_AIN_FEC_TXD1,
	PD2_AIN_FEC_TXD2,
	PD3_AIN_FEC_TXD3,
	PD4_AOUT_FEC_RX_ER,
	PD5_AOUT_FEC_RXD1,
	PD6_AOUT_FEC_RXD2,
	PD7_AOUT_FEC_RXD3,
	PD8_AF_FEC_MDIO,
	PD9_AIN_FEC_MDC,
	PD10_AOUT_FEC_CRS,
	PD11_AOUT_FEC_TX_CLK,
	PD12_AOUT_FEC_RXD0,
	PD13_AOUT_FEC_RX_DV,
	PD14_AOUT_FEC_CLR,
	PD15_AOUT_FEC_COL,
	PD16_AIN_FEC_TX_ER,
	PF23_AIN_FEC_TX_EN
};

static void gpio_fec_active(void)
{
	mxc_gpio_setup_multiple_pins(mxc_fec_pins,
			ARRAY_SIZE(mxc_fec_pins), "FEC");
}

static void gpio_fec_inactive(void)
{
	mxc_gpio_release_multiple_pins(mxc_fec_pins,
			ARRAY_SIZE(mxc_fec_pins));
}

static struct platform_device *platform_devices[] __initdata = {
	&pcm038_nor_mtd_device,
	&mxc_w1_master_device,
};

static void __init pcm038_init(void)
{
	gpio_fec_active();

	mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
	mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
	mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
	mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */

	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));

#ifdef CONFIG_MACH_PCM970_BASEBOARD
	pcm970_baseboard_init();
#endif
}

static void __init pcm038_timer_init(void)
{
	mxc_clocks_init(26000000);
	mxc_timer_init("gpt_clk.0");
}

struct sys_timer pcm038_timer = {
	.init = pcm038_timer_init,
};

MACHINE_START(PCM038, "phyCORE-i.MX27")
	.phys_io        = AIPI_BASE_ADDR,
	.io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	.boot_params    = PHYS_OFFSET + 0x100,
	.map_io         = mxc_map_io,
	.init_irq       = mxc_init_irq,
	.init_machine   = pcm038_init,
	.timer          = &pcm038_timer,
MACHINE_END
Commit	Line	Data
7e5e9f54 JB	1	/*
	2	* Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
	3	* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License
	7	* as published by the Free Software Foundation; either version 2
	8	* of the License, or (at your option) any later version.
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	17	* MA 02110-1301, USA.
	18	*/
	19
	20	#include <linux/platform_device.h>
	21	#include <linux/mtd/physmap.h>
	22	#include <asm/mach/arch.h>
	23	#include <asm/mach-types.h>
a09e64fb RK	24	#include <mach/common.h>
	25	#include <mach/hardware.h>
	26	#include <mach/iomux-mx1-mx2.h>
7e5e9f54	27	#include <asm/mach/time.h>
a09e64fb RK	28	#include <mach/imx-uart.h>
a09e64fb RK	29	#include <mach/board-pcm038.h>
7e5e9f54	30
7e90534a SH	31	#include "devices.h"
7e90534a SH	32
7e5e9f54 JB	33	/*
	34	* Phytec's phyCORE-i.MX27 comes with 32MiB flash,
	35	* 16 bit width
	36	*/
	37	static struct physmap_flash_data pcm038_flash_data = {
	38	.width = 2,
	39	};
	40
	41	static struct resource pcm038_flash_resource = {
	42	.start = 0xc0000000,
	43	.end = 0xc1ffffff,
	44	.flags = IORESOURCE_MEM,
	45	};
	46
	47	static struct platform_device pcm038_nor_mtd_device = {
	48	.name = "physmap-flash",
	49	.id = 0,
	50	.dev = {
	51	.platform_data = &pcm038_flash_data,
	52	},
	53	.num_resources = 1,
	54	.resource = &pcm038_flash_resource,
	55	};
	56
	57	static int mxc_uart0_pins[] = {
	58	PE12_PF_UART1_TXD,
	59	PE13_PF_UART1_RXD,
	60	PE14_PF_UART1_CTS,
	61	PE15_PF_UART1_RTS
	62	};
	63
	64	static int uart_mxc_port0_init(struct platform_device *pdev)
	65	{
	66	return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
7bd18221	67	ARRAY_SIZE(mxc_uart0_pins), "UART0");
7e5e9f54 JB	68	}
	69
	70	static int uart_mxc_port0_exit(struct platform_device *pdev)
	71	{
7bd18221 SH	72	mxc_gpio_release_multiple_pins(mxc_uart0_pins,
	73	ARRAY_SIZE(mxc_uart0_pins));
	74	return 0;
7e5e9f54 JB	75	}
	76
	77	static int mxc_uart1_pins[] = {
	78	PE3_PF_UART2_CTS,
	79	PE4_PF_UART2_RTS,
	80	PE6_PF_UART2_TXD,
	81	PE7_PF_UART2_RXD
	82	};
	83
	84	static int uart_mxc_port1_init(struct platform_device *pdev)
	85	{
	86	return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
7bd18221	87	ARRAY_SIZE(mxc_uart1_pins), "UART1");
7e5e9f54 JB	88	}
	89
	90	static int uart_mxc_port1_exit(struct platform_device *pdev)
	91	{
7bd18221 SH	92	mxc_gpio_release_multiple_pins(mxc_uart1_pins,
	93	ARRAY_SIZE(mxc_uart1_pins));
	94	return 0;
7e5e9f54 JB	95	}
	96
	97	static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS,
	98	PE9_PF_UART3_RXD,
	99	PE10_PF_UART3_CTS,
	100	PE9_PF_UART3_RXD };
	101
	102	static int uart_mxc_port2_init(struct platform_device *pdev)
	103	{
	104	return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
7bd18221	105	ARRAY_SIZE(mxc_uart2_pins), "UART2");
7e5e9f54 JB	106	}
	107
	108	static int uart_mxc_port2_exit(struct platform_device *pdev)
	109	{
7bd18221 SH	110	mxc_gpio_release_multiple_pins(mxc_uart2_pins,
	111	ARRAY_SIZE(mxc_uart2_pins));
	112	return 0;
7e5e9f54 JB	113	}
	114
	115	static struct imxuart_platform_data uart_pdata[] = {
	116	{
	117	.init = uart_mxc_port0_init,
	118	.exit = uart_mxc_port0_exit,
	119	.flags = IMXUART_HAVE_RTSCTS,
	120	}, {
	121	.init = uart_mxc_port1_init,
	122	.exit = uart_mxc_port1_exit,
	123	.flags = IMXUART_HAVE_RTSCTS,
	124	}, {
	125	.init = uart_mxc_port2_init,
	126	.exit = uart_mxc_port2_exit,
	127	.flags = IMXUART_HAVE_RTSCTS,
	128	},
	129	};
	130
	131	static int mxc_fec_pins[] = {
	132	PD0_AIN_FEC_TXD0,
	133	PD1_AIN_FEC_TXD1,
	134	PD2_AIN_FEC_TXD2,
	135	PD3_AIN_FEC_TXD3,
	136	PD4_AOUT_FEC_RX_ER,
	137	PD5_AOUT_FEC_RXD1,
	138	PD6_AOUT_FEC_RXD2,
	139	PD7_AOUT_FEC_RXD3,
	140	PD8_AF_FEC_MDIO,
	141	PD9_AIN_FEC_MDC,
	142	PD10_AOUT_FEC_CRS,
	143	PD11_AOUT_FEC_TX_CLK,
	144	PD12_AOUT_FEC_RXD0,
	145	PD13_AOUT_FEC_RX_DV,
	146	PD14_AOUT_FEC_CLR,
	147	PD15_AOUT_FEC_COL,
	148	PD16_AIN_FEC_TX_ER,
	149	PF23_AIN_FEC_TX_EN
	150	};
	151
	152	static void gpio_fec_active(void)
	153	{
	154	mxc_gpio_setup_multiple_pins(mxc_fec_pins,
7bd18221	155	ARRAY_SIZE(mxc_fec_pins), "FEC");
7e5e9f54 JB	156	}
	157
	158	static void gpio_fec_inactive(void)
	159	{
7bd18221 SH	160	mxc_gpio_release_multiple_pins(mxc_fec_pins,
7bd18221 SH	161	ARRAY_SIZE(mxc_fec_pins));
7e5e9f54 JB	162	}
	163
	164	static struct platform_device *platform_devices[] __initdata = {
	165	&pcm038_nor_mtd_device,
d40a0992	166	&mxc_w1_master_device,
7e5e9f54 JB	167	};
	168
	169	static void __init pcm038_init(void)
	170	{
7e5e9f54 JB	171	gpio_fec_active();
7e5e9f54 JB	172
7e90534a SH	173	mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
	174	mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
	175	mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
d40a0992	176	mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */
7e5e9f54 JB	177
7e5e9f54 JB	178	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
ff6552e4 JB	179
	180	#ifdef CONFIG_MACH_PCM970_BASEBOARD
	181	pcm970_baseboard_init();
	182	#endif
7e5e9f54 JB	183	}
	184
	185	static void __init pcm038_timer_init(void)
	186	{
	187	mxc_clocks_init(26000000);
	188	mxc_timer_init("gpt_clk.0");
	189	}
	190
	191	struct sys_timer pcm038_timer = {
	192	.init = pcm038_timer_init,
	193	};
	194
	195	MACHINE_START(PCM038, "phyCORE-i.MX27")
	196	.phys_io = AIPI_BASE_ADDR,
	197	.io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
	198	.boot_params = PHYS_OFFSET + 0x100,
	199	.map_io = mxc_map_io,
	200	.init_irq = mxc_init_irq,
	201	.init_machine = pcm038_init,
	202	.timer = &pcm038_timer,
	203	MACHINE_END