]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/mach-mx25/mach-mx25pdk.c
ARM: mx3: rename mach-mx35pdk.c to mach-mx35_3ds.c matching its arch number
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-mx25 / mach-mx25pdk.c
CommitLineData
de41fddd
SH
1/*
2 * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
16 * Boston, MA 02110-1301, USA.
17 */
18
635baf6b
SH
19#include <linux/types.h>
20#include <linux/init.h>
e71fbaf7 21#include <linux/delay.h>
635baf6b
SH
22#include <linux/clk.h>
23#include <linux/irq.h>
24#include <linux/gpio.h>
e71fbaf7 25#include <linux/fec.h>
635baf6b
SH
26#include <linux/platform_device.h>
27
28#include <mach/hardware.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31#include <asm/mach/time.h>
32#include <asm/memory.h>
33#include <asm/mach/map.h>
34#include <mach/common.h>
35#include <mach/imx-uart.h>
36#include <mach/mx25.h>
37#include <mach/mxc_nand.h>
0f547dc1 38#include <mach/imxfb.h>
635baf6b 39#include "devices.h"
261f6f68 40#include <mach/iomux-mx25.h>
635baf6b
SH
41
42static struct imxuart_platform_data uart_pdata = {
43 .flags = IMXUART_HAVE_RTSCTS,
44};
45
e71fbaf7
BS
46static struct pad_desc mx25pdk_pads[] = {
47 MX25_PAD_FEC_MDC__FEC_MDC,
48 MX25_PAD_FEC_MDIO__FEC_MDIO,
49 MX25_PAD_FEC_TDATA0__FEC_TDATA0,
50 MX25_PAD_FEC_TDATA1__FEC_TDATA1,
51 MX25_PAD_FEC_TX_EN__FEC_TX_EN,
52 MX25_PAD_FEC_RDATA0__FEC_RDATA0,
53 MX25_PAD_FEC_RDATA1__FEC_RDATA1,
54 MX25_PAD_FEC_RX_DV__FEC_RX_DV,
55 MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
56 MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
57 MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
0f547dc1
BS
58
59 /* LCD */
60 MX25_PAD_LD0__LD0,
61 MX25_PAD_LD1__LD1,
62 MX25_PAD_LD2__LD2,
63 MX25_PAD_LD3__LD3,
64 MX25_PAD_LD4__LD4,
65 MX25_PAD_LD5__LD5,
66 MX25_PAD_LD6__LD6,
67 MX25_PAD_LD7__LD7,
68 MX25_PAD_LD8__LD8,
69 MX25_PAD_LD9__LD9,
70 MX25_PAD_LD10__LD10,
71 MX25_PAD_LD11__LD11,
72 MX25_PAD_LD12__LD12,
73 MX25_PAD_LD13__LD13,
74 MX25_PAD_LD14__LD14,
75 MX25_PAD_LD15__LD15,
76 MX25_PAD_GPIO_E__LD16,
77 MX25_PAD_GPIO_F__LD17,
78 MX25_PAD_HSYNC__HSYNC,
79 MX25_PAD_VSYNC__VSYNC,
80 MX25_PAD_LSCLK__LSCLK,
81 MX25_PAD_OE_ACD__OE_ACD,
82 MX25_PAD_CONTRAST__CONTRAST,
e71fbaf7
BS
83};
84
85static struct fec_platform_data mx25_fec_pdata = {
86 .phy = PHY_INTERFACE_MODE_RMII,
87};
88
89#define FEC_ENABLE_GPIO 35
90#define FEC_RESET_B_GPIO 104
91
92static void __init mx25pdk_fec_reset(void)
93{
94 gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
95 gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
96
97 gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */
98 gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
99 udelay(2);
100
101 /* turn on PHY power and lift reset */
102 gpio_set_value(FEC_ENABLE_GPIO, 1);
103 gpio_set_value(FEC_RESET_B_GPIO, 1);
104}
105
b97235df
BS
106static struct mxc_nand_platform_data mx25pdk_nand_board_info = {
107 .width = 1,
108 .hw_ecc = 1,
109 .flash_bbt = 1,
110};
111
0f547dc1
BS
112static struct imx_fb_videomode mx25pdk_modes[] = {
113 {
114 .mode = {
115 .name = "CRT-VGA",
116 .refresh = 60,
117 .xres = 640,
118 .yres = 480,
119 .pixclock = 39683,
120 .left_margin = 45,
121 .right_margin = 114,
122 .upper_margin = 33,
123 .lower_margin = 11,
124 .hsync_len = 1,
125 .vsync_len = 1,
126 },
127 .bpp = 16,
128 .pcr = 0xFA208B80,
129 },
130};
131
132static struct imx_fb_platform_data mx25pdk_fb_pdata = {
133 .mode = mx25pdk_modes,
134 .num_modes = ARRAY_SIZE(mx25pdk_modes),
135 .pwmr = 0x00A903FF,
136 .lscr1 = 0x00120300,
137 .dmacr = 0x00020010,
138};
139
635baf6b
SH
140static void __init mx25pdk_init(void)
141{
e71fbaf7
BS
142 mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
143 ARRAY_SIZE(mx25pdk_pads));
144
635baf6b
SH
145 mxc_register_device(&mxc_uart_device0, &uart_pdata);
146 mxc_register_device(&mxc_usbh2, NULL);
b97235df 147 mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info);
1eaa4f27 148 mxc_register_device(&mx25_rtc_device, NULL);
0f547dc1 149 mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
e71fbaf7
BS
150
151 mx25pdk_fec_reset();
152 mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
635baf6b
SH
153}
154
635baf6b
SH
155static void __init mx25pdk_timer_init(void)
156{
fadc0956 157 mx25_clocks_init();
635baf6b
SH
158}
159
160static struct sys_timer mx25pdk_timer = {
161 .init = mx25pdk_timer_init,
162};
163
164MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)")
165 /* Maintainer: Freescale Semiconductor, Inc. */
166 .phys_io = MX25_AIPS1_BASE_ADDR,
167 .io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
34101237 168 .boot_params = MX25_PHYS_OFFSET + 0x100,
635baf6b
SH
169 .map_io = mx25_map_io,
170 .init_irq = mx25_init_irq,
171 .init_machine = mx25pdk_init,
172 .timer = &mx25pdk_timer,
173MACHINE_END
174