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1/*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
84677d11 5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
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6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
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16 */
17
18#include <linux/types.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/memory.h>
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22#include <linux/platform_device.h>
23#include <linux/gpio.h>
24#include <linux/smsc911x.h>
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25#include <linux/mfd/mc13783.h>
26#include <linux/spi/spi.h>
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27#include <linux/usb/otg.h>
28#include <linux/usb/ulpi.h>
6d3e6601 29#include <linux/mtd/physmap.h>
9a4cd7a5 30
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31#include <asm/mach-types.h>
32#include <asm/mach/arch.h>
9e8a30dc 33#include <asm/mach/time.h>
9a4cd7a5 34#include <asm/mach/map.h>
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35#include <asm/page.h>
36#include <asm/setup.h>
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37
38#include <mach/hardware.h>
39#include <mach/common.h>
a09e64fb 40#include <mach/board-mx31lite.h>
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41#include <mach/imx-uart.h>
42#include <mach/iomux-mx3.h>
3211705f 43#include <mach/irqs.h>
84677d11 44#include <mach/spi.h>
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45#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h>
84677d11 47
a2ceeef5 48#include "devices-imx31.h"
a854b8ab 49#include "devices.h"
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50
51/*
b7d91a62 52 * This file contains the module-specific initialization routines.
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53 */
54
a854b8ab 55static unsigned int mx31lite_pins[] = {
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56 /* LAN9117 IRQ pin */
57 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
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58 /* SPI 1 */
59 MX31_PIN_CSPI2_SCLK__SCLK,
60 MX31_PIN_CSPI2_MOSI__MOSI,
61 MX31_PIN_CSPI2_MISO__MISO,
62 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
63 MX31_PIN_CSPI2_SS0__SS0,
64 MX31_PIN_CSPI2_SS1__SS1,
65 MX31_PIN_CSPI2_SS2__SS2,
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66};
67
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68static const struct mxc_nand_platform_data
69mx31lite_nand_board_info __initconst = {
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70 .width = 1,
71 .hw_ecc = 1,
72};
73
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74static struct smsc911x_platform_config smsc911x_config = {
75 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
76 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
77 .flags = SMSC911X_USE_16BIT,
78};
79
80static struct resource smsc911x_resources[] = {
3f4f54b4 81 {
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82 .start = MX31_CS4_BASE_ADDR,
83 .end = MX31_CS4_BASE_ADDR + 0x100,
3211705f 84 .flags = IORESOURCE_MEM,
3f4f54b4 85 }, {
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86 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
87 .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
88 .flags = IORESOURCE_IRQ,
89 },
90};
91
92static struct platform_device smsc911x_device = {
93 .name = "smsc911x",
94 .id = -1,
95 .num_resources = ARRAY_SIZE(smsc911x_resources),
96 .resource = smsc911x_resources,
97 .dev = {
98 .platform_data = &smsc911x_config,
99 },
100};
101
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102/*
103 * SPI
104 *
105 * The MC13783 is the only hard-wired SPI device on the module.
106 */
107
108static int spi_internal_chipselect[] = {
109 MXC_SPI_CS(0),
110};
111
112static struct spi_imx_master spi1_pdata = {
113 .chipselect = spi_internal_chipselect,
114 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
115};
116
117static struct mc13783_platform_data mc13783_pdata __initdata = {
118 .flags = MC13783_USE_RTC |
119 MC13783_USE_REGULATOR,
120};
121
122static struct spi_board_info mc13783_spi_dev __initdata = {
123 .modalias = "mc13783",
124 .max_speed_hz = 1000000,
125 .bus_num = 1,
126 .chip_select = 0,
127 .platform_data = &mc13783_pdata,
128 .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
129};
130
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131/*
132 * USB
133 */
134
f9ffaa9c 135#if defined(CONFIG_USB_ULPI)
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136#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
137 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
138
139static int usbh2_init(struct platform_device *pdev)
140{
141 int pins[] = {
142 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
143 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
144 MX31_PIN_USBH2_CLK__USBH2_CLK,
145 MX31_PIN_USBH2_DIR__USBH2_DIR,
146 MX31_PIN_USBH2_NXT__USBH2_NXT,
147 MX31_PIN_USBH2_STP__USBH2_STP,
148 };
149
150 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
151
152 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
161 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
162 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
163 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
164
165 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
166
167 /* chip select */
168 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
169 "USBH2_CS");
170 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
171 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
172
173 return 0;
174}
175
176static struct mxc_usbh_platform_data usbh2_pdata = {
177 .init = usbh2_init,
178 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
179 .flags = MXC_EHCI_POWER_PINS_ENABLED,
180};
f9ffaa9c 181#endif
a050c8e9 182
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183/*
184 * NOR flash
185 */
186
187static struct physmap_flash_data nor_flash_data = {
188 .width = 2,
189};
190
191static struct resource nor_flash_resource = {
192 .start = 0xa0000000,
193 .end = 0xa1ffffff,
194 .flags = IORESOURCE_MEM,
195};
196
197static struct platform_device physmap_flash_device = {
198 .name = "physmap-flash",
199 .id = 0,
200 .dev = {
201 .platform_data = &nor_flash_data,
202 },
203 .resource = &nor_flash_resource,
204 .num_resources = 1,
205};
206
207
208
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209/*
210 * This structure defines the MX31 memory map.
211 */
212static struct map_desc mx31lite_io_desc[] __initdata = {
213 {
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214 .virtual = MX31_CS4_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
216 .length = MX31_CS4_SIZE,
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217 .type = MT_DEVICE
218 }
219};
220
221/*
222 * Set up static virtual mappings.
223 */
224void __init mx31lite_map_io(void)
225{
cd4a05f9 226 mx31_map_io();
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227 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
228}
229
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230static int mx31lite_baseboard;
231core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
232
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233static void __init mxc_board_init(void)
234{
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235 int ret;
236
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237 switch (mx31lite_baseboard) {
238 case MX31LITE_NOBOARD:
239 break;
240 case MX31LITE_DB:
241 mx31lite_db_init();
242 break;
243 default:
244 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
245 mx31lite_baseboard);
246 }
247
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248 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
249 "mx31lite");
250
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251 /* NOR and NAND flash */
252 platform_device_register(&physmap_flash_device);
a2ceeef5 253 imx31_add_mxc_nand(&mx31lite_nand_board_info);
6d3e6601 254
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255 mxc_register_device(&mxc_spi_device1, &spi1_pdata);
256 spi_register_board_info(&mc13783_spi_dev, 1);
3211705f 257
f9ffaa9c 258#if defined(CONFIG_USB_ULPI)
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259 /* USB */
260 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
261 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
262
263 mxc_register_device(&mxc_usbh2, &usbh2_pdata);
f9ffaa9c 264#endif
a050c8e9 265
3211705f 266 /* SMSC9117 IRQ pin */
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267 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
268 if (ret)
269 pr_warning("could not get LAN irq gpio\n");
270 else {
271 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
272 platform_device_register(&smsc911x_device);
273 }
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274}
275
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276static void __init mx31lite_timer_init(void)
277{
30c730f8 278 mx31_clocks_init(26000000);
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279}
280
281struct sys_timer mx31lite_timer = {
282 .init = mx31lite_timer_init,
283};
284
b7d91a62 285MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
9a4cd7a5 286 /* Maintainer: Freescale Semiconductor, Inc. */
f568dd7f 287 .phys_io = MX31_AIPS1_BASE_ADDR,
321ed164 288 .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
34101237 289 .boot_params = MX3x_PHYS_OFFSET + 0x100,
9a4cd7a5 290 .map_io = mx31lite_map_io,
c5aa0ad0 291 .init_irq = mx31_init_irq,
9a4cd7a5 292 .init_machine = mxc_board_init,
9e8a30dc 293 .timer = &mx31lite_timer,
9a4cd7a5 294MACHINE_END