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1 | /* |
2 | * arch/arm/mach-netx/generic.c | |
3 | * | |
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
18 | */ | |
19 | ||
20 | #include <linux/device.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <asm/hardware.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/hardware/vic.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/arch/netx-regs.h> | |
30 | #include <asm/mach/irq.h> | |
31 | ||
32 | static struct map_desc netx_io_desc[] __initdata = { | |
33 | { | |
34 | .virtual = NETX_IO_VIRT, | |
35 | .pfn = __phys_to_pfn(NETX_IO_PHYS), | |
36 | .length = NETX_IO_SIZE, | |
37 | .type = MT_DEVICE | |
38 | } | |
39 | }; | |
40 | ||
41 | void __init netx_map_io(void) | |
42 | { | |
43 | iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc)); | |
44 | } | |
45 | ||
46 | static struct resource netx_rtc_resources[] = { | |
47 | [0] = { | |
48 | .start = 0x00101200, | |
49 | .end = 0x00101220, | |
50 | .flags = IORESOURCE_MEM, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static struct platform_device netx_rtc_device = { | |
55 | .name = "netx-rtc", | |
56 | .id = 0, | |
57 | .num_resources = ARRAY_SIZE(netx_rtc_resources), | |
58 | .resource = netx_rtc_resources, | |
59 | }; | |
60 | ||
61 | static struct platform_device *devices[] __initdata = { | |
62 | &netx_rtc_device, | |
63 | }; | |
64 | ||
65 | #if 0 | |
66 | #define DEBUG_IRQ(fmt...) printk(fmt) | |
67 | #else | |
68 | #define DEBUG_IRQ(fmt...) while (0) {} | |
69 | #endif | |
70 | ||
71 | static void | |
72 | netx_hif_demux_handler(unsigned int irq_unused, struct irqdesc *desc, | |
73 | struct pt_regs *regs) | |
74 | { | |
75 | unsigned int irq = NETX_IRQ_HIF_CHAINED(0); | |
76 | unsigned int stat; | |
77 | ||
78 | stat = ((readl(NETX_DPMAS_INT_EN) & | |
79 | readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; | |
80 | ||
81 | desc = irq_desc + NETX_IRQ_HIF_CHAINED(0); | |
82 | ||
83 | while (stat) { | |
84 | if (stat & 1) { | |
85 | DEBUG_IRQ("handling irq %d\n", irq); | |
86 | desc_handle_irq(irq, desc, regs); | |
87 | } | |
88 | irq++; | |
89 | desc++; | |
90 | stat >>= 1; | |
91 | } | |
92 | } | |
93 | ||
94 | static int | |
95 | netx_hif_irq_type(unsigned int _irq, unsigned int type) | |
96 | { | |
97 | unsigned int val, irq; | |
98 | ||
99 | val = readl(NETX_DPMAS_IF_CONF1); | |
100 | ||
101 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | |
102 | ||
103 | if (type & __IRQT_RISEDGE) { | |
104 | DEBUG_IRQ("rising edges\n"); | |
105 | val |= (1 << 26) << irq; | |
106 | } | |
107 | if (type & __IRQT_FALEDGE) { | |
108 | DEBUG_IRQ("falling edges\n"); | |
109 | val &= ~((1 << 26) << irq); | |
110 | } | |
111 | if (type & __IRQT_LOWLVL) { | |
112 | DEBUG_IRQ("low level\n"); | |
113 | val &= ~((1 << 26) << irq); | |
114 | } | |
115 | if (type & __IRQT_HIGHLVL) { | |
116 | DEBUG_IRQ("high level\n"); | |
117 | val |= (1 << 26) << irq; | |
118 | } | |
119 | ||
120 | writel(val, NETX_DPMAS_IF_CONF1); | |
121 | ||
122 | return 0; | |
123 | } | |
124 | ||
125 | static void | |
126 | netx_hif_ack_irq(unsigned int _irq) | |
127 | { | |
128 | unsigned int val, irq; | |
129 | ||
130 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | |
131 | writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); | |
132 | ||
133 | val = readl(NETX_DPMAS_INT_EN); | |
134 | val &= ~((1 << 24) << irq); | |
135 | writel(val, NETX_DPMAS_INT_EN); | |
136 | ||
137 | DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); | |
138 | } | |
139 | ||
140 | static void | |
141 | netx_hif_mask_irq(unsigned int _irq) | |
142 | { | |
143 | unsigned int val, irq; | |
144 | ||
145 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | |
146 | val = readl(NETX_DPMAS_INT_EN); | |
147 | val &= ~((1 << 24) << irq); | |
148 | writel(val, NETX_DPMAS_INT_EN); | |
149 | DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); | |
150 | } | |
151 | ||
152 | static void | |
153 | netx_hif_unmask_irq(unsigned int _irq) | |
154 | { | |
155 | unsigned int val, irq; | |
156 | ||
157 | irq = _irq - NETX_IRQ_HIF_CHAINED(0); | |
158 | val = readl(NETX_DPMAS_INT_EN); | |
159 | val |= (1 << 24) << irq; | |
160 | writel(val, NETX_DPMAS_INT_EN); | |
161 | DEBUG_IRQ("%s: irq %d\n", __FUNCTION__, _irq); | |
162 | } | |
163 | ||
164 | static struct irqchip netx_hif_chip = { | |
165 | .ack = netx_hif_ack_irq, | |
166 | .mask = netx_hif_mask_irq, | |
167 | .unmask = netx_hif_unmask_irq, | |
168 | .set_type = netx_hif_irq_type, | |
169 | }; | |
170 | ||
171 | void __init netx_init_irq(void) | |
172 | { | |
173 | int irq; | |
174 | ||
175 | vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0); | |
176 | ||
177 | for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { | |
178 | set_irq_chip(irq, &netx_hif_chip); | |
179 | set_irq_handler(irq, do_level_IRQ); | |
180 | set_irq_flags(irq, IRQF_VALID); | |
181 | } | |
182 | ||
183 | writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); | |
184 | set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); | |
185 | } | |
186 | ||
187 | static int __init netx_init(void) | |
188 | { | |
189 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | |
190 | } | |
191 | ||
192 | subsys_initcall(netx_init); | |
193 |