]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/mach-omap1/board-h2.c
ARM: OMAP: minor gpio bugfixes
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-omap1 / board-h2.c
CommitLineData
1da177e4 1/*
dbdf9ced 2 * linux/arch/arm/mach-omap1/board-h2.c
1da177e4
LT
3 *
4 * Board specific inits for OMAP-1610 H2
5 *
6 * Copyright (C) 2001 RidgeRun, Inc.
7 * Author: Greg Lonnon <glonnon@ridgerun.com>
8 *
9 * Copyright (C) 2002 MontaVista Software, Inc.
10 *
11 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
12 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
13 *
14 * H2 specific changes and cleanup
15 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <linux/kernel.h>
d052d1be 23#include <linux/platform_device.h>
1da177e4 24#include <linux/delay.h>
8056c6cb 25#include <linux/i2c.h>
1da177e4 26#include <linux/mtd/mtd.h>
9b6553cd 27#include <linux/mtd/nand.h>
1da177e4 28#include <linux/mtd/partitions.h>
9b6553cd 29#include <linux/input.h>
6d16bfb5 30#include <linux/i2c/tps65010.h>
1da177e4 31
a09e64fb 32#include <mach/hardware.h>
8056c6cb
DB
33#include <asm/gpio.h>
34
1da177e4
LT
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/flash.h>
38#include <asm/mach/map.h>
39
a09e64fb
RK
40#include <mach/gpio-switch.h>
41#include <mach/mux.h>
42#include <mach/tc.h>
43#include <mach/nand.h>
44#include <mach/irda.h>
45#include <mach/usb.h>
46#include <mach/keypad.h>
47#include <mach/common.h>
48#include <mach/mcbsp.h>
49#include <mach/omap-alsa.h>
1da177e4 50
9b6553cd
TL
51static int h2_keymap[] = {
52 KEY(0, 0, KEY_LEFT),
53 KEY(0, 1, KEY_RIGHT),
54 KEY(0, 2, KEY_3),
55 KEY(0, 3, KEY_F10),
56 KEY(0, 4, KEY_F5),
57 KEY(0, 5, KEY_9),
58 KEY(1, 0, KEY_DOWN),
59 KEY(1, 1, KEY_UP),
60 KEY(1, 2, KEY_2),
61 KEY(1, 3, KEY_F9),
62 KEY(1, 4, KEY_F7),
63 KEY(1, 5, KEY_0),
64 KEY(2, 0, KEY_ENTER),
65 KEY(2, 1, KEY_6),
66 KEY(2, 2, KEY_1),
67 KEY(2, 3, KEY_F2),
68 KEY(2, 4, KEY_F6),
69 KEY(2, 5, KEY_HOME),
70 KEY(3, 0, KEY_8),
71 KEY(3, 1, KEY_5),
72 KEY(3, 2, KEY_F12),
73 KEY(3, 3, KEY_F3),
74 KEY(3, 4, KEY_F8),
75 KEY(3, 5, KEY_END),
76 KEY(4, 0, KEY_7),
77 KEY(4, 1, KEY_4),
78 KEY(4, 2, KEY_F11),
79 KEY(4, 3, KEY_F1),
80 KEY(4, 4, KEY_F4),
81 KEY(4, 5, KEY_ESC),
82 KEY(5, 0, KEY_F13),
83 KEY(5, 1, KEY_F14),
84 KEY(5, 2, KEY_F15),
85 KEY(5, 3, KEY_F16),
86 KEY(5, 4, KEY_SLEEP),
87 0
88};
89
90static struct mtd_partition h2_nor_partitions[] = {
1da177e4
LT
91 /* bootloader (U-Boot, etc) in first sector */
92 {
93 .name = "bootloader",
94 .offset = 0,
95 .size = SZ_128K,
96 .mask_flags = MTD_WRITEABLE, /* force read-only */
97 },
98 /* bootloader params in the next sector */
99 {
100 .name = "params",
101 .offset = MTDPART_OFS_APPEND,
102 .size = SZ_128K,
103 .mask_flags = 0,
104 },
105 /* kernel */
106 {
107 .name = "kernel",
108 .offset = MTDPART_OFS_APPEND,
109 .size = SZ_2M,
110 .mask_flags = 0
111 },
112 /* file system */
113 {
114 .name = "filesystem",
115 .offset = MTDPART_OFS_APPEND,
116 .size = MTDPART_SIZ_FULL,
117 .mask_flags = 0
118 }
119};
120
9b6553cd 121static struct flash_platform_data h2_nor_data = {
1da177e4
LT
122 .map_name = "cfi_probe",
123 .width = 2,
9b6553cd
TL
124 .parts = h2_nor_partitions,
125 .nr_parts = ARRAY_SIZE(h2_nor_partitions),
1da177e4
LT
126};
127
9b6553cd 128static struct resource h2_nor_resource = {
7c38cf02 129 /* This is on CS3, wherever it's mapped */
1da177e4
LT
130 .flags = IORESOURCE_MEM,
131};
132
9b6553cd 133static struct platform_device h2_nor_device = {
1da177e4
LT
134 .name = "omapflash",
135 .id = 0,
136 .dev = {
9b6553cd 137 .platform_data = &h2_nor_data,
1da177e4
LT
138 },
139 .num_resources = 1,
9b6553cd 140 .resource = &h2_nor_resource,
1da177e4
LT
141};
142
a524626b
TL
143static struct mtd_partition h2_nand_partitions[] = {
144#if 0
145 /* REVISIT: enable these partitions if you make NAND BOOT
146 * work on your H2 (rev C or newer); published versions of
147 * x-load only support P2 and H3.
148 */
149 {
150 .name = "xloader",
151 .offset = 0,
152 .size = 64 * 1024,
153 .mask_flags = MTD_WRITEABLE, /* force read-only */
154 },
155 {
156 .name = "bootloader",
157 .offset = MTDPART_OFS_APPEND,
158 .size = 256 * 1024,
159 .mask_flags = MTD_WRITEABLE, /* force read-only */
160 },
161 {
162 .name = "params",
163 .offset = MTDPART_OFS_APPEND,
164 .size = 192 * 1024,
165 },
166 {
167 .name = "kernel",
168 .offset = MTDPART_OFS_APPEND,
169 .size = 2 * SZ_1M,
170 },
171#endif
172 {
173 .name = "filesystem",
174 .size = MTDPART_SIZ_FULL,
175 .offset = MTDPART_OFS_APPEND,
176 },
177};
178
179/* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
78be6325 180static struct omap_nand_platform_data h2_nand_data = {
a524626b
TL
181 .options = NAND_SAMSUNG_LP_OPTIONS,
182 .parts = h2_nand_partitions,
183 .nr_parts = ARRAY_SIZE(h2_nand_partitions),
184};
185
186static struct resource h2_nand_resource = {
187 .flags = IORESOURCE_MEM,
188};
189
190static struct platform_device h2_nand_device = {
191 .name = "omapnand",
192 .id = 0,
193 .dev = {
194 .platform_data = &h2_nand_data,
195 },
196 .num_resources = 1,
197 .resource = &h2_nand_resource,
198};
a524626b 199
1da177e4
LT
200static struct resource h2_smc91x_resources[] = {
201 [0] = {
202 .start = OMAP1610_ETHR_START, /* Physical */
203 .end = OMAP1610_ETHR_START + 0xf,
204 .flags = IORESOURCE_MEM,
205 },
206 [1] = {
207 .start = OMAP_GPIO_IRQ(0),
208 .end = OMAP_GPIO_IRQ(0),
e7b3dc7e 209 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
1da177e4
LT
210 },
211};
212
213static struct platform_device h2_smc91x_device = {
214 .name = "smc91x",
215 .id = 0,
216 .num_resources = ARRAY_SIZE(h2_smc91x_resources),
217 .resource = h2_smc91x_resources,
218};
219
9b6553cd
TL
220static struct resource h2_kp_resources[] = {
221 [0] = {
222 .start = INT_KEYBOARD,
223 .end = INT_KEYBOARD,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct omap_kp_platform_data h2_kp_data = {
4d24607b
KS
229 .rows = 8,
230 .cols = 8,
231 .keymap = h2_keymap,
232 .keymapsize = ARRAY_SIZE(h2_keymap),
233 .rep = 1,
234 .delay = 9,
235 .dbounce = 1,
9b6553cd
TL
236};
237
238static struct platform_device h2_kp_device = {
239 .name = "omap-keypad",
240 .id = -1,
241 .dev = {
242 .platform_data = &h2_kp_data,
243 },
244 .num_resources = ARRAY_SIZE(h2_kp_resources),
245 .resource = h2_kp_resources,
246};
247
248#define H2_IRDA_FIRSEL_GPIO_PIN 17
249
250#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
251static int h2_transceiver_mode(struct device *dev, int state)
252{
0b84b5ca
DB
253 /* SIR when low, else MIR/FIR when HIGH */
254 gpio_set_value(H2_IRDA_FIRSEL_GPIO_PIN, !(state & IR_SIRMODE));
9b6553cd
TL
255 return 0;
256}
257#endif
258
259static struct omap_irda_config h2_irda_data = {
260 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
261 .rx_channel = OMAP_DMA_UART3_RX,
262 .tx_channel = OMAP_DMA_UART3_TX,
263 .dest_start = UART3_THR,
264 .src_start = UART3_RHR,
265 .tx_trigger = 0,
266 .rx_trigger = 0,
267};
268
269static struct resource h2_irda_resources[] = {
270 [0] = {
271 .start = INT_UART3,
272 .end = INT_UART3,
273 .flags = IORESOURCE_IRQ,
274 },
275};
a524626b
TL
276
277static u64 irda_dmamask = 0xffffffff;
278
9b6553cd
TL
279static struct platform_device h2_irda_device = {
280 .name = "omapirda",
281 .id = 0,
282 .dev = {
283 .platform_data = &h2_irda_data,
a524626b 284 .dma_mask = &irda_dmamask,
9b6553cd
TL
285 },
286 .num_resources = ARRAY_SIZE(h2_irda_resources),
287 .resource = h2_irda_resources,
288};
289
290static struct platform_device h2_lcd_device = {
291 .name = "lcd_h2",
292 .id = -1,
293};
294
295static struct omap_mcbsp_reg_cfg mcbsp_regs = {
296 .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
297 .spcr1 = RINTM(3) | RRST,
298 .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
299 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
300 .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
301 .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
302 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
303 .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
304 .srgr1 = FWID(15),
305 .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
306
307 .pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP,
6e2d4107 308 /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
9b6553cd
TL
309};
310
311static struct omap_alsa_codec_config alsa_config = {
312 .name = "H2 TSC2101",
313 .mcbsp_regs_alsa = &mcbsp_regs,
6e2d4107
DC
314 .codec_configure_dev = NULL, /* tsc2101_configure, */
315 .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
316 .codec_clock_setup = NULL, /* tsc2101_clock_setup, */
317 .codec_clock_on = NULL, /* tsc2101_clock_on, */
318 .codec_clock_off = NULL, /* tsc2101_clock_off, */
319 .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
9b6553cd
TL
320};
321
322static struct platform_device h2_mcbsp1_device = {
323 .name = "omap_alsa_mcbsp",
324 .id = 1,
325 .dev = {
326 .platform_data = &alsa_config,
327 },
328};
329
1da177e4 330static struct platform_device *h2_devices[] __initdata = {
9b6553cd 331 &h2_nor_device,
78be6325 332 &h2_nand_device,
1da177e4 333 &h2_smc91x_device,
9b6553cd
TL
334 &h2_irda_device,
335 &h2_kp_device,
336 &h2_lcd_device,
337 &h2_mcbsp1_device,
1da177e4
LT
338};
339
340static void __init h2_init_smc91x(void)
341{
342 if ((omap_request_gpio(0)) < 0) {
343 printk("Error requesting gpio 0 for smc91x irq\n");
344 return;
345 }
1da177e4
LT
346}
347
e27a93a9
TL
348static struct i2c_board_info __initdata h2_i2c_board_info[] = {
349 {
9221bb1c 350 I2C_BOARD_INFO("tps65010", 0x48),
9221bb1c
DB
351 .irq = OMAP_GPIO_IRQ(58),
352 }, {
e27a93a9 353 I2C_BOARD_INFO("isp1301_omap", 0x2d),
e27a93a9
TL
354 .irq = OMAP_GPIO_IRQ(2),
355 },
356};
357
7c38cf02 358static void __init h2_init_irq(void)
1da177e4 359{
87bd63f6 360 omap1_init_common_hw();
1da177e4
LT
361 omap_init_irq();
362 omap_gpio_init();
363 h2_init_smc91x();
364}
365
366static struct omap_usb_config h2_usb_config __initdata = {
367 /* usb1 has a Mini-AB port and external isp1301 transceiver */
368 .otg = 2,
369
370#ifdef CONFIG_USB_GADGET_OMAP
6e2d4107
DC
371 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
372 /* .hmc_mode = 21,*/ /* 0:host(off) 1:dev(loopback) 2:host(loopback) */
1da177e4
LT
373#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
374 /* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
6e2d4107 375 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
1da177e4
LT
376#endif
377
378 .pins[1] = 3,
379};
380
381static struct omap_mmc_config h2_mmc_config __initdata = {
138ab9f8
FB
382 .mmc[0] = {
383 .enabled = 1,
7c38cf02 384 .wire4 = 1,
7c38cf02 385 },
1da177e4
LT
386};
387
138ab9f8
FB
388extern struct omap_mmc_platform_data h2_mmc_data;
389
3179a019
TL
390static struct omap_uart_config h2_uart_config __initdata = {
391 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
392};
393
394static struct omap_lcd_config h2_lcd_config __initdata = {
3179a019
TL
395 .ctrl_name = "internal",
396};
397
e3318fb4 398static struct omap_board_config_kernel h2_config[] __initdata = {
78be6325
TL
399 { OMAP_TAG_USB, &h2_usb_config },
400 { OMAP_TAG_MMC, &h2_mmc_config },
3179a019
TL
401 { OMAP_TAG_UART, &h2_uart_config },
402 { OMAP_TAG_LCD, &h2_lcd_config },
1da177e4
LT
403};
404
a524626b
TL
405#define H2_NAND_RB_GPIO_PIN 62
406
78be6325 407static int h2_nand_dev_ready(struct omap_nand_platform_data *data)
a524626b 408{
0b84b5ca 409 return gpio_get_value(H2_NAND_RB_GPIO_PIN);
a524626b
TL
410}
411
1da177e4
LT
412static void __init h2_init(void)
413{
9b6553cd
TL
414 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
415 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
416 * notice whether a NAND chip is enabled at probe time.
417 *
418 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
419 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3. Try
420 * detecting that in code here, to avoid probing every possible flash
421 * configuration...
7c38cf02 422 */
9b6553cd
TL
423 h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
424 h2_nor_resource.end += SZ_32M - 1;
425
a524626b
TL
426 h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
427 h2_nand_resource.end += SZ_4K - 1;
428 if (!(omap_request_gpio(H2_NAND_RB_GPIO_PIN)))
429 h2_nand_data.dev_ready = h2_nand_dev_ready;
a524626b 430
9b6553cd
TL
431 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
432 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
7c38cf02
TL
433
434 /* MMC: card detect and WP */
6e2d4107 435 /* omap_cfg_reg(U19_ARMIO1); */ /* CD */
7c38cf02
TL
436 omap_cfg_reg(BALLOUT_V8_ARMIO3); /* WP */
437
9b6553cd
TL
438 /* Irda */
439#if defined(CONFIG_OMAP_IR) || defined(CONFIG_OMAP_IR_MODULE)
440 omap_writel(omap_readl(FUNC_MUX_CTRL_A) | 7, FUNC_MUX_CTRL_A);
441 if (!(omap_request_gpio(H2_IRDA_FIRSEL_GPIO_PIN))) {
e918edf7 442 gpio_direction_output(H2_IRDA_FIRSEL_GPIO_PIN, 0);
9b6553cd
TL
443 h2_irda_data.transceiver_mode = h2_transceiver_mode;
444 }
445#endif
446
1da177e4
LT
447 platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
448 omap_board_config = h2_config;
449 omap_board_config_size = ARRAY_SIZE(h2_config);
3179a019 450 omap_serial_init();
1ed16a86
JN
451 omap_register_i2c_bus(1, 100, h2_i2c_board_info,
452 ARRAY_SIZE(h2_i2c_board_info));
138ab9f8 453 h2_mmc_init();
1da177e4
LT
454}
455
456static void __init h2_map_io(void)
457{
87bd63f6 458 omap1_map_common_io();
1da177e4
LT
459}
460
461MACHINE_START(OMAP_H2, "TI-H2")
e9dea0c6 462 /* Maintainer: Imre Deak <imre.deak@nokia.com> */
e9dea0c6
RK
463 .phys_io = 0xfff00000,
464 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
465 .boot_params = 0x10000100,
466 .map_io = h2_map_io,
467 .init_irq = h2_init_irq,
468 .init_machine = h2_init,
1da177e4
LT
469 .timer = &omap_timer,
470MACHINE_END