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Commit | Line | Data |
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1da177e4 | 1 | /* |
dbdf9ced | 2 | * linux/arch/arm/mach-omap1/board-h3.c |
1da177e4 LT |
3 | * |
4 | * This file contains OMAP1710 H3 specific code. | |
5 | * | |
6 | * Copyright (C) 2004 Texas Instruments, Inc. | |
7 | * Copyright (C) 2002 MontaVista Software, Inc. | |
8 | * Copyright (C) 2001 RidgeRun, Inc. | |
9 | * Author: RidgeRun, Inc. | |
10 | * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License version 2 as | |
14 | * published by the Free Software Foundation. | |
15 | */ | |
16 | ||
1da177e4 LT |
17 | #include <linux/types.h> |
18 | #include <linux/init.h> | |
19 | #include <linux/major.h> | |
20 | #include <linux/kernel.h> | |
d052d1be | 21 | #include <linux/platform_device.h> |
1da177e4 | 22 | #include <linux/errno.h> |
9b6553cd | 23 | #include <linux/workqueue.h> |
8056c6cb | 24 | #include <linux/i2c.h> |
1da177e4 | 25 | #include <linux/mtd/mtd.h> |
9b6553cd | 26 | #include <linux/mtd/nand.h> |
1da177e4 | 27 | #include <linux/mtd/partitions.h> |
9b6553cd | 28 | #include <linux/input.h> |
0cc0a441 | 29 | #include <linux/spi/spi.h> |
6d16bfb5 | 30 | #include <linux/i2c/tps65010.h> |
1da177e4 LT |
31 | |
32 | #include <asm/setup.h> | |
33 | #include <asm/page.h> | |
be509729 | 34 | #include <asm/arch/hardware.h> |
8056c6cb DB |
35 | #include <asm/gpio.h> |
36 | ||
1da177e4 LT |
37 | #include <asm/mach-types.h> |
38 | #include <asm/mach/arch.h> | |
39 | #include <asm/mach/flash.h> | |
40 | #include <asm/mach/map.h> | |
41 | ||
9b6553cd | 42 | #include <asm/arch/gpioexpander.h> |
1da177e4 LT |
43 | #include <asm/arch/irqs.h> |
44 | #include <asm/arch/mux.h> | |
45 | #include <asm/arch/tc.h> | |
78be6325 | 46 | #include <asm/arch/nand.h> |
9b6553cd | 47 | #include <asm/arch/irda.h> |
1da177e4 | 48 | #include <asm/arch/usb.h> |
9b6553cd TL |
49 | #include <asm/arch/keypad.h> |
50 | #include <asm/arch/dma.h> | |
d48af15e | 51 | #include <asm/arch/common.h> |
a524626b TL |
52 | #include <asm/arch/mcbsp.h> |
53 | #include <asm/arch/omap-alsa.h> | |
1da177e4 | 54 | |
0cc0a441 DB |
55 | #define H3_TS_GPIO 48 |
56 | ||
9b6553cd TL |
57 | static int h3_keymap[] = { |
58 | KEY(0, 0, KEY_LEFT), | |
59 | KEY(0, 1, KEY_RIGHT), | |
60 | KEY(0, 2, KEY_3), | |
61 | KEY(0, 3, KEY_F10), | |
62 | KEY(0, 4, KEY_F5), | |
63 | KEY(0, 5, KEY_9), | |
64 | KEY(1, 0, KEY_DOWN), | |
65 | KEY(1, 1, KEY_UP), | |
66 | KEY(1, 2, KEY_2), | |
67 | KEY(1, 3, KEY_F9), | |
68 | KEY(1, 4, KEY_F7), | |
69 | KEY(1, 5, KEY_0), | |
70 | KEY(2, 0, KEY_ENTER), | |
71 | KEY(2, 1, KEY_6), | |
72 | KEY(2, 2, KEY_1), | |
73 | KEY(2, 3, KEY_F2), | |
74 | KEY(2, 4, KEY_F6), | |
75 | KEY(2, 5, KEY_HOME), | |
76 | KEY(3, 0, KEY_8), | |
77 | KEY(3, 1, KEY_5), | |
78 | KEY(3, 2, KEY_F12), | |
79 | KEY(3, 3, KEY_F3), | |
80 | KEY(3, 4, KEY_F8), | |
81 | KEY(3, 5, KEY_END), | |
82 | KEY(4, 0, KEY_7), | |
83 | KEY(4, 1, KEY_4), | |
84 | KEY(4, 2, KEY_F11), | |
85 | KEY(4, 3, KEY_F1), | |
86 | KEY(4, 4, KEY_F4), | |
87 | KEY(4, 5, KEY_ESC), | |
88 | KEY(5, 0, KEY_F13), | |
89 | KEY(5, 1, KEY_F14), | |
90 | KEY(5, 2, KEY_F15), | |
91 | KEY(5, 3, KEY_F16), | |
92 | KEY(5, 4, KEY_SLEEP), | |
93 | 0 | |
94 | }; | |
95 | ||
96 | ||
97 | static struct mtd_partition nor_partitions[] = { | |
1da177e4 LT |
98 | /* bootloader (U-Boot, etc) in first sector */ |
99 | { | |
100 | .name = "bootloader", | |
101 | .offset = 0, | |
102 | .size = SZ_128K, | |
103 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
104 | }, | |
105 | /* bootloader params in the next sector */ | |
106 | { | |
107 | .name = "params", | |
108 | .offset = MTDPART_OFS_APPEND, | |
109 | .size = SZ_128K, | |
110 | .mask_flags = 0, | |
111 | }, | |
112 | /* kernel */ | |
113 | { | |
114 | .name = "kernel", | |
115 | .offset = MTDPART_OFS_APPEND, | |
116 | .size = SZ_2M, | |
117 | .mask_flags = 0 | |
118 | }, | |
119 | /* file system */ | |
120 | { | |
121 | .name = "filesystem", | |
122 | .offset = MTDPART_OFS_APPEND, | |
123 | .size = MTDPART_SIZ_FULL, | |
124 | .mask_flags = 0 | |
125 | } | |
126 | }; | |
127 | ||
9b6553cd | 128 | static struct flash_platform_data nor_data = { |
1da177e4 LT |
129 | .map_name = "cfi_probe", |
130 | .width = 2, | |
9b6553cd TL |
131 | .parts = nor_partitions, |
132 | .nr_parts = ARRAY_SIZE(nor_partitions), | |
1da177e4 LT |
133 | }; |
134 | ||
9b6553cd | 135 | static struct resource nor_resource = { |
7c38cf02 | 136 | /* This is on CS3, wherever it's mapped */ |
1da177e4 LT |
137 | .flags = IORESOURCE_MEM, |
138 | }; | |
139 | ||
9b6553cd | 140 | static struct platform_device nor_device = { |
1da177e4 LT |
141 | .name = "omapflash", |
142 | .id = 0, | |
143 | .dev = { | |
9b6553cd TL |
144 | .platform_data = &nor_data, |
145 | }, | |
146 | .num_resources = 1, | |
147 | .resource = &nor_resource, | |
148 | }; | |
149 | ||
150 | static struct mtd_partition nand_partitions[] = { | |
151 | #if 0 | |
152 | /* REVISIT: enable these partitions if you make NAND BOOT work */ | |
153 | { | |
154 | .name = "xloader", | |
155 | .offset = 0, | |
156 | .size = 64 * 1024, | |
157 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
158 | }, | |
159 | { | |
160 | .name = "bootloader", | |
161 | .offset = MTDPART_OFS_APPEND, | |
162 | .size = 256 * 1024, | |
163 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
164 | }, | |
165 | { | |
166 | .name = "params", | |
167 | .offset = MTDPART_OFS_APPEND, | |
168 | .size = 192 * 1024, | |
169 | }, | |
170 | { | |
171 | .name = "kernel", | |
172 | .offset = MTDPART_OFS_APPEND, | |
173 | .size = 2 * SZ_1M, | |
174 | }, | |
175 | #endif | |
176 | { | |
177 | .name = "filesystem", | |
178 | .size = MTDPART_SIZ_FULL, | |
179 | .offset = MTDPART_OFS_APPEND, | |
180 | }, | |
181 | }; | |
182 | ||
183 | /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */ | |
78be6325 | 184 | static struct omap_nand_platform_data nand_data = { |
9b6553cd TL |
185 | .options = NAND_SAMSUNG_LP_OPTIONS, |
186 | .parts = nand_partitions, | |
187 | .nr_parts = ARRAY_SIZE(nand_partitions), | |
188 | }; | |
189 | ||
190 | static struct resource nand_resource = { | |
191 | .flags = IORESOURCE_MEM, | |
192 | }; | |
193 | ||
194 | static struct platform_device nand_device = { | |
195 | .name = "omapnand", | |
196 | .id = 0, | |
197 | .dev = { | |
198 | .platform_data = &nand_data, | |
1da177e4 LT |
199 | }, |
200 | .num_resources = 1, | |
9b6553cd | 201 | .resource = &nand_resource, |
1da177e4 LT |
202 | }; |
203 | ||
204 | static struct resource smc91x_resources[] = { | |
205 | [0] = { | |
206 | .start = OMAP1710_ETHR_START, /* Physical */ | |
207 | .end = OMAP1710_ETHR_START + 0xf, | |
208 | .flags = IORESOURCE_MEM, | |
209 | }, | |
210 | [1] = { | |
211 | .start = OMAP_GPIO_IRQ(40), | |
212 | .end = OMAP_GPIO_IRQ(40), | |
e7b3dc7e | 213 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
1da177e4 LT |
214 | }, |
215 | }; | |
216 | ||
217 | static struct platform_device smc91x_device = { | |
218 | .name = "smc91x", | |
219 | .id = 0, | |
220 | .num_resources = ARRAY_SIZE(smc91x_resources), | |
221 | .resource = smc91x_resources, | |
222 | }; | |
223 | ||
224 | #define GPTIMER_BASE 0xFFFB1400 | |
225 | #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800)) | |
226 | #define GPTIMER_REGS_SIZE 0x46 | |
227 | ||
228 | static struct resource intlat_resources[] = { | |
229 | [0] = { | |
230 | .start = GPTIMER_REGS(0), /* Physical */ | |
231 | .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE, | |
232 | .flags = IORESOURCE_MEM, | |
233 | }, | |
234 | [1] = { | |
235 | .start = INT_1610_GPTIMER1, | |
236 | .end = INT_1610_GPTIMER1, | |
237 | .flags = IORESOURCE_IRQ, | |
238 | }, | |
239 | }; | |
240 | ||
241 | static struct platform_device intlat_device = { | |
242 | .name = "omap_intlat", | |
243 | .id = 0, | |
244 | .num_resources = ARRAY_SIZE(intlat_resources), | |
245 | .resource = intlat_resources, | |
246 | }; | |
247 | ||
9b6553cd TL |
248 | static struct resource h3_kp_resources[] = { |
249 | [0] = { | |
250 | .start = INT_KEYBOARD, | |
251 | .end = INT_KEYBOARD, | |
252 | .flags = IORESOURCE_IRQ, | |
253 | }, | |
254 | }; | |
255 | ||
256 | static struct omap_kp_platform_data h3_kp_data = { | |
4d24607b KS |
257 | .rows = 8, |
258 | .cols = 8, | |
259 | .keymap = h3_keymap, | |
260 | .keymapsize = ARRAY_SIZE(h3_keymap), | |
261 | .rep = 1, | |
262 | .delay = 9, | |
263 | .dbounce = 1, | |
9b6553cd TL |
264 | }; |
265 | ||
266 | static struct platform_device h3_kp_device = { | |
267 | .name = "omap-keypad", | |
268 | .id = -1, | |
269 | .dev = { | |
270 | .platform_data = &h3_kp_data, | |
271 | }, | |
272 | .num_resources = ARRAY_SIZE(h3_kp_resources), | |
273 | .resource = h3_kp_resources, | |
274 | }; | |
275 | ||
276 | ||
277 | /* Select between the IrDA and aGPS module | |
278 | */ | |
279 | static int h3_select_irda(struct device *dev, int state) | |
280 | { | |
281 | unsigned char expa; | |
282 | int err = 0; | |
283 | ||
284 | if ((err = read_gpio_expa(&expa, 0x26))) { | |
285 | printk(KERN_ERR "Error reading from I/O EXPANDER \n"); | |
286 | return err; | |
287 | } | |
288 | ||
289 | /* 'P6' enable/disable IRDA_TX and IRDA_RX */ | |
290 | if (state & IR_SEL) { /* IrDA */ | |
291 | if ((err = write_gpio_expa(expa | 0x40, 0x26))) { | |
292 | printk(KERN_ERR "Error writing to I/O EXPANDER \n"); | |
293 | return err; | |
294 | } | |
295 | } else { | |
296 | if ((err = write_gpio_expa(expa & ~0x40, 0x26))) { | |
297 | printk(KERN_ERR "Error writing to I/O EXPANDER \n"); | |
298 | return err; | |
299 | } | |
300 | } | |
301 | return err; | |
302 | } | |
303 | ||
666cd174 | 304 | static void set_trans_mode(struct work_struct *work) |
9b6553cd | 305 | { |
666cd174 DB |
306 | struct omap_irda_config *irda_config = |
307 | container_of(work, struct omap_irda_config, gpio_expa.work); | |
308 | int mode = irda_config->mode; | |
9b6553cd TL |
309 | unsigned char expa; |
310 | int err = 0; | |
311 | ||
312 | if ((err = read_gpio_expa(&expa, 0x27)) != 0) { | |
313 | printk(KERN_ERR "Error reading from I/O expander\n"); | |
314 | } | |
315 | ||
316 | expa &= ~0x03; | |
317 | ||
666cd174 | 318 | if (mode & IR_SIRMODE) { |
9b6553cd TL |
319 | expa |= 0x01; |
320 | } else { /* MIR/FIR */ | |
321 | expa |= 0x03; | |
322 | } | |
323 | ||
324 | if ((err = write_gpio_expa(expa, 0x27)) != 0) { | |
325 | printk(KERN_ERR "Error writing to I/O expander\n"); | |
326 | } | |
327 | } | |
328 | ||
329 | static int h3_transceiver_mode(struct device *dev, int mode) | |
330 | { | |
331 | struct omap_irda_config *irda_config = dev->platform_data; | |
332 | ||
666cd174 | 333 | irda_config->mode = mode; |
9b6553cd | 334 | cancel_delayed_work(&irda_config->gpio_expa); |
666cd174 | 335 | PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); |
6d5aefb8 | 336 | schedule_delayed_work(&irda_config->gpio_expa, 0); |
9b6553cd TL |
337 | |
338 | return 0; | |
339 | } | |
340 | ||
341 | static struct omap_irda_config h3_irda_data = { | |
342 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, | |
343 | .transceiver_mode = h3_transceiver_mode, | |
344 | .select_irda = h3_select_irda, | |
345 | .rx_channel = OMAP_DMA_UART3_RX, | |
346 | .tx_channel = OMAP_DMA_UART3_TX, | |
347 | .dest_start = UART3_THR, | |
348 | .src_start = UART3_RHR, | |
349 | .tx_trigger = 0, | |
350 | .rx_trigger = 0, | |
351 | }; | |
352 | ||
353 | static struct resource h3_irda_resources[] = { | |
354 | [0] = { | |
355 | .start = INT_UART3, | |
356 | .end = INT_UART3, | |
357 | .flags = IORESOURCE_IRQ, | |
358 | }, | |
359 | }; | |
360 | ||
a524626b TL |
361 | static u64 irda_dmamask = 0xffffffff; |
362 | ||
9b6553cd TL |
363 | static struct platform_device h3_irda_device = { |
364 | .name = "omapirda", | |
365 | .id = 0, | |
366 | .dev = { | |
367 | .platform_data = &h3_irda_data, | |
a524626b | 368 | .dma_mask = &irda_dmamask, |
9b6553cd TL |
369 | }, |
370 | .num_resources = ARRAY_SIZE(h3_irda_resources), | |
371 | .resource = h3_irda_resources, | |
372 | }; | |
373 | ||
374 | static struct platform_device h3_lcd_device = { | |
375 | .name = "lcd_h3", | |
376 | .id = -1, | |
377 | }; | |
378 | ||
0cc0a441 DB |
379 | static struct spi_board_info h3_spi_board_info[] __initdata = { |
380 | [0] = { | |
381 | .modalias = "tsc2101", | |
382 | .bus_num = 2, | |
383 | .chip_select = 0, | |
384 | .irq = OMAP_GPIO_IRQ(H3_TS_GPIO), | |
385 | .max_speed_hz = 16000000, | |
386 | /* .platform_data = &tsc_platform_data, */ | |
387 | }, | |
388 | }; | |
389 | ||
a524626b TL |
390 | static struct omap_mcbsp_reg_cfg mcbsp_regs = { |
391 | .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), | |
392 | .spcr1 = RINTM(3) | RRST, | |
393 | .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | | |
394 | RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), | |
395 | .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), | |
396 | .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | | |
397 | XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, | |
398 | .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), | |
399 | .srgr1 = FWID(15), | |
400 | .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), | |
401 | ||
402 | .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP, | |
6e2d4107 | 403 | /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */ |
a524626b TL |
404 | }; |
405 | ||
406 | static struct omap_alsa_codec_config alsa_config = { | |
407 | .name = "H3 TSC2101", | |
408 | .mcbsp_regs_alsa = &mcbsp_regs, | |
6e2d4107 DC |
409 | .codec_configure_dev = NULL, /* tsc2101_configure, */ |
410 | .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */ | |
411 | .codec_clock_setup = NULL, /* tsc2101_clock_setup, */ | |
412 | .codec_clock_on = NULL, /* tsc2101_clock_on, */ | |
413 | .codec_clock_off = NULL, /* tsc2101_clock_off, */ | |
414 | .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */ | |
a524626b TL |
415 | }; |
416 | ||
417 | static struct platform_device h3_mcbsp1_device = { | |
418 | .name = "omap_alsa_mcbsp", | |
419 | .id = 1, | |
420 | .dev = { | |
421 | .platform_data = &alsa_config, | |
422 | }, | |
423 | }; | |
424 | ||
1da177e4 | 425 | static struct platform_device *devices[] __initdata = { |
9b6553cd TL |
426 | &nor_device, |
427 | &nand_device, | |
1da177e4 LT |
428 | &smc91x_device, |
429 | &intlat_device, | |
9b6553cd TL |
430 | &h3_irda_device, |
431 | &h3_kp_device, | |
432 | &h3_lcd_device, | |
a524626b | 433 | &h3_mcbsp1_device, |
1da177e4 LT |
434 | }; |
435 | ||
436 | static struct omap_usb_config h3_usb_config __initdata = { | |
437 | /* usb1 has a Mini-AB port and external isp1301 transceiver */ | |
438 | .otg = 2, | |
439 | ||
440 | #ifdef CONFIG_USB_GADGET_OMAP | |
441 | .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */ | |
442 | #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
443 | /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */ | |
444 | .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */ | |
445 | #endif | |
446 | ||
447 | .pins[1] = 3, | |
448 | }; | |
449 | ||
7c38cf02 TL |
450 | static struct omap_mmc_config h3_mmc_config __initdata = { |
451 | .mmc[0] = { | |
138ab9f8 FB |
452 | .enabled = 1, |
453 | .wire4 = 1, | |
454 | }, | |
7c38cf02 TL |
455 | }; |
456 | ||
138ab9f8 FB |
457 | extern struct omap_mmc_platform_data h3_mmc_data; |
458 | ||
3179a019 TL |
459 | static struct omap_uart_config h3_uart_config __initdata = { |
460 | .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | |
461 | }; | |
462 | ||
463 | static struct omap_lcd_config h3_lcd_config __initdata = { | |
3179a019 TL |
464 | .ctrl_name = "internal", |
465 | }; | |
466 | ||
e27a93a9 | 467 | static struct omap_board_config_kernel h3_config[] __initdata = { |
3179a019 TL |
468 | { OMAP_TAG_USB, &h3_usb_config }, |
469 | { OMAP_TAG_MMC, &h3_mmc_config }, | |
470 | { OMAP_TAG_UART, &h3_uart_config }, | |
471 | { OMAP_TAG_LCD, &h3_lcd_config }, | |
1da177e4 LT |
472 | }; |
473 | ||
0cc0a441 DB |
474 | static struct i2c_board_info __initdata h3_i2c_board_info[] = { |
475 | { | |
3760f736 | 476 | I2C_BOARD_INFO("tps65013", 0x48), |
0cc0a441 DB |
477 | /* .irq = OMAP_GPIO_IRQ(??), */ |
478 | }, | |
479 | }; | |
480 | ||
138ab9f8 FB |
481 | static struct omap_gpio_switch h3_gpio_switches[] __initdata = { |
482 | { | |
483 | .name = "mmc_slot", | |
484 | .gpio = OMAP_MPUIO(1), | |
485 | .type = OMAP_GPIO_SWITCH_TYPE_COVER, | |
486 | .debounce_rising = 100, | |
487 | .debounce_falling = 0, | |
488 | .notify = h3_mmc_slot_cover_handler, | |
489 | .notify_data = NULL, | |
490 | }, | |
491 | }; | |
492 | ||
9b6553cd TL |
493 | #define H3_NAND_RB_GPIO_PIN 10 |
494 | ||
78be6325 | 495 | static int nand_dev_ready(struct omap_nand_platform_data *data) |
9b6553cd TL |
496 | { |
497 | return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN); | |
498 | } | |
499 | ||
1da177e4 LT |
500 | static void __init h3_init(void) |
501 | { | |
9b6553cd TL |
502 | /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped |
503 | * to address 0 by a dip switch), NAND on CS2B. The NAND driver will | |
504 | * notice whether a NAND chip is enabled at probe time. | |
505 | * | |
506 | * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND | |
507 | * (which on H2 may be 16bit) on CS3. Try detecting that in code here, | |
508 | * to avoid probing every possible flash configuration... | |
509 | */ | |
510 | nor_resource.end = nor_resource.start = omap_cs3_phys(); | |
511 | nor_resource.end += SZ_32M - 1; | |
512 | ||
513 | nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS; | |
514 | nand_resource.end += SZ_4K - 1; | |
515 | if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN))) | |
516 | nand_data.dev_ready = nand_dev_ready; | |
517 | ||
518 | /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */ | |
519 | /* GPIO10 pullup/down register, Enable pullup on GPIO10 */ | |
520 | omap_cfg_reg(V2_1710_GPIO10); | |
521 | ||
522 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
e27a93a9 TL |
523 | spi_register_board_info(h3_spi_board_info, |
524 | ARRAY_SIZE(h3_spi_board_info)); | |
7c38cf02 TL |
525 | omap_board_config = h3_config; |
526 | omap_board_config_size = ARRAY_SIZE(h3_config); | |
3179a019 | 527 | omap_serial_init(); |
1ed16a86 JN |
528 | omap_register_i2c_bus(1, 100, h3_i2c_board_info, |
529 | ARRAY_SIZE(h3_i2c_board_info)); | |
138ab9f8 | 530 | h3_mmc_init(); |
1da177e4 LT |
531 | } |
532 | ||
533 | static void __init h3_init_smc91x(void) | |
534 | { | |
535 | omap_cfg_reg(W15_1710_GPIO40); | |
536 | if (omap_request_gpio(40) < 0) { | |
537 | printk("Error requesting gpio 40 for smc91x irq\n"); | |
538 | return; | |
539 | } | |
1da177e4 LT |
540 | } |
541 | ||
277d58ef | 542 | static void __init h3_init_irq(void) |
1da177e4 | 543 | { |
87bd63f6 | 544 | omap1_init_common_hw(); |
1da177e4 LT |
545 | omap_init_irq(); |
546 | omap_gpio_init(); | |
547 | h3_init_smc91x(); | |
548 | } | |
549 | ||
550 | static void __init h3_map_io(void) | |
551 | { | |
87bd63f6 | 552 | omap1_map_common_io(); |
1da177e4 LT |
553 | } |
554 | ||
555 | MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") | |
e9dea0c6 | 556 | /* Maintainer: Texas Instruments, Inc. */ |
e9dea0c6 RK |
557 | .phys_io = 0xfff00000, |
558 | .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc, | |
559 | .boot_params = 0x10000100, | |
560 | .map_io = h3_map_io, | |
561 | .init_irq = h3_init_irq, | |
562 | .init_machine = h3_init, | |
1da177e4 LT |
563 | .timer = &omap_timer, |
564 | MACHINE_END |