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7c38cf02 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/devices.c | |
3 | * | |
4 | * OMAP1 platform device setup/initialization | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
1a96edd7 | 12 | #include <linux/dma-mapping.h> |
7c38cf02 TL |
13 | #include <linux/module.h> |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
d052d1be | 16 | #include <linux/platform_device.h> |
fced80c7 | 17 | #include <linux/io.h> |
c5c4dce4 | 18 | #include <linux/spi/spi.h> |
7c38cf02 | 19 | |
706afdda | 20 | #include <mach/camera.h> |
a09e64fb | 21 | #include <mach/hardware.h> |
7c38cf02 TL |
22 | #include <asm/mach/map.h> |
23 | ||
ce491cf8 TL |
24 | #include <plat/tc.h> |
25 | #include <plat/board.h> | |
26 | #include <plat/mux.h> | |
a09e64fb | 27 | #include <mach/gpio.h> |
ce491cf8 | 28 | #include <plat/mmc.h> |
c5c4dce4 | 29 | #include <plat/omap7xx.h> |
f0fba2ad | 30 | #include <plat/mcbsp.h> |
7c38cf02 | 31 | |
7c38cf02 TL |
32 | /*-------------------------------------------------------------------------*/ |
33 | ||
db68b189 | 34 | #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) |
7c38cf02 TL |
35 | |
36 | #define OMAP_RTC_BASE 0xfffb4800 | |
37 | ||
38 | static struct resource rtc_resources[] = { | |
39 | { | |
40 | .start = OMAP_RTC_BASE, | |
41 | .end = OMAP_RTC_BASE + 0x5f, | |
42 | .flags = IORESOURCE_MEM, | |
43 | }, | |
44 | { | |
45 | .start = INT_RTC_TIMER, | |
46 | .flags = IORESOURCE_IRQ, | |
47 | }, | |
48 | { | |
49 | .start = INT_RTC_ALARM, | |
50 | .flags = IORESOURCE_IRQ, | |
51 | }, | |
52 | }; | |
53 | ||
54 | static struct platform_device omap_rtc_device = { | |
55 | .name = "omap_rtc", | |
56 | .id = -1, | |
7c38cf02 TL |
57 | .num_resources = ARRAY_SIZE(rtc_resources), |
58 | .resource = rtc_resources, | |
59 | }; | |
60 | ||
61 | static void omap_init_rtc(void) | |
62 | { | |
63 | (void) platform_device_register(&omap_rtc_device); | |
64 | } | |
65 | #else | |
66 | static inline void omap_init_rtc(void) {} | |
67 | #endif | |
68 | ||
c40fae95 | 69 | static inline void omap_init_mbox(void) { } |
c40fae95 | 70 | |
d8874665 TL |
71 | /*-------------------------------------------------------------------------*/ |
72 | ||
73 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) | |
74 | ||
75 | static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |
76 | int controller_nr) | |
77 | { | |
78 | if (controller_nr == 0) { | |
490a5665 CM |
79 | if (cpu_is_omap7xx()) { |
80 | omap_cfg_reg(MMC_7XX_CMD); | |
81 | omap_cfg_reg(MMC_7XX_CLK); | |
82 | omap_cfg_reg(MMC_7XX_DAT0); | |
83 | } else { | |
84 | omap_cfg_reg(MMC_CMD); | |
85 | omap_cfg_reg(MMC_CLK); | |
86 | omap_cfg_reg(MMC_DAT0); | |
87 | } | |
88 | ||
d8874665 TL |
89 | if (cpu_is_omap1710()) { |
90 | omap_cfg_reg(M15_1710_MMC_CLKI); | |
91 | omap_cfg_reg(P19_1710_MMC_CMDDIR); | |
92 | omap_cfg_reg(P20_1710_MMC_DATDIR0); | |
93 | } | |
490a5665 | 94 | if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { |
d8874665 TL |
95 | omap_cfg_reg(MMC_DAT1); |
96 | /* NOTE: DAT2 can be on W10 (here) or M15 */ | |
97 | if (!mmc_controller->slots[0].nomux) | |
98 | omap_cfg_reg(MMC_DAT2); | |
99 | omap_cfg_reg(MMC_DAT3); | |
100 | } | |
101 | } | |
102 | ||
103 | /* Block 2 is on newer chips, and has many pinout options */ | |
104 | if (cpu_is_omap16xx() && controller_nr == 1) { | |
105 | if (!mmc_controller->slots[1].nomux) { | |
106 | omap_cfg_reg(Y8_1610_MMC2_CMD); | |
107 | omap_cfg_reg(Y10_1610_MMC2_CLK); | |
108 | omap_cfg_reg(R18_1610_MMC2_CLKIN); | |
109 | omap_cfg_reg(W8_1610_MMC2_DAT0); | |
90c62bf0 | 110 | if (mmc_controller->slots[1].wires == 4) { |
d8874665 TL |
111 | omap_cfg_reg(V8_1610_MMC2_DAT1); |
112 | omap_cfg_reg(W15_1610_MMC2_DAT2); | |
113 | omap_cfg_reg(R10_1610_MMC2_DAT3); | |
114 | } | |
115 | ||
116 | /* These are needed for the level shifter */ | |
117 | omap_cfg_reg(V9_1610_MMC2_CMDDIR); | |
118 | omap_cfg_reg(V5_1610_MMC2_DATDIR0); | |
119 | omap_cfg_reg(W19_1610_MMC2_DATDIR1); | |
120 | } | |
121 | ||
122 | /* Feedback clock must be set on OMAP-1710 MMC2 */ | |
123 | if (cpu_is_omap1710()) | |
124 | omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), | |
125 | MOD_CONF_CTRL_1); | |
126 | } | |
127 | } | |
128 | ||
129 | void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
130 | int nr_controllers) | |
131 | { | |
132 | int i; | |
133 | ||
134 | for (i = 0; i < nr_controllers; i++) { | |
135 | unsigned long base, size; | |
136 | unsigned int irq = 0; | |
137 | ||
138 | if (!mmc_data[i]) | |
139 | continue; | |
140 | ||
141 | omap1_mmc_mux(mmc_data[i], i); | |
142 | ||
143 | switch (i) { | |
144 | case 0: | |
145 | base = OMAP1_MMC1_BASE; | |
146 | irq = INT_MMC; | |
147 | break; | |
148 | case 1: | |
149 | if (!cpu_is_omap16xx()) | |
150 | return; | |
151 | base = OMAP1_MMC2_BASE; | |
152 | irq = INT_1610_MMC2; | |
153 | break; | |
154 | default: | |
155 | continue; | |
156 | } | |
157 | size = OMAP1_MMC_SIZE; | |
158 | ||
0dffb5c5 | 159 | omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]); |
d8874665 TL |
160 | }; |
161 | } | |
162 | ||
163 | #endif | |
164 | ||
165 | /*-------------------------------------------------------------------------*/ | |
166 | ||
c5c4dce4 CM |
167 | /* OMAP7xx SPI support */ |
168 | #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) | |
169 | ||
170 | struct platform_device omap_spi1 = { | |
171 | .name = "omap1_spi100k", | |
172 | .id = 1, | |
173 | }; | |
174 | ||
175 | struct platform_device omap_spi2 = { | |
176 | .name = "omap1_spi100k", | |
177 | .id = 2, | |
178 | }; | |
179 | ||
180 | static void omap_init_spi100k(void) | |
181 | { | |
182 | omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); | |
183 | if (omap_spi1.dev.platform_data) | |
184 | platform_device_register(&omap_spi1); | |
185 | ||
186 | omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); | |
187 | if (omap_spi2.dev.platform_data) | |
188 | platform_device_register(&omap_spi2); | |
189 | } | |
190 | ||
191 | #else | |
192 | static inline void omap_init_spi100k(void) | |
193 | { | |
194 | } | |
195 | #endif | |
196 | ||
1a96edd7 JK |
197 | |
198 | #define OMAP1_CAMERA_BASE 0xfffb6800 | |
199 | #define OMAP1_CAMERA_IOSIZE 0x1c | |
200 | ||
201 | static struct resource omap1_camera_resources[] = { | |
202 | [0] = { | |
203 | .start = OMAP1_CAMERA_BASE, | |
204 | .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1, | |
205 | .flags = IORESOURCE_MEM, | |
206 | }, | |
207 | [1] = { | |
208 | .start = INT_CAMERA, | |
209 | .flags = IORESOURCE_IRQ, | |
210 | }, | |
211 | }; | |
212 | ||
213 | static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32); | |
214 | ||
215 | static struct platform_device omap1_camera_device = { | |
216 | .name = "omap1-camera", | |
217 | .id = 0, /* This is used to put cameras on this interface */ | |
218 | .dev = { | |
219 | .dma_mask = &omap1_camera_dma_mask, | |
220 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
221 | }, | |
222 | .num_resources = ARRAY_SIZE(omap1_camera_resources), | |
223 | .resource = omap1_camera_resources, | |
224 | }; | |
225 | ||
226 | void __init omap1_camera_init(void *info) | |
227 | { | |
228 | struct platform_device *dev = &omap1_camera_device; | |
229 | int ret; | |
230 | ||
231 | dev->dev.platform_data = info; | |
232 | ||
233 | ret = platform_device_register(dev); | |
234 | if (ret) | |
235 | dev_err(&dev->dev, "unable to register device: %d\n", ret); | |
236 | } | |
237 | ||
238 | ||
c5c4dce4 CM |
239 | /*-------------------------------------------------------------------------*/ |
240 | ||
9b6553cd | 241 | static inline void omap_init_sti(void) {} |
7c38cf02 | 242 | |
f0fba2ad LG |
243 | #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) |
244 | ||
245 | static struct platform_device omap_pcm = { | |
246 | .name = "omap-pcm-audio", | |
247 | .id = -1, | |
248 | }; | |
249 | ||
250 | OMAP_MCBSP_PLATFORM_DEVICE(1); | |
251 | OMAP_MCBSP_PLATFORM_DEVICE(2); | |
252 | OMAP_MCBSP_PLATFORM_DEVICE(3); | |
253 | ||
254 | static void omap_init_audio(void) | |
255 | { | |
256 | platform_device_register(&omap_mcbsp1); | |
257 | platform_device_register(&omap_mcbsp2); | |
258 | if (!cpu_is_omap7xx()) | |
259 | platform_device_register(&omap_mcbsp3); | |
260 | platform_device_register(&omap_pcm); | |
261 | } | |
262 | ||
263 | #else | |
264 | static inline void omap_init_audio(void) {} | |
265 | #endif | |
266 | ||
7c38cf02 TL |
267 | /*-------------------------------------------------------------------------*/ |
268 | ||
269 | /* | |
270 | * This gets called after board-specific INIT_MACHINE, and initializes most | |
271 | * on-chip peripherals accessible on this board (except for few like USB): | |
272 | * | |
273 | * (a) Does any "standard config" pin muxing needed. Board-specific | |
274 | * code will have muxed GPIO pins and done "nonstandard" setup; | |
275 | * that code could live in the boot loader. | |
276 | * (b) Populating board-specific platform_data with the data drivers | |
277 | * rely on to handle wiring variations. | |
278 | * (c) Creating platform devices as meaningful on this board and | |
279 | * with this kernel configuration. | |
280 | * | |
281 | * Claiming GPIOs, and setting their direction and initial values, is the | |
282 | * responsibility of the device drivers. So is responding to probe(). | |
283 | * | |
25985edc | 284 | * Board-specific knowledge like creating devices or pin setup is to be |
7c38cf02 TL |
285 | * kept out of drivers as much as possible. In particular, pin setup |
286 | * may be handled by the boot loader, and drivers should expect it will | |
287 | * normally have been done by the time they're probed. | |
288 | */ | |
3179a019 | 289 | static int __init omap1_init_devices(void) |
7c38cf02 | 290 | { |
7f9187c2 TL |
291 | if (!cpu_class_is_omap1()) |
292 | return -ENODEV; | |
293 | ||
7c38cf02 TL |
294 | /* please keep these calls, and their implementations above, |
295 | * in alphabetical order so they're easier to sort through. | |
296 | */ | |
c40fae95 TL |
297 | |
298 | omap_init_mbox(); | |
7c38cf02 | 299 | omap_init_rtc(); |
c5c4dce4 | 300 | omap_init_spi100k(); |
9b6553cd | 301 | omap_init_sti(); |
f0fba2ad | 302 | omap_init_audio(); |
7c38cf02 TL |
303 | |
304 | return 0; | |
305 | } | |
3179a019 | 306 | arch_initcall(omap1_init_devices); |
7c38cf02 | 307 | |
f2ce6231 VC |
308 | #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) |
309 | ||
310 | static struct resource wdt_resources[] = { | |
311 | { | |
312 | .start = 0xfffeb000, | |
313 | .end = 0xfffeb07F, | |
314 | .flags = IORESOURCE_MEM, | |
315 | }, | |
316 | }; | |
317 | ||
318 | static struct platform_device omap_wdt_device = { | |
319 | .name = "omap_wdt", | |
320 | .id = -1, | |
321 | .num_resources = ARRAY_SIZE(wdt_resources), | |
322 | .resource = wdt_resources, | |
323 | }; | |
324 | ||
325 | static int __init omap_init_wdt(void) | |
326 | { | |
327 | if (!cpu_is_omap16xx()) | |
dfcccd3a | 328 | return -ENODEV; |
f2ce6231 | 329 | |
dfcccd3a | 330 | return platform_device_register(&omap_wdt_device); |
f2ce6231 VC |
331 | } |
332 | subsys_initcall(omap_init_wdt); | |
333 | #endif |