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7c38cf02 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/devices.c | |
3 | * | |
4 | * OMAP1 platform device setup/initialization | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | ||
7c38cf02 TL |
12 | #include <linux/module.h> |
13 | #include <linux/kernel.h> | |
14 | #include <linux/init.h> | |
d052d1be | 15 | #include <linux/platform_device.h> |
fced80c7 | 16 | #include <linux/io.h> |
c5c4dce4 | 17 | #include <linux/spi/spi.h> |
7c38cf02 | 18 | |
a09e64fb | 19 | #include <mach/hardware.h> |
7c38cf02 TL |
20 | #include <asm/mach/map.h> |
21 | ||
ce491cf8 TL |
22 | #include <plat/tc.h> |
23 | #include <plat/board.h> | |
24 | #include <plat/mux.h> | |
a09e64fb | 25 | #include <mach/gpio.h> |
ce491cf8 | 26 | #include <plat/mmc.h> |
c5c4dce4 | 27 | #include <plat/omap7xx.h> |
f0fba2ad | 28 | #include <plat/mcbsp.h> |
7c38cf02 | 29 | |
7c38cf02 TL |
30 | /*-------------------------------------------------------------------------*/ |
31 | ||
db68b189 | 32 | #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) |
7c38cf02 TL |
33 | |
34 | #define OMAP_RTC_BASE 0xfffb4800 | |
35 | ||
36 | static struct resource rtc_resources[] = { | |
37 | { | |
38 | .start = OMAP_RTC_BASE, | |
39 | .end = OMAP_RTC_BASE + 0x5f, | |
40 | .flags = IORESOURCE_MEM, | |
41 | }, | |
42 | { | |
43 | .start = INT_RTC_TIMER, | |
44 | .flags = IORESOURCE_IRQ, | |
45 | }, | |
46 | { | |
47 | .start = INT_RTC_ALARM, | |
48 | .flags = IORESOURCE_IRQ, | |
49 | }, | |
50 | }; | |
51 | ||
52 | static struct platform_device omap_rtc_device = { | |
53 | .name = "omap_rtc", | |
54 | .id = -1, | |
7c38cf02 TL |
55 | .num_resources = ARRAY_SIZE(rtc_resources), |
56 | .resource = rtc_resources, | |
57 | }; | |
58 | ||
59 | static void omap_init_rtc(void) | |
60 | { | |
61 | (void) platform_device_register(&omap_rtc_device); | |
62 | } | |
63 | #else | |
64 | static inline void omap_init_rtc(void) {} | |
65 | #endif | |
66 | ||
c40fae95 TL |
67 | #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE) |
68 | ||
69 | #if defined(CONFIG_ARCH_OMAP15XX) | |
70 | # define OMAP1_MBOX_SIZE 0x23 | |
71 | # define INT_DSP_MAILBOX1 INT_1510_DSP_MAILBOX1 | |
72 | #elif defined(CONFIG_ARCH_OMAP16XX) | |
73 | # define OMAP1_MBOX_SIZE 0x2f | |
74 | # define INT_DSP_MAILBOX1 INT_1610_DSP_MAILBOX1 | |
75 | #endif | |
76 | ||
d761585a | 77 | #define OMAP1_MBOX_BASE OMAP16XX_MAILBOX_BASE |
c40fae95 TL |
78 | |
79 | static struct resource mbox_resources[] = { | |
80 | { | |
81 | .start = OMAP1_MBOX_BASE, | |
82 | .end = OMAP1_MBOX_BASE + OMAP1_MBOX_SIZE, | |
83 | .flags = IORESOURCE_MEM, | |
84 | }, | |
85 | { | |
86 | .start = INT_DSP_MAILBOX1, | |
87 | .flags = IORESOURCE_IRQ, | |
88 | }, | |
89 | }; | |
90 | ||
91 | static struct platform_device mbox_device = { | |
f98d67a0 | 92 | .name = "omap1-mailbox", |
c40fae95 TL |
93 | .id = -1, |
94 | .num_resources = ARRAY_SIZE(mbox_resources), | |
95 | .resource = mbox_resources, | |
96 | }; | |
97 | ||
98 | static inline void omap_init_mbox(void) | |
99 | { | |
100 | platform_device_register(&mbox_device); | |
101 | } | |
102 | #else | |
103 | static inline void omap_init_mbox(void) { } | |
104 | #endif | |
105 | ||
d8874665 TL |
106 | /*-------------------------------------------------------------------------*/ |
107 | ||
108 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) | |
109 | ||
110 | static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, | |
111 | int controller_nr) | |
112 | { | |
113 | if (controller_nr == 0) { | |
490a5665 CM |
114 | if (cpu_is_omap7xx()) { |
115 | omap_cfg_reg(MMC_7XX_CMD); | |
116 | omap_cfg_reg(MMC_7XX_CLK); | |
117 | omap_cfg_reg(MMC_7XX_DAT0); | |
118 | } else { | |
119 | omap_cfg_reg(MMC_CMD); | |
120 | omap_cfg_reg(MMC_CLK); | |
121 | omap_cfg_reg(MMC_DAT0); | |
122 | } | |
123 | ||
d8874665 TL |
124 | if (cpu_is_omap1710()) { |
125 | omap_cfg_reg(M15_1710_MMC_CLKI); | |
126 | omap_cfg_reg(P19_1710_MMC_CMDDIR); | |
127 | omap_cfg_reg(P20_1710_MMC_DATDIR0); | |
128 | } | |
490a5665 | 129 | if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { |
d8874665 TL |
130 | omap_cfg_reg(MMC_DAT1); |
131 | /* NOTE: DAT2 can be on W10 (here) or M15 */ | |
132 | if (!mmc_controller->slots[0].nomux) | |
133 | omap_cfg_reg(MMC_DAT2); | |
134 | omap_cfg_reg(MMC_DAT3); | |
135 | } | |
136 | } | |
137 | ||
138 | /* Block 2 is on newer chips, and has many pinout options */ | |
139 | if (cpu_is_omap16xx() && controller_nr == 1) { | |
140 | if (!mmc_controller->slots[1].nomux) { | |
141 | omap_cfg_reg(Y8_1610_MMC2_CMD); | |
142 | omap_cfg_reg(Y10_1610_MMC2_CLK); | |
143 | omap_cfg_reg(R18_1610_MMC2_CLKIN); | |
144 | omap_cfg_reg(W8_1610_MMC2_DAT0); | |
90c62bf0 | 145 | if (mmc_controller->slots[1].wires == 4) { |
d8874665 TL |
146 | omap_cfg_reg(V8_1610_MMC2_DAT1); |
147 | omap_cfg_reg(W15_1610_MMC2_DAT2); | |
148 | omap_cfg_reg(R10_1610_MMC2_DAT3); | |
149 | } | |
150 | ||
151 | /* These are needed for the level shifter */ | |
152 | omap_cfg_reg(V9_1610_MMC2_CMDDIR); | |
153 | omap_cfg_reg(V5_1610_MMC2_DATDIR0); | |
154 | omap_cfg_reg(W19_1610_MMC2_DATDIR1); | |
155 | } | |
156 | ||
157 | /* Feedback clock must be set on OMAP-1710 MMC2 */ | |
158 | if (cpu_is_omap1710()) | |
159 | omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), | |
160 | MOD_CONF_CTRL_1); | |
161 | } | |
162 | } | |
163 | ||
164 | void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | |
165 | int nr_controllers) | |
166 | { | |
167 | int i; | |
168 | ||
169 | for (i = 0; i < nr_controllers; i++) { | |
170 | unsigned long base, size; | |
171 | unsigned int irq = 0; | |
172 | ||
173 | if (!mmc_data[i]) | |
174 | continue; | |
175 | ||
176 | omap1_mmc_mux(mmc_data[i], i); | |
177 | ||
178 | switch (i) { | |
179 | case 0: | |
180 | base = OMAP1_MMC1_BASE; | |
181 | irq = INT_MMC; | |
182 | break; | |
183 | case 1: | |
184 | if (!cpu_is_omap16xx()) | |
185 | return; | |
186 | base = OMAP1_MMC2_BASE; | |
187 | irq = INT_1610_MMC2; | |
188 | break; | |
189 | default: | |
190 | continue; | |
191 | } | |
192 | size = OMAP1_MMC_SIZE; | |
193 | ||
0dffb5c5 | 194 | omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]); |
d8874665 TL |
195 | }; |
196 | } | |
197 | ||
198 | #endif | |
199 | ||
200 | /*-------------------------------------------------------------------------*/ | |
201 | ||
c5c4dce4 CM |
202 | /* OMAP7xx SPI support */ |
203 | #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) | |
204 | ||
205 | struct platform_device omap_spi1 = { | |
206 | .name = "omap1_spi100k", | |
207 | .id = 1, | |
208 | }; | |
209 | ||
210 | struct platform_device omap_spi2 = { | |
211 | .name = "omap1_spi100k", | |
212 | .id = 2, | |
213 | }; | |
214 | ||
215 | static void omap_init_spi100k(void) | |
216 | { | |
217 | omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); | |
218 | if (omap_spi1.dev.platform_data) | |
219 | platform_device_register(&omap_spi1); | |
220 | ||
221 | omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); | |
222 | if (omap_spi2.dev.platform_data) | |
223 | platform_device_register(&omap_spi2); | |
224 | } | |
225 | ||
226 | #else | |
227 | static inline void omap_init_spi100k(void) | |
228 | { | |
229 | } | |
230 | #endif | |
231 | ||
232 | /*-------------------------------------------------------------------------*/ | |
233 | ||
9b6553cd TL |
234 | #if defined(CONFIG_OMAP_STI) |
235 | ||
646e3ed1 | 236 | #define OMAP1_STI_BASE 0xfffea000 |
9b6553cd TL |
237 | #define OMAP1_STI_CHANNEL_BASE (OMAP1_STI_BASE + 0x400) |
238 | ||
239 | static struct resource sti_resources[] = { | |
240 | { | |
241 | .start = OMAP1_STI_BASE, | |
242 | .end = OMAP1_STI_BASE + SZ_1K - 1, | |
243 | .flags = IORESOURCE_MEM, | |
244 | }, | |
245 | { | |
246 | .start = OMAP1_STI_CHANNEL_BASE, | |
247 | .end = OMAP1_STI_CHANNEL_BASE + SZ_1K - 1, | |
248 | .flags = IORESOURCE_MEM, | |
249 | }, | |
250 | { | |
251 | .start = INT_1610_STI, | |
252 | .flags = IORESOURCE_IRQ, | |
253 | } | |
254 | }; | |
255 | ||
256 | static struct platform_device sti_device = { | |
257 | .name = "sti", | |
258 | .id = -1, | |
9b6553cd TL |
259 | .num_resources = ARRAY_SIZE(sti_resources), |
260 | .resource = sti_resources, | |
261 | }; | |
262 | ||
263 | static inline void omap_init_sti(void) | |
264 | { | |
265 | platform_device_register(&sti_device); | |
266 | } | |
267 | #else | |
268 | static inline void omap_init_sti(void) {} | |
269 | #endif | |
7c38cf02 | 270 | |
f0fba2ad LG |
271 | #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) |
272 | ||
273 | static struct platform_device omap_pcm = { | |
274 | .name = "omap-pcm-audio", | |
275 | .id = -1, | |
276 | }; | |
277 | ||
278 | OMAP_MCBSP_PLATFORM_DEVICE(1); | |
279 | OMAP_MCBSP_PLATFORM_DEVICE(2); | |
280 | OMAP_MCBSP_PLATFORM_DEVICE(3); | |
281 | ||
282 | static void omap_init_audio(void) | |
283 | { | |
284 | platform_device_register(&omap_mcbsp1); | |
285 | platform_device_register(&omap_mcbsp2); | |
286 | if (!cpu_is_omap7xx()) | |
287 | platform_device_register(&omap_mcbsp3); | |
288 | platform_device_register(&omap_pcm); | |
289 | } | |
290 | ||
291 | #else | |
292 | static inline void omap_init_audio(void) {} | |
293 | #endif | |
294 | ||
7c38cf02 TL |
295 | /*-------------------------------------------------------------------------*/ |
296 | ||
297 | /* | |
298 | * This gets called after board-specific INIT_MACHINE, and initializes most | |
299 | * on-chip peripherals accessible on this board (except for few like USB): | |
300 | * | |
301 | * (a) Does any "standard config" pin muxing needed. Board-specific | |
302 | * code will have muxed GPIO pins and done "nonstandard" setup; | |
303 | * that code could live in the boot loader. | |
304 | * (b) Populating board-specific platform_data with the data drivers | |
305 | * rely on to handle wiring variations. | |
306 | * (c) Creating platform devices as meaningful on this board and | |
307 | * with this kernel configuration. | |
308 | * | |
309 | * Claiming GPIOs, and setting their direction and initial values, is the | |
310 | * responsibility of the device drivers. So is responding to probe(). | |
311 | * | |
312 | * Board-specific knowlege like creating devices or pin setup is to be | |
313 | * kept out of drivers as much as possible. In particular, pin setup | |
314 | * may be handled by the boot loader, and drivers should expect it will | |
315 | * normally have been done by the time they're probed. | |
316 | */ | |
3179a019 | 317 | static int __init omap1_init_devices(void) |
7c38cf02 TL |
318 | { |
319 | /* please keep these calls, and their implementations above, | |
320 | * in alphabetical order so they're easier to sort through. | |
321 | */ | |
c40fae95 TL |
322 | |
323 | omap_init_mbox(); | |
7c38cf02 | 324 | omap_init_rtc(); |
c5c4dce4 | 325 | omap_init_spi100k(); |
9b6553cd | 326 | omap_init_sti(); |
f0fba2ad | 327 | omap_init_audio(); |
7c38cf02 TL |
328 | |
329 | return 0; | |
330 | } | |
3179a019 | 331 | arch_initcall(omap1_init_devices); |
7c38cf02 | 332 |