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9d52342c VC |
1 | /* |
2 | * OMAP7xx specific gpio init | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Author: | |
7 | * Charulatha V <charu@ti.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License as | |
11 | * published by the Free Software Foundation version 2. | |
12 | * | |
13 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
14 | * kind, whether express or implied; without even the implied warranty | |
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | */ | |
18 | ||
19 | #include <linux/gpio.h> | |
4b25408f | 20 | #include <linux/platform_data/gpio-omap.h> |
873e6980 TL |
21 | |
22 | #include <mach/irqs.h> | |
9d52342c VC |
23 | |
24 | #define OMAP7XX_GPIO1_BASE 0xfffbc000 | |
25 | #define OMAP7XX_GPIO2_BASE 0xfffbc800 | |
26 | #define OMAP7XX_GPIO3_BASE 0xfffbd000 | |
27 | #define OMAP7XX_GPIO4_BASE 0xfffbd800 | |
28 | #define OMAP7XX_GPIO5_BASE 0xfffbe000 | |
29 | #define OMAP7XX_GPIO6_BASE 0xfffbe800 | |
30 | #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE | |
31 | ||
32 | /* mpu gpio */ | |
33 | static struct __initdata resource omap7xx_mpu_gpio_resources[] = { | |
34 | { | |
35 | .start = OMAP1_MPUIO_VBASE, | |
36 | .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, | |
37 | .flags = IORESOURCE_MEM, | |
38 | }, | |
39 | { | |
40 | .start = INT_7XX_MPUIO, | |
41 | .flags = IORESOURCE_IRQ, | |
42 | }, | |
43 | }; | |
44 | ||
fa87931a | 45 | static struct omap_gpio_reg_offs omap7xx_mpuio_regs = { |
e5ff4440 | 46 | .revision = USHRT_MAX, |
fa87931a KH |
47 | .direction = OMAP_MPUIO_IO_CNTL / 2, |
48 | .datain = OMAP_MPUIO_INPUT_LATCH / 2, | |
49 | .dataout = OMAP_MPUIO_OUTPUT / 2, | |
eef4bec7 | 50 | .irqstatus = OMAP_MPUIO_GPIO_INT / 2, |
28f3b5a0 KH |
51 | .irqenable = OMAP_MPUIO_GPIO_MASKIT / 2, |
52 | .irqenable_inv = true, | |
5e571f38 | 53 | .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE >> 1, |
fa87931a KH |
54 | }; |
55 | ||
9d52342c | 56 | static struct __initdata omap_gpio_platform_data omap7xx_mpu_gpio_config = { |
d0d665a8 | 57 | .is_mpuio = true, |
ec9af5d9 | 58 | .bank_width = 16, |
5de62b86 | 59 | .bank_stride = 2, |
fa87931a | 60 | .regs = &omap7xx_mpuio_regs, |
9d52342c VC |
61 | }; |
62 | ||
07ad6ab3 | 63 | static struct platform_device omap7xx_mpu_gpio = { |
9d52342c VC |
64 | .name = "omap_gpio", |
65 | .id = 0, | |
66 | .dev = { | |
67 | .platform_data = &omap7xx_mpu_gpio_config, | |
68 | }, | |
69 | .num_resources = ARRAY_SIZE(omap7xx_mpu_gpio_resources), | |
70 | .resource = omap7xx_mpu_gpio_resources, | |
71 | }; | |
72 | ||
73 | /* gpio1 */ | |
74 | static struct __initdata resource omap7xx_gpio1_resources[] = { | |
75 | { | |
76 | .start = OMAP7XX_GPIO1_BASE, | |
77 | .end = OMAP7XX_GPIO1_BASE + SZ_2K - 1, | |
78 | .flags = IORESOURCE_MEM, | |
79 | }, | |
80 | { | |
81 | .start = INT_7XX_GPIO_BANK1, | |
82 | .flags = IORESOURCE_IRQ, | |
83 | }, | |
84 | }; | |
85 | ||
fa87931a | 86 | static struct omap_gpio_reg_offs omap7xx_gpio_regs = { |
e5ff4440 | 87 | .revision = USHRT_MAX, |
fa87931a KH |
88 | .direction = OMAP7XX_GPIO_DIR_CONTROL, |
89 | .datain = OMAP7XX_GPIO_DATA_INPUT, | |
90 | .dataout = OMAP7XX_GPIO_DATA_OUTPUT, | |
eef4bec7 | 91 | .irqstatus = OMAP7XX_GPIO_INT_STATUS, |
28f3b5a0 KH |
92 | .irqenable = OMAP7XX_GPIO_INT_MASK, |
93 | .irqenable_inv = true, | |
5e571f38 | 94 | .irqctrl = OMAP7XX_GPIO_INT_CONTROL, |
fa87931a KH |
95 | }; |
96 | ||
9d52342c | 97 | static struct __initdata omap_gpio_platform_data omap7xx_gpio1_config = { |
9d52342c | 98 | .bank_width = 32, |
fa87931a | 99 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
100 | }; |
101 | ||
07ad6ab3 | 102 | static struct platform_device omap7xx_gpio1 = { |
9d52342c VC |
103 | .name = "omap_gpio", |
104 | .id = 1, | |
105 | .dev = { | |
106 | .platform_data = &omap7xx_gpio1_config, | |
107 | }, | |
108 | .num_resources = ARRAY_SIZE(omap7xx_gpio1_resources), | |
109 | .resource = omap7xx_gpio1_resources, | |
110 | }; | |
111 | ||
112 | /* gpio2 */ | |
113 | static struct __initdata resource omap7xx_gpio2_resources[] = { | |
114 | { | |
115 | .start = OMAP7XX_GPIO2_BASE, | |
116 | .end = OMAP7XX_GPIO2_BASE + SZ_2K - 1, | |
117 | .flags = IORESOURCE_MEM, | |
118 | }, | |
119 | { | |
120 | .start = INT_7XX_GPIO_BANK2, | |
121 | .flags = IORESOURCE_IRQ, | |
122 | }, | |
123 | }; | |
124 | ||
125 | static struct __initdata omap_gpio_platform_data omap7xx_gpio2_config = { | |
9d52342c | 126 | .bank_width = 32, |
fa87931a | 127 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
128 | }; |
129 | ||
07ad6ab3 | 130 | static struct platform_device omap7xx_gpio2 = { |
9d52342c VC |
131 | .name = "omap_gpio", |
132 | .id = 2, | |
133 | .dev = { | |
134 | .platform_data = &omap7xx_gpio2_config, | |
135 | }, | |
136 | .num_resources = ARRAY_SIZE(omap7xx_gpio2_resources), | |
137 | .resource = omap7xx_gpio2_resources, | |
138 | }; | |
139 | ||
140 | /* gpio3 */ | |
141 | static struct __initdata resource omap7xx_gpio3_resources[] = { | |
142 | { | |
143 | .start = OMAP7XX_GPIO3_BASE, | |
144 | .end = OMAP7XX_GPIO3_BASE + SZ_2K - 1, | |
145 | .flags = IORESOURCE_MEM, | |
146 | }, | |
147 | { | |
148 | .start = INT_7XX_GPIO_BANK3, | |
149 | .flags = IORESOURCE_IRQ, | |
150 | }, | |
151 | }; | |
152 | ||
153 | static struct __initdata omap_gpio_platform_data omap7xx_gpio3_config = { | |
9d52342c | 154 | .bank_width = 32, |
fa87931a | 155 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
156 | }; |
157 | ||
07ad6ab3 | 158 | static struct platform_device omap7xx_gpio3 = { |
9d52342c VC |
159 | .name = "omap_gpio", |
160 | .id = 3, | |
161 | .dev = { | |
162 | .platform_data = &omap7xx_gpio3_config, | |
163 | }, | |
164 | .num_resources = ARRAY_SIZE(omap7xx_gpio3_resources), | |
165 | .resource = omap7xx_gpio3_resources, | |
166 | }; | |
167 | ||
168 | /* gpio4 */ | |
169 | static struct __initdata resource omap7xx_gpio4_resources[] = { | |
170 | { | |
171 | .start = OMAP7XX_GPIO4_BASE, | |
172 | .end = OMAP7XX_GPIO4_BASE + SZ_2K - 1, | |
173 | .flags = IORESOURCE_MEM, | |
174 | }, | |
175 | { | |
176 | .start = INT_7XX_GPIO_BANK4, | |
177 | .flags = IORESOURCE_IRQ, | |
178 | }, | |
179 | }; | |
180 | ||
181 | static struct __initdata omap_gpio_platform_data omap7xx_gpio4_config = { | |
9d52342c | 182 | .bank_width = 32, |
fa87931a | 183 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
184 | }; |
185 | ||
07ad6ab3 | 186 | static struct platform_device omap7xx_gpio4 = { |
9d52342c VC |
187 | .name = "omap_gpio", |
188 | .id = 4, | |
189 | .dev = { | |
190 | .platform_data = &omap7xx_gpio4_config, | |
191 | }, | |
192 | .num_resources = ARRAY_SIZE(omap7xx_gpio4_resources), | |
193 | .resource = omap7xx_gpio4_resources, | |
194 | }; | |
195 | ||
196 | /* gpio5 */ | |
197 | static struct __initdata resource omap7xx_gpio5_resources[] = { | |
198 | { | |
199 | .start = OMAP7XX_GPIO5_BASE, | |
200 | .end = OMAP7XX_GPIO5_BASE + SZ_2K - 1, | |
201 | .flags = IORESOURCE_MEM, | |
202 | }, | |
203 | { | |
204 | .start = INT_7XX_GPIO_BANK5, | |
205 | .flags = IORESOURCE_IRQ, | |
206 | }, | |
207 | }; | |
208 | ||
209 | static struct __initdata omap_gpio_platform_data omap7xx_gpio5_config = { | |
9d52342c | 210 | .bank_width = 32, |
fa87931a | 211 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
212 | }; |
213 | ||
07ad6ab3 | 214 | static struct platform_device omap7xx_gpio5 = { |
9d52342c VC |
215 | .name = "omap_gpio", |
216 | .id = 5, | |
217 | .dev = { | |
218 | .platform_data = &omap7xx_gpio5_config, | |
219 | }, | |
220 | .num_resources = ARRAY_SIZE(omap7xx_gpio5_resources), | |
221 | .resource = omap7xx_gpio5_resources, | |
222 | }; | |
223 | ||
224 | /* gpio6 */ | |
225 | static struct __initdata resource omap7xx_gpio6_resources[] = { | |
226 | { | |
227 | .start = OMAP7XX_GPIO6_BASE, | |
228 | .end = OMAP7XX_GPIO6_BASE + SZ_2K - 1, | |
229 | .flags = IORESOURCE_MEM, | |
230 | }, | |
231 | { | |
232 | .start = INT_7XX_GPIO_BANK6, | |
233 | .flags = IORESOURCE_IRQ, | |
234 | }, | |
235 | }; | |
236 | ||
237 | static struct __initdata omap_gpio_platform_data omap7xx_gpio6_config = { | |
9d52342c | 238 | .bank_width = 32, |
fa87931a | 239 | .regs = &omap7xx_gpio_regs, |
9d52342c VC |
240 | }; |
241 | ||
07ad6ab3 | 242 | static struct platform_device omap7xx_gpio6 = { |
9d52342c VC |
243 | .name = "omap_gpio", |
244 | .id = 6, | |
245 | .dev = { | |
246 | .platform_data = &omap7xx_gpio6_config, | |
247 | }, | |
248 | .num_resources = ARRAY_SIZE(omap7xx_gpio6_resources), | |
249 | .resource = omap7xx_gpio6_resources, | |
250 | }; | |
251 | ||
252 | static struct __initdata platform_device * omap7xx_gpio_dev[] = { | |
253 | &omap7xx_mpu_gpio, | |
254 | &omap7xx_gpio1, | |
255 | &omap7xx_gpio2, | |
256 | &omap7xx_gpio3, | |
257 | &omap7xx_gpio4, | |
258 | &omap7xx_gpio5, | |
259 | &omap7xx_gpio6, | |
260 | }; | |
261 | ||
262 | /* | |
263 | * omap7xx_gpio_init needs to be done before | |
264 | * machine_init functions access gpio APIs. | |
265 | * Hence omap7xx_gpio_init is a postcore_initcall. | |
266 | */ | |
267 | static int __init omap7xx_gpio_init(void) | |
268 | { | |
269 | int i; | |
270 | ||
271 | if (!cpu_is_omap7xx()) | |
272 | return -EINVAL; | |
273 | ||
274 | for (i = 0; i < ARRAY_SIZE(omap7xx_gpio_dev); i++) | |
275 | platform_device_register(omap7xx_gpio_dev[i]); | |
276 | ||
9d52342c VC |
277 | return 0; |
278 | } | |
279 | postcore_initcall(omap7xx_gpio_init); |