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Commit | Line | Data |
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dd0cdd88 | 1 | /* |
4d94b4a2 | 2 | * Platform level USB initialization for FS USB OTG controller on omap1 |
dd0cdd88 TL |
3 | * |
4 | * Copyright (C) 2004 Texas Instruments, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | ||
27 | #include <asm/irq.h> | |
28 | ||
70c494c3 | 29 | #include <mach/mux.h> |
b924b204 TL |
30 | |
31 | #include <mach/usb.h> | |
dd0cdd88 | 32 | |
d3645d39 PW |
33 | #include "common.h" |
34 | ||
dd0cdd88 TL |
35 | /* These routines should handle the standard chip-specific modes |
36 | * for usb0/1/2 ports, covering basic mux and transceiver setup. | |
37 | * | |
38 | * Some board-*.c files will need to set up additional mux options, | |
39 | * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. | |
40 | */ | |
41 | ||
42 | /* TESTED ON: | |
43 | * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables | |
44 | * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables | |
45 | * - 5912 OSK UDC, with *nonstandard* A-to-A cable | |
46 | * - 1510 Innovator UDC with bundled usb0 cable | |
47 | * - 1510 Innovator OHCI with bundled usb1/usb2 cable | |
48 | * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS | |
49 | * - 1710 custom development board using alternate pin group | |
50 | * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables | |
51 | */ | |
52 | ||
53 | #define INT_USB_IRQ_GEN IH2_BASE + 20 | |
54 | #define INT_USB_IRQ_NISO IH2_BASE + 30 | |
55 | #define INT_USB_IRQ_ISO IH2_BASE + 29 | |
56 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 | |
57 | #define INT_USB_IRQ_OTG IH2_BASE + 8 | |
58 | ||
b924b204 TL |
59 | #ifdef CONFIG_ARCH_OMAP_OTG |
60 | ||
bde49e59 | 61 | static void __init |
b924b204 TL |
62 | omap_otg_init(struct omap_usb_config *config) |
63 | { | |
64 | u32 syscon; | |
65 | int alt_pingroup = 0; | |
4d94b4a2 | 66 | u16 w; |
b924b204 TL |
67 | |
68 | /* NOTE: no bus or clock setup (yet?) */ | |
69 | ||
70 | syscon = omap_readl(OTG_SYSCON_1) & 0xffff; | |
71 | if (!(syscon & OTG_RESET_DONE)) | |
72 | pr_debug("USB resets not complete?\n"); | |
73 | ||
74 | //omap_writew(0, OTG_IRQ_EN); | |
75 | ||
76 | /* pin muxing and transceiver pinouts */ | |
77 | if (config->pins[0] > 2) /* alt pingroup 2 */ | |
78 | alt_pingroup = 1; | |
79 | syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); | |
80 | syscon |= config->usb1_init(config->pins[1]); | |
81 | syscon |= config->usb2_init(config->pins[2], alt_pingroup); | |
82 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | |
83 | omap_writel(syscon, OTG_SYSCON_1); | |
84 | ||
85 | syscon = config->hmc_mode; | |
86 | syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; | |
87 | #ifdef CONFIG_USB_OTG | |
88 | if (config->otg) | |
89 | syscon |= OTG_EN; | |
90 | #endif | |
4d94b4a2 AK |
91 | pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", |
92 | omap_readl(USB_TRANSCEIVER_CTRL)); | |
b924b204 TL |
93 | pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); |
94 | omap_writel(syscon, OTG_SYSCON_2); | |
95 | ||
96 | printk("USB: hmc %d", config->hmc_mode); | |
97 | if (!alt_pingroup) | |
7e600cad | 98 | pr_cont(", usb2 alt %d wires", config->pins[2]); |
b924b204 | 99 | else if (config->pins[0]) |
7e600cad | 100 | pr_cont(", usb0 %d wires%s", config->pins[0], |
b924b204 TL |
101 | is_usb0_device(config) ? " (dev)" : ""); |
102 | if (config->pins[1]) | |
7e600cad | 103 | pr_cont(", usb1 %d wires", config->pins[1]); |
b924b204 | 104 | if (!alt_pingroup && config->pins[2]) |
7e600cad | 105 | pr_cont(", usb2 %d wires", config->pins[2]); |
b924b204 | 106 | if (config->otg) |
7e600cad AK |
107 | pr_cont(", Mini-AB on usb%d", config->otg - 1); |
108 | pr_cont("\n"); | |
b924b204 | 109 | |
4d94b4a2 AK |
110 | /* leave USB clocks/controllers off until needed */ |
111 | w = omap_readw(ULPD_SOFT_REQ); | |
112 | w &= ~SOFT_USB_CLK_REQ; | |
113 | omap_writew(w, ULPD_SOFT_REQ); | |
b924b204 | 114 | |
4d94b4a2 AK |
115 | w = omap_readw(ULPD_CLOCK_CTRL); |
116 | w &= ~USB_MCLK_EN; | |
117 | w |= DIS_USB_PVCI_CLK; | |
118 | omap_writew(w, ULPD_CLOCK_CTRL); | |
b924b204 | 119 | |
b924b204 TL |
120 | syscon = omap_readl(OTG_SYSCON_1); |
121 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; | |
122 | ||
0345a1e3 | 123 | #if IS_ENABLED(CONFIG_USB_OMAP) |
b924b204 TL |
124 | if (config->otg || config->register_dev) { |
125 | struct platform_device *udc_device = config->udc_device; | |
126 | int status; | |
127 | ||
128 | syscon &= ~DEV_IDLE_EN; | |
129 | udc_device->dev.platform_data = config; | |
130 | status = platform_device_register(udc_device); | |
131 | if (status) | |
132 | pr_debug("can't register UDC device, %d\n", status); | |
133 | } | |
134 | #endif | |
135 | ||
fcebddb9 | 136 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) |
b924b204 TL |
137 | if (config->otg || config->register_host) { |
138 | struct platform_device *ohci_device = config->ohci_device; | |
139 | int status; | |
140 | ||
141 | syscon &= ~HST_IDLE_EN; | |
142 | ohci_device->dev.platform_data = config; | |
143 | status = platform_device_register(ohci_device); | |
144 | if (status) | |
145 | pr_debug("can't register OHCI device, %d\n", status); | |
146 | } | |
147 | #endif | |
148 | ||
149 | #ifdef CONFIG_USB_OTG | |
150 | if (config->otg) { | |
151 | struct platform_device *otg_device = config->otg_device; | |
152 | int status; | |
153 | ||
154 | syscon &= ~OTG_IDLE_EN; | |
155 | otg_device->dev.platform_data = config; | |
156 | status = platform_device_register(otg_device); | |
157 | if (status) | |
158 | pr_debug("can't register OTG device, %d\n", status); | |
159 | } | |
160 | #endif | |
161 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | |
162 | omap_writel(syscon, OTG_SYSCON_1); | |
163 | } | |
164 | ||
165 | #else | |
bde49e59 | 166 | static void omap_otg_init(struct omap_usb_config *config) {} |
b924b204 TL |
167 | #endif |
168 | ||
0345a1e3 | 169 | #if IS_ENABLED(CONFIG_USB_OMAP) |
dd0cdd88 TL |
170 | |
171 | static struct resource udc_resources[] = { | |
172 | /* order is significant! */ | |
173 | { /* registers */ | |
174 | .start = UDC_BASE, | |
175 | .end = UDC_BASE + 0xff, | |
176 | .flags = IORESOURCE_MEM, | |
177 | }, { /* general IRQ */ | |
178 | .start = INT_USB_IRQ_GEN, | |
179 | .flags = IORESOURCE_IRQ, | |
180 | }, { /* PIO IRQ */ | |
181 | .start = INT_USB_IRQ_NISO, | |
182 | .flags = IORESOURCE_IRQ, | |
183 | }, { /* SOF IRQ */ | |
184 | .start = INT_USB_IRQ_ISO, | |
185 | .flags = IORESOURCE_IRQ, | |
186 | }, | |
187 | }; | |
188 | ||
189 | static u64 udc_dmamask = ~(u32)0; | |
190 | ||
191 | static struct platform_device udc_device = { | |
192 | .name = "omap_udc", | |
193 | .id = -1, | |
194 | .dev = { | |
195 | .dma_mask = &udc_dmamask, | |
196 | .coherent_dma_mask = 0xffffffff, | |
197 | }, | |
198 | .num_resources = ARRAY_SIZE(udc_resources), | |
199 | .resource = udc_resources, | |
200 | }; | |
201 | ||
202 | static inline void udc_device_init(struct omap_usb_config *pdata) | |
203 | { | |
204 | /* IRQ numbers for omap7xx */ | |
205 | if(cpu_is_omap7xx()) { | |
206 | udc_resources[1].start = INT_7XX_USB_GENI; | |
207 | udc_resources[2].start = INT_7XX_USB_NON_ISO; | |
208 | udc_resources[3].start = INT_7XX_USB_ISO; | |
209 | } | |
210 | pdata->udc_device = &udc_device; | |
211 | } | |
212 | ||
213 | #else | |
214 | ||
215 | static inline void udc_device_init(struct omap_usb_config *pdata) | |
216 | { | |
217 | } | |
218 | ||
219 | #endif | |
220 | ||
fcebddb9 | 221 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) |
dd0cdd88 TL |
222 | |
223 | /* The dmamask must be set for OHCI to work */ | |
224 | static u64 ohci_dmamask = ~(u32)0; | |
225 | ||
226 | static struct resource ohci_resources[] = { | |
227 | { | |
228 | .start = OMAP_OHCI_BASE, | |
229 | .end = OMAP_OHCI_BASE + 0xff, | |
230 | .flags = IORESOURCE_MEM, | |
231 | }, | |
232 | { | |
233 | .start = INT_USB_IRQ_HGEN, | |
234 | .flags = IORESOURCE_IRQ, | |
235 | }, | |
236 | }; | |
237 | ||
238 | static struct platform_device ohci_device = { | |
239 | .name = "ohci", | |
240 | .id = -1, | |
241 | .dev = { | |
242 | .dma_mask = &ohci_dmamask, | |
243 | .coherent_dma_mask = 0xffffffff, | |
244 | }, | |
245 | .num_resources = ARRAY_SIZE(ohci_resources), | |
246 | .resource = ohci_resources, | |
247 | }; | |
248 | ||
249 | static inline void ohci_device_init(struct omap_usb_config *pdata) | |
250 | { | |
251 | if (cpu_is_omap7xx()) | |
252 | ohci_resources[1].start = INT_7XX_USB_HHC_1; | |
253 | pdata->ohci_device = &ohci_device; | |
d3645d39 | 254 | pdata->ocpi_enable = &ocpi_enable; |
dd0cdd88 TL |
255 | } |
256 | ||
257 | #else | |
258 | ||
259 | static inline void ohci_device_init(struct omap_usb_config *pdata) | |
260 | { | |
261 | } | |
262 | ||
263 | #endif | |
264 | ||
265 | #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) | |
266 | ||
267 | static struct resource otg_resources[] = { | |
268 | /* order is significant! */ | |
269 | { | |
270 | .start = OTG_BASE, | |
271 | .end = OTG_BASE + 0xff, | |
272 | .flags = IORESOURCE_MEM, | |
273 | }, { | |
274 | .start = INT_USB_IRQ_OTG, | |
275 | .flags = IORESOURCE_IRQ, | |
276 | }, | |
277 | }; | |
278 | ||
279 | static struct platform_device otg_device = { | |
280 | .name = "omap_otg", | |
281 | .id = -1, | |
282 | .num_resources = ARRAY_SIZE(otg_resources), | |
283 | .resource = otg_resources, | |
284 | }; | |
285 | ||
286 | static inline void otg_device_init(struct omap_usb_config *pdata) | |
287 | { | |
288 | if (cpu_is_omap7xx()) | |
289 | otg_resources[1].start = INT_7XX_USB_OTG; | |
290 | pdata->otg_device = &otg_device; | |
291 | } | |
292 | ||
293 | #else | |
294 | ||
295 | static inline void otg_device_init(struct omap_usb_config *pdata) | |
296 | { | |
297 | } | |
298 | ||
299 | #endif | |
300 | ||
eba36d77 | 301 | static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) |
dd0cdd88 TL |
302 | { |
303 | u32 syscon1 = 0; | |
304 | ||
305 | if (nwires == 0) { | |
306 | if (!cpu_is_omap15xx()) { | |
307 | u32 l; | |
308 | ||
309 | /* pulldown D+/D- */ | |
310 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
311 | l &= ~(3 << 1); | |
312 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
313 | } | |
314 | return 0; | |
315 | } | |
316 | ||
317 | if (is_device) { | |
318 | if (cpu_is_omap7xx()) { | |
319 | omap_cfg_reg(AA17_7XX_USB_DM); | |
320 | omap_cfg_reg(W16_7XX_USB_PU_EN); | |
321 | omap_cfg_reg(W17_7XX_USB_VBUSI); | |
322 | omap_cfg_reg(W18_7XX_USB_DMCK_OUT); | |
323 | omap_cfg_reg(W19_7XX_USB_DCRST); | |
324 | } else | |
325 | omap_cfg_reg(W4_USB_PUEN); | |
326 | } | |
327 | ||
328 | if (nwires == 2) { | |
329 | u32 l; | |
330 | ||
331 | // omap_cfg_reg(P9_USB_DP); | |
332 | // omap_cfg_reg(R8_USB_DM); | |
333 | ||
334 | if (cpu_is_omap15xx()) { | |
335 | /* This works on 1510-Innovator */ | |
336 | return 0; | |
337 | } | |
338 | ||
339 | /* NOTES: | |
340 | * - peripheral should configure VBUS detection! | |
341 | * - only peripherals may use the internal D+/D- pulldowns | |
342 | * - OTG support on this port not yet written | |
343 | */ | |
344 | ||
345 | /* Don't do this for omap7xx -- it causes USB to not work correctly */ | |
346 | if (!cpu_is_omap7xx()) { | |
347 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
348 | l &= ~(7 << 4); | |
349 | if (!is_device) | |
350 | l |= (3 << 1); | |
351 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
352 | } | |
353 | ||
354 | return 3 << 16; | |
355 | } | |
356 | ||
357 | /* alternate pin config, external transceiver */ | |
358 | if (cpu_is_omap15xx()) { | |
359 | printk(KERN_ERR "no usb0 alt pin config on 15xx\n"); | |
360 | return 0; | |
361 | } | |
362 | ||
363 | omap_cfg_reg(V6_USB0_TXD); | |
364 | omap_cfg_reg(W9_USB0_TXEN); | |
365 | omap_cfg_reg(W5_USB0_SE0); | |
366 | if (nwires != 3) | |
367 | omap_cfg_reg(Y5_USB0_RCV); | |
368 | ||
369 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts | |
370 | * may be able to use I2C requests to set those bits along | |
371 | * with VBUS switching and overcurrent detection. | |
372 | */ | |
373 | ||
374 | if (nwires != 6) { | |
375 | u32 l; | |
376 | ||
377 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
378 | l &= ~CONF_USB2_UNI_R; | |
379 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
380 | } | |
381 | ||
382 | switch (nwires) { | |
383 | case 3: | |
384 | syscon1 = 2; | |
385 | break; | |
386 | case 4: | |
387 | syscon1 = 1; | |
388 | break; | |
389 | case 6: | |
390 | syscon1 = 3; | |
391 | { | |
392 | u32 l; | |
393 | ||
394 | omap_cfg_reg(AA9_USB0_VP); | |
395 | omap_cfg_reg(R9_USB0_VM); | |
396 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
397 | l |= CONF_USB2_UNI_R; | |
398 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
399 | } | |
400 | break; | |
401 | default: | |
402 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
403 | 0, nwires); | |
404 | } | |
405 | ||
406 | return syscon1 << 16; | |
407 | } | |
408 | ||
eba36d77 | 409 | static u32 __init omap1_usb1_init(unsigned nwires) |
dd0cdd88 TL |
410 | { |
411 | u32 syscon1 = 0; | |
412 | ||
413 | if (!cpu_is_omap15xx() && nwires != 6) { | |
414 | u32 l; | |
415 | ||
416 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
417 | l &= ~CONF_USB1_UNI_R; | |
418 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
419 | } | |
420 | if (nwires == 0) | |
421 | return 0; | |
422 | ||
423 | /* external transceiver */ | |
424 | omap_cfg_reg(USB1_TXD); | |
425 | omap_cfg_reg(USB1_TXEN); | |
426 | if (nwires != 3) | |
427 | omap_cfg_reg(USB1_RCV); | |
428 | ||
429 | if (cpu_is_omap15xx()) { | |
430 | omap_cfg_reg(USB1_SEO); | |
431 | omap_cfg_reg(USB1_SPEED); | |
432 | // SUSP | |
433 | } else if (cpu_is_omap1610() || cpu_is_omap5912()) { | |
434 | omap_cfg_reg(W13_1610_USB1_SE0); | |
435 | omap_cfg_reg(R13_1610_USB1_SPEED); | |
436 | // SUSP | |
437 | } else if (cpu_is_omap1710()) { | |
438 | omap_cfg_reg(R13_1710_USB1_SE0); | |
439 | // SUSP | |
440 | } else { | |
441 | pr_debug("usb%d cpu unrecognized\n", 1); | |
442 | return 0; | |
443 | } | |
444 | ||
445 | switch (nwires) { | |
446 | case 2: | |
447 | goto bad; | |
448 | case 3: | |
449 | syscon1 = 2; | |
450 | break; | |
451 | case 4: | |
452 | syscon1 = 1; | |
453 | break; | |
454 | case 6: | |
455 | syscon1 = 3; | |
456 | omap_cfg_reg(USB1_VP); | |
457 | omap_cfg_reg(USB1_VM); | |
458 | if (!cpu_is_omap15xx()) { | |
459 | u32 l; | |
460 | ||
461 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
462 | l |= CONF_USB1_UNI_R; | |
463 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
464 | } | |
465 | break; | |
466 | default: | |
467 | bad: | |
468 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
469 | 1, nwires); | |
470 | } | |
471 | ||
472 | return syscon1 << 20; | |
473 | } | |
474 | ||
eba36d77 | 475 | static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) |
dd0cdd88 TL |
476 | { |
477 | u32 syscon1 = 0; | |
478 | ||
479 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | |
480 | if (alt_pingroup || nwires == 0) | |
481 | return 0; | |
482 | ||
483 | if (!cpu_is_omap15xx() && nwires != 6) { | |
484 | u32 l; | |
485 | ||
486 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
487 | l &= ~CONF_USB2_UNI_R; | |
488 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
489 | } | |
490 | ||
491 | /* external transceiver */ | |
492 | if (cpu_is_omap15xx()) { | |
493 | omap_cfg_reg(USB2_TXD); | |
494 | omap_cfg_reg(USB2_TXEN); | |
495 | omap_cfg_reg(USB2_SEO); | |
496 | if (nwires != 3) | |
497 | omap_cfg_reg(USB2_RCV); | |
498 | /* there is no USB2_SPEED */ | |
499 | } else if (cpu_is_omap16xx()) { | |
500 | omap_cfg_reg(V6_USB2_TXD); | |
501 | omap_cfg_reg(W9_USB2_TXEN); | |
502 | omap_cfg_reg(W5_USB2_SE0); | |
503 | if (nwires != 3) | |
504 | omap_cfg_reg(Y5_USB2_RCV); | |
505 | // FIXME omap_cfg_reg(USB2_SPEED); | |
506 | } else { | |
507 | pr_debug("usb%d cpu unrecognized\n", 1); | |
508 | return 0; | |
509 | } | |
510 | ||
511 | // omap_cfg_reg(USB2_SUSP); | |
512 | ||
513 | switch (nwires) { | |
514 | case 2: | |
515 | goto bad; | |
516 | case 3: | |
517 | syscon1 = 2; | |
518 | break; | |
519 | case 4: | |
520 | syscon1 = 1; | |
521 | break; | |
522 | case 5: | |
523 | goto bad; | |
524 | case 6: | |
525 | syscon1 = 3; | |
526 | if (cpu_is_omap15xx()) { | |
527 | omap_cfg_reg(USB2_VP); | |
528 | omap_cfg_reg(USB2_VM); | |
529 | } else { | |
530 | u32 l; | |
531 | ||
532 | omap_cfg_reg(AA9_USB2_VP); | |
533 | omap_cfg_reg(R9_USB2_VM); | |
534 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
535 | l |= CONF_USB2_UNI_R; | |
536 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
537 | } | |
538 | break; | |
539 | default: | |
540 | bad: | |
541 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
542 | 2, nwires); | |
543 | } | |
544 | ||
545 | return syscon1 << 24; | |
546 | } | |
547 | ||
548 | #ifdef CONFIG_ARCH_OMAP15XX | |
549 | ||
550 | /* ULPD_DPLL_CTRL */ | |
551 | #define DPLL_IOB (1 << 13) | |
552 | #define DPLL_PLL_ENABLE (1 << 4) | |
553 | #define DPLL_LOCK (1 << 0) | |
554 | ||
555 | /* ULPD_APLL_CTRL */ | |
556 | #define APLL_NDPLL_SWITCH (1 << 0) | |
557 | ||
558 | static void __init omap_1510_usb_init(struct omap_usb_config *config) | |
559 | { | |
560 | unsigned int val; | |
561 | u16 w; | |
562 | ||
563 | config->usb0_init(config->pins[0], is_usb0_device(config)); | |
564 | config->usb1_init(config->pins[1]); | |
565 | config->usb2_init(config->pins[2], 0); | |
566 | ||
567 | val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); | |
568 | val |= (config->hmc_mode << 1); | |
569 | omap_writel(val, MOD_CONF_CTRL_0); | |
570 | ||
571 | printk("USB: hmc %d", config->hmc_mode); | |
572 | if (config->pins[0]) | |
7e600cad | 573 | pr_cont(", usb0 %d wires%s", config->pins[0], |
dd0cdd88 TL |
574 | is_usb0_device(config) ? " (dev)" : ""); |
575 | if (config->pins[1]) | |
7e600cad | 576 | pr_cont(", usb1 %d wires", config->pins[1]); |
dd0cdd88 | 577 | if (config->pins[2]) |
7e600cad AK |
578 | pr_cont(", usb2 %d wires", config->pins[2]); |
579 | pr_cont("\n"); | |
dd0cdd88 TL |
580 | |
581 | /* use DPLL for 48 MHz function clock */ | |
582 | pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), | |
583 | omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); | |
584 | ||
585 | w = omap_readw(ULPD_APLL_CTRL); | |
586 | w &= ~APLL_NDPLL_SWITCH; | |
587 | omap_writew(w, ULPD_APLL_CTRL); | |
588 | ||
589 | w = omap_readw(ULPD_DPLL_CTRL); | |
590 | w |= DPLL_IOB | DPLL_PLL_ENABLE; | |
591 | omap_writew(w, ULPD_DPLL_CTRL); | |
592 | ||
593 | w = omap_readw(ULPD_SOFT_REQ); | |
594 | w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; | |
595 | omap_writew(w, ULPD_SOFT_REQ); | |
596 | ||
597 | while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) | |
598 | cpu_relax(); | |
599 | ||
0345a1e3 | 600 | #if IS_ENABLED(CONFIG_USB_OMAP) |
dd0cdd88 TL |
601 | if (config->register_dev) { |
602 | int status; | |
603 | ||
604 | udc_device.dev.platform_data = config; | |
605 | status = platform_device_register(&udc_device); | |
606 | if (status) | |
607 | pr_debug("can't register UDC device, %d\n", status); | |
608 | /* udc driver gates 48MHz by D+ pullup */ | |
609 | } | |
610 | #endif | |
611 | ||
fcebddb9 | 612 | #if IS_ENABLED(CONFIG_USB_OHCI_HCD) |
dd0cdd88 TL |
613 | if (config->register_host) { |
614 | int status; | |
615 | ||
616 | ohci_device.dev.platform_data = config; | |
617 | status = platform_device_register(&ohci_device); | |
618 | if (status) | |
619 | pr_debug("can't register OHCI device, %d\n", status); | |
620 | /* hcd explicitly gates 48MHz */ | |
621 | } | |
622 | #endif | |
623 | } | |
624 | ||
625 | #else | |
626 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} | |
627 | #endif | |
628 | ||
07fd296d | 629 | void __init omap1_usb_init(struct omap_usb_config *_pdata) |
dd0cdd88 | 630 | { |
07fd296d AK |
631 | struct omap_usb_config *pdata; |
632 | ||
633 | pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL); | |
634 | if (!pdata) | |
635 | return; | |
636 | ||
dd0cdd88 TL |
637 | pdata->usb0_init = omap1_usb0_init; |
638 | pdata->usb1_init = omap1_usb1_init; | |
639 | pdata->usb2_init = omap1_usb2_init; | |
640 | udc_device_init(pdata); | |
641 | ohci_device_init(pdata); | |
642 | otg_device_init(pdata); | |
643 | ||
644 | if (cpu_is_omap7xx() || cpu_is_omap16xx()) | |
645 | omap_otg_init(pdata); | |
646 | else if (cpu_is_omap15xx()) | |
647 | omap_1510_usb_init(pdata); | |
648 | else | |
649 | printk(KERN_ERR "USB: No init for your chip yet\n"); | |
650 | } |