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1a59d1b8 1// SPDX-License-Identifier: GPL-2.0-or-later
dd0cdd88 2/*
4d94b4a2 3 * Platform level USB initialization for FS USB OTG controller on omap1
dd0cdd88
TL
4 *
5 * Copyright (C) 2004 Texas Instruments, Inc.
dd0cdd88
TL
6 */
7
8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
16fee29b 12#include <linux/dma-map-ops.h>
dd0cdd88
TL
13#include <linux/io.h>
14
15#include <asm/irq.h>
16
70c494c3 17#include <mach/mux.h>
b924b204
TL
18
19#include <mach/usb.h>
dd0cdd88 20
d3645d39
PW
21#include "common.h"
22
dd0cdd88
TL
23/* These routines should handle the standard chip-specific modes
24 * for usb0/1/2 ports, covering basic mux and transceiver setup.
25 *
26 * Some board-*.c files will need to set up additional mux options,
27 * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
28 */
29
30/* TESTED ON:
31 * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
32 * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
33 * - 5912 OSK UDC, with *nonstandard* A-to-A cable
34 * - 1510 Innovator UDC with bundled usb0 cable
35 * - 1510 Innovator OHCI with bundled usb1/usb2 cable
36 * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
37 * - 1710 custom development board using alternate pin group
38 * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
39 */
40
41#define INT_USB_IRQ_GEN IH2_BASE + 20
42#define INT_USB_IRQ_NISO IH2_BASE + 30
43#define INT_USB_IRQ_ISO IH2_BASE + 29
44#define INT_USB_IRQ_HGEN INT_USB_HHC_1
45#define INT_USB_IRQ_OTG IH2_BASE + 8
46
b924b204
TL
47#ifdef CONFIG_ARCH_OMAP_OTG
48
bde49e59 49static void __init
b924b204
TL
50omap_otg_init(struct omap_usb_config *config)
51{
52 u32 syscon;
53 int alt_pingroup = 0;
4d94b4a2 54 u16 w;
b924b204
TL
55
56 /* NOTE: no bus or clock setup (yet?) */
57
58 syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
59 if (!(syscon & OTG_RESET_DONE))
60 pr_debug("USB resets not complete?\n");
61
62 //omap_writew(0, OTG_IRQ_EN);
63
64 /* pin muxing and transceiver pinouts */
65 if (config->pins[0] > 2) /* alt pingroup 2 */
66 alt_pingroup = 1;
67 syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
68 syscon |= config->usb1_init(config->pins[1]);
69 syscon |= config->usb2_init(config->pins[2], alt_pingroup);
70 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
71 omap_writel(syscon, OTG_SYSCON_1);
72
73 syscon = config->hmc_mode;
74 syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
75#ifdef CONFIG_USB_OTG
76 if (config->otg)
77 syscon |= OTG_EN;
78#endif
4d94b4a2
AK
79 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
80 omap_readl(USB_TRANSCEIVER_CTRL));
b924b204
TL
81 pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
82 omap_writel(syscon, OTG_SYSCON_2);
83
84 printk("USB: hmc %d", config->hmc_mode);
85 if (!alt_pingroup)
7e600cad 86 pr_cont(", usb2 alt %d wires", config->pins[2]);
b924b204 87 else if (config->pins[0])
7e600cad 88 pr_cont(", usb0 %d wires%s", config->pins[0],
b924b204
TL
89 is_usb0_device(config) ? " (dev)" : "");
90 if (config->pins[1])
7e600cad 91 pr_cont(", usb1 %d wires", config->pins[1]);
b924b204 92 if (!alt_pingroup && config->pins[2])
7e600cad 93 pr_cont(", usb2 %d wires", config->pins[2]);
b924b204 94 if (config->otg)
7e600cad
AK
95 pr_cont(", Mini-AB on usb%d", config->otg - 1);
96 pr_cont("\n");
b924b204 97
4d94b4a2
AK
98 /* leave USB clocks/controllers off until needed */
99 w = omap_readw(ULPD_SOFT_REQ);
100 w &= ~SOFT_USB_CLK_REQ;
101 omap_writew(w, ULPD_SOFT_REQ);
b924b204 102
4d94b4a2
AK
103 w = omap_readw(ULPD_CLOCK_CTRL);
104 w &= ~USB_MCLK_EN;
105 w |= DIS_USB_PVCI_CLK;
106 omap_writew(w, ULPD_CLOCK_CTRL);
b924b204 107
b924b204
TL
108 syscon = omap_readl(OTG_SYSCON_1);
109 syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
110
0345a1e3 111#if IS_ENABLED(CONFIG_USB_OMAP)
b924b204
TL
112 if (config->otg || config->register_dev) {
113 struct platform_device *udc_device = config->udc_device;
114 int status;
115
116 syscon &= ~DEV_IDLE_EN;
117 udc_device->dev.platform_data = config;
118 status = platform_device_register(udc_device);
119 if (status)
120 pr_debug("can't register UDC device, %d\n", status);
121 }
122#endif
123
fcebddb9 124#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
b924b204
TL
125 if (config->otg || config->register_host) {
126 struct platform_device *ohci_device = config->ohci_device;
127 int status;
128
129 syscon &= ~HST_IDLE_EN;
130 ohci_device->dev.platform_data = config;
131 status = platform_device_register(ohci_device);
132 if (status)
133 pr_debug("can't register OHCI device, %d\n", status);
134 }
135#endif
136
137#ifdef CONFIG_USB_OTG
138 if (config->otg) {
139 struct platform_device *otg_device = config->otg_device;
140 int status;
141
142 syscon &= ~OTG_IDLE_EN;
143 otg_device->dev.platform_data = config;
144 status = platform_device_register(otg_device);
145 if (status)
146 pr_debug("can't register OTG device, %d\n", status);
147 }
148#endif
149 pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
150 omap_writel(syscon, OTG_SYSCON_1);
151}
152
153#else
bde49e59 154static void omap_otg_init(struct omap_usb_config *config) {}
b924b204
TL
155#endif
156
0345a1e3 157#if IS_ENABLED(CONFIG_USB_OMAP)
dd0cdd88
TL
158
159static struct resource udc_resources[] = {
160 /* order is significant! */
161 { /* registers */
162 .start = UDC_BASE,
163 .end = UDC_BASE + 0xff,
164 .flags = IORESOURCE_MEM,
165 }, { /* general IRQ */
166 .start = INT_USB_IRQ_GEN,
167 .flags = IORESOURCE_IRQ,
168 }, { /* PIO IRQ */
169 .start = INT_USB_IRQ_NISO,
170 .flags = IORESOURCE_IRQ,
171 }, { /* SOF IRQ */
172 .start = INT_USB_IRQ_ISO,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static u64 udc_dmamask = ~(u32)0;
178
179static struct platform_device udc_device = {
180 .name = "omap_udc",
181 .id = -1,
182 .dev = {
183 .dma_mask = &udc_dmamask,
184 .coherent_dma_mask = 0xffffffff,
185 },
186 .num_resources = ARRAY_SIZE(udc_resources),
187 .resource = udc_resources,
188};
189
190static inline void udc_device_init(struct omap_usb_config *pdata)
191{
192 /* IRQ numbers for omap7xx */
193 if(cpu_is_omap7xx()) {
194 udc_resources[1].start = INT_7XX_USB_GENI;
195 udc_resources[2].start = INT_7XX_USB_NON_ISO;
196 udc_resources[3].start = INT_7XX_USB_ISO;
197 }
198 pdata->udc_device = &udc_device;
199}
200
201#else
202
203static inline void udc_device_init(struct omap_usb_config *pdata)
204{
205}
206
207#endif
208
fcebddb9 209#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
dd0cdd88
TL
210
211/* The dmamask must be set for OHCI to work */
212static u64 ohci_dmamask = ~(u32)0;
213
214static struct resource ohci_resources[] = {
215 {
216 .start = OMAP_OHCI_BASE,
217 .end = OMAP_OHCI_BASE + 0xff,
218 .flags = IORESOURCE_MEM,
219 },
220 {
221 .start = INT_USB_IRQ_HGEN,
222 .flags = IORESOURCE_IRQ,
223 },
224};
225
226static struct platform_device ohci_device = {
227 .name = "ohci",
228 .id = -1,
229 .dev = {
230 .dma_mask = &ohci_dmamask,
231 .coherent_dma_mask = 0xffffffff,
232 },
233 .num_resources = ARRAY_SIZE(ohci_resources),
234 .resource = ohci_resources,
235};
236
237static inline void ohci_device_init(struct omap_usb_config *pdata)
238{
239 if (cpu_is_omap7xx())
240 ohci_resources[1].start = INT_7XX_USB_HHC_1;
241 pdata->ohci_device = &ohci_device;
d3645d39 242 pdata->ocpi_enable = &ocpi_enable;
dd0cdd88
TL
243}
244
245#else
246
247static inline void ohci_device_init(struct omap_usb_config *pdata)
248{
249}
250
251#endif
252
253#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
254
255static struct resource otg_resources[] = {
256 /* order is significant! */
257 {
258 .start = OTG_BASE,
259 .end = OTG_BASE + 0xff,
260 .flags = IORESOURCE_MEM,
261 }, {
262 .start = INT_USB_IRQ_OTG,
263 .flags = IORESOURCE_IRQ,
264 },
265};
266
267static struct platform_device otg_device = {
268 .name = "omap_otg",
269 .id = -1,
270 .num_resources = ARRAY_SIZE(otg_resources),
271 .resource = otg_resources,
272};
273
274static inline void otg_device_init(struct omap_usb_config *pdata)
275{
276 if (cpu_is_omap7xx())
277 otg_resources[1].start = INT_7XX_USB_OTG;
278 pdata->otg_device = &otg_device;
279}
280
281#else
282
283static inline void otg_device_init(struct omap_usb_config *pdata)
284{
285}
286
287#endif
288
eba36d77 289static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device)
dd0cdd88
TL
290{
291 u32 syscon1 = 0;
292
293 if (nwires == 0) {
294 if (!cpu_is_omap15xx()) {
295 u32 l;
296
297 /* pulldown D+/D- */
298 l = omap_readl(USB_TRANSCEIVER_CTRL);
299 l &= ~(3 << 1);
300 omap_writel(l, USB_TRANSCEIVER_CTRL);
301 }
302 return 0;
303 }
304
305 if (is_device) {
306 if (cpu_is_omap7xx()) {
307 omap_cfg_reg(AA17_7XX_USB_DM);
308 omap_cfg_reg(W16_7XX_USB_PU_EN);
309 omap_cfg_reg(W17_7XX_USB_VBUSI);
310 omap_cfg_reg(W18_7XX_USB_DMCK_OUT);
311 omap_cfg_reg(W19_7XX_USB_DCRST);
312 } else
313 omap_cfg_reg(W4_USB_PUEN);
314 }
315
316 if (nwires == 2) {
317 u32 l;
318
319 // omap_cfg_reg(P9_USB_DP);
320 // omap_cfg_reg(R8_USB_DM);
321
322 if (cpu_is_omap15xx()) {
323 /* This works on 1510-Innovator */
324 return 0;
325 }
326
327 /* NOTES:
328 * - peripheral should configure VBUS detection!
329 * - only peripherals may use the internal D+/D- pulldowns
330 * - OTG support on this port not yet written
331 */
332
333 /* Don't do this for omap7xx -- it causes USB to not work correctly */
334 if (!cpu_is_omap7xx()) {
335 l = omap_readl(USB_TRANSCEIVER_CTRL);
336 l &= ~(7 << 4);
337 if (!is_device)
338 l |= (3 << 1);
339 omap_writel(l, USB_TRANSCEIVER_CTRL);
340 }
341
342 return 3 << 16;
343 }
344
345 /* alternate pin config, external transceiver */
346 if (cpu_is_omap15xx()) {
347 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
348 return 0;
349 }
350
351 omap_cfg_reg(V6_USB0_TXD);
352 omap_cfg_reg(W9_USB0_TXEN);
353 omap_cfg_reg(W5_USB0_SE0);
354 if (nwires != 3)
355 omap_cfg_reg(Y5_USB0_RCV);
356
357 /* NOTE: SPEED and SUSP aren't configured here. OTG hosts
358 * may be able to use I2C requests to set those bits along
359 * with VBUS switching and overcurrent detection.
360 */
361
362 if (nwires != 6) {
363 u32 l;
364
365 l = omap_readl(USB_TRANSCEIVER_CTRL);
366 l &= ~CONF_USB2_UNI_R;
367 omap_writel(l, USB_TRANSCEIVER_CTRL);
368 }
369
370 switch (nwires) {
371 case 3:
372 syscon1 = 2;
373 break;
374 case 4:
375 syscon1 = 1;
376 break;
377 case 6:
378 syscon1 = 3;
379 {
380 u32 l;
381
382 omap_cfg_reg(AA9_USB0_VP);
383 omap_cfg_reg(R9_USB0_VM);
384 l = omap_readl(USB_TRANSCEIVER_CTRL);
385 l |= CONF_USB2_UNI_R;
386 omap_writel(l, USB_TRANSCEIVER_CTRL);
387 }
388 break;
389 default:
390 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
391 0, nwires);
392 }
393
394 return syscon1 << 16;
395}
396
eba36d77 397static u32 __init omap1_usb1_init(unsigned nwires)
dd0cdd88
TL
398{
399 u32 syscon1 = 0;
400
401 if (!cpu_is_omap15xx() && nwires != 6) {
402 u32 l;
403
404 l = omap_readl(USB_TRANSCEIVER_CTRL);
405 l &= ~CONF_USB1_UNI_R;
406 omap_writel(l, USB_TRANSCEIVER_CTRL);
407 }
408 if (nwires == 0)
409 return 0;
410
411 /* external transceiver */
412 omap_cfg_reg(USB1_TXD);
413 omap_cfg_reg(USB1_TXEN);
414 if (nwires != 3)
415 omap_cfg_reg(USB1_RCV);
416
417 if (cpu_is_omap15xx()) {
418 omap_cfg_reg(USB1_SEO);
419 omap_cfg_reg(USB1_SPEED);
420 // SUSP
421 } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
422 omap_cfg_reg(W13_1610_USB1_SE0);
423 omap_cfg_reg(R13_1610_USB1_SPEED);
424 // SUSP
425 } else if (cpu_is_omap1710()) {
426 omap_cfg_reg(R13_1710_USB1_SE0);
427 // SUSP
428 } else {
429 pr_debug("usb%d cpu unrecognized\n", 1);
430 return 0;
431 }
432
433 switch (nwires) {
434 case 2:
435 goto bad;
436 case 3:
437 syscon1 = 2;
438 break;
439 case 4:
440 syscon1 = 1;
441 break;
442 case 6:
443 syscon1 = 3;
444 omap_cfg_reg(USB1_VP);
445 omap_cfg_reg(USB1_VM);
446 if (!cpu_is_omap15xx()) {
447 u32 l;
448
449 l = omap_readl(USB_TRANSCEIVER_CTRL);
450 l |= CONF_USB1_UNI_R;
451 omap_writel(l, USB_TRANSCEIVER_CTRL);
452 }
453 break;
454 default:
455bad:
456 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
457 1, nwires);
458 }
459
460 return syscon1 << 20;
461}
462
eba36d77 463static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup)
dd0cdd88
TL
464{
465 u32 syscon1 = 0;
466
467 /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
468 if (alt_pingroup || nwires == 0)
469 return 0;
470
471 if (!cpu_is_omap15xx() && nwires != 6) {
472 u32 l;
473
474 l = omap_readl(USB_TRANSCEIVER_CTRL);
475 l &= ~CONF_USB2_UNI_R;
476 omap_writel(l, USB_TRANSCEIVER_CTRL);
477 }
478
479 /* external transceiver */
480 if (cpu_is_omap15xx()) {
481 omap_cfg_reg(USB2_TXD);
482 omap_cfg_reg(USB2_TXEN);
483 omap_cfg_reg(USB2_SEO);
484 if (nwires != 3)
485 omap_cfg_reg(USB2_RCV);
486 /* there is no USB2_SPEED */
487 } else if (cpu_is_omap16xx()) {
488 omap_cfg_reg(V6_USB2_TXD);
489 omap_cfg_reg(W9_USB2_TXEN);
490 omap_cfg_reg(W5_USB2_SE0);
491 if (nwires != 3)
492 omap_cfg_reg(Y5_USB2_RCV);
493 // FIXME omap_cfg_reg(USB2_SPEED);
494 } else {
495 pr_debug("usb%d cpu unrecognized\n", 1);
496 return 0;
497 }
498
499 // omap_cfg_reg(USB2_SUSP);
500
501 switch (nwires) {
502 case 2:
503 goto bad;
504 case 3:
505 syscon1 = 2;
506 break;
507 case 4:
508 syscon1 = 1;
509 break;
510 case 5:
511 goto bad;
512 case 6:
513 syscon1 = 3;
514 if (cpu_is_omap15xx()) {
515 omap_cfg_reg(USB2_VP);
516 omap_cfg_reg(USB2_VM);
517 } else {
518 u32 l;
519
520 omap_cfg_reg(AA9_USB2_VP);
521 omap_cfg_reg(R9_USB2_VM);
522 l = omap_readl(USB_TRANSCEIVER_CTRL);
523 l |= CONF_USB2_UNI_R;
524 omap_writel(l, USB_TRANSCEIVER_CTRL);
525 }
526 break;
527 default:
528bad:
529 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
530 2, nwires);
531 }
532
533 return syscon1 << 24;
534}
535
536#ifdef CONFIG_ARCH_OMAP15XX
537
538/* ULPD_DPLL_CTRL */
539#define DPLL_IOB (1 << 13)
540#define DPLL_PLL_ENABLE (1 << 4)
541#define DPLL_LOCK (1 << 0)
542
543/* ULPD_APLL_CTRL */
544#define APLL_NDPLL_SWITCH (1 << 0)
545
38225f2e
CH
546static int omap_1510_usb_ohci_notifier(struct notifier_block *nb,
547 unsigned long event, void *data)
548{
549 struct device *dev = data;
550
551 if (event != BUS_NOTIFY_ADD_DEVICE)
552 return NOTIFY_DONE;
553
554 if (strncmp(dev_name(dev), "ohci", 4) == 0 &&
555 dma_direct_set_offset(dev, PHYS_OFFSET, OMAP1510_LB_OFFSET,
556 (u64)-1))
557 WARN_ONCE(1, "failed to set DMA offset\n");
558 return NOTIFY_OK;
559}
560
561static struct notifier_block omap_1510_usb_ohci_nb = {
562 .notifier_call = omap_1510_usb_ohci_notifier,
563};
564
dd0cdd88
TL
565static void __init omap_1510_usb_init(struct omap_usb_config *config)
566{
567 unsigned int val;
568 u16 w;
569
570 config->usb0_init(config->pins[0], is_usb0_device(config));
571 config->usb1_init(config->pins[1]);
572 config->usb2_init(config->pins[2], 0);
573
574 val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
575 val |= (config->hmc_mode << 1);
576 omap_writel(val, MOD_CONF_CTRL_0);
577
578 printk("USB: hmc %d", config->hmc_mode);
579 if (config->pins[0])
7e600cad 580 pr_cont(", usb0 %d wires%s", config->pins[0],
dd0cdd88
TL
581 is_usb0_device(config) ? " (dev)" : "");
582 if (config->pins[1])
7e600cad 583 pr_cont(", usb1 %d wires", config->pins[1]);
dd0cdd88 584 if (config->pins[2])
7e600cad
AK
585 pr_cont(", usb2 %d wires", config->pins[2]);
586 pr_cont("\n");
dd0cdd88
TL
587
588 /* use DPLL for 48 MHz function clock */
589 pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
590 omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
591
592 w = omap_readw(ULPD_APLL_CTRL);
593 w &= ~APLL_NDPLL_SWITCH;
594 omap_writew(w, ULPD_APLL_CTRL);
595
596 w = omap_readw(ULPD_DPLL_CTRL);
597 w |= DPLL_IOB | DPLL_PLL_ENABLE;
598 omap_writew(w, ULPD_DPLL_CTRL);
599
600 w = omap_readw(ULPD_SOFT_REQ);
601 w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
602 omap_writew(w, ULPD_SOFT_REQ);
603
604 while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
605 cpu_relax();
606
0345a1e3 607#if IS_ENABLED(CONFIG_USB_OMAP)
dd0cdd88
TL
608 if (config->register_dev) {
609 int status;
610
611 udc_device.dev.platform_data = config;
612 status = platform_device_register(&udc_device);
613 if (status)
614 pr_debug("can't register UDC device, %d\n", status);
615 /* udc driver gates 48MHz by D+ pullup */
616 }
617#endif
618
fcebddb9 619#if IS_ENABLED(CONFIG_USB_OHCI_HCD)
dd0cdd88
TL
620 if (config->register_host) {
621 int status;
622
38225f2e
CH
623 bus_register_notifier(&platform_bus_type,
624 &omap_1510_usb_ohci_nb);
dd0cdd88
TL
625 ohci_device.dev.platform_data = config;
626 status = platform_device_register(&ohci_device);
627 if (status)
628 pr_debug("can't register OHCI device, %d\n", status);
629 /* hcd explicitly gates 48MHz */
630 }
631#endif
632}
633
634#else
635static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
636#endif
637
07fd296d 638void __init omap1_usb_init(struct omap_usb_config *_pdata)
dd0cdd88 639{
07fd296d
AK
640 struct omap_usb_config *pdata;
641
642 pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
643 if (!pdata)
644 return;
645
dd0cdd88
TL
646 pdata->usb0_init = omap1_usb0_init;
647 pdata->usb1_init = omap1_usb1_init;
648 pdata->usb2_init = omap1_usb2_init;
649 udc_device_init(pdata);
650 ohci_device_init(pdata);
651 otg_device_init(pdata);
652
653 if (cpu_is_omap7xx() || cpu_is_omap16xx())
654 omap_otg_init(pdata);
655 else if (cpu_is_omap15xx())
656 omap_1510_usb_init(pdata);
657 else
658 printk(KERN_ERR "USB: No init for your chip yet\n");
659}