]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - arch/arm/mach-omap2/board-generic.c
Merge tag 'for-linus-20170825' of git://git.infradead.org/linux-mtd
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-omap2 / board-generic.c
CommitLineData
1dbae815 1/*
1dbae815
TL
2 * Copyright (C) 2005 Nokia Corporation
3 * Author: Paul Mundt <paul.mundt@nokia.com>
4 *
8d61649d 5 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
1dbae815 6 *
8d61649d
BC
7 * Modified from the original mach-omap/omap2/board-generic.c did by Paul
8 * to support the OMAP2+ device tree boards with an unique board file.
1dbae815
TL
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
8d61649d 14#include <linux/io.h>
fbf75da7 15#include <linux/of_irq.h>
8d61649d
BC
16#include <linux/of_platform.h>
17#include <linux/irqdomain.h>
1dbae815 18
8c51b034 19#include <asm/setup.h>
1dbae815 20#include <asm/mach/arch.h>
5f35dc47 21#include <asm/system_info.h>
1dbae815 22
4e65331c 23#include "common.h"
8d61649d 24
31957609 25static const struct of_device_id omap_dt_match_table[] __initconst = {
8d61649d
BC
26 { .compatible = "simple-bus", },
27 { .compatible = "ti,omap-infra", },
28 { }
b3c6df3a
PW
29};
30
293ea3d0 31static void __init __maybe_unused omap_generic_init(void)
1dbae815 32{
8651bd8c 33 pdata_quirks_init(omap_dt_match_table);
dcdf407b
TV
34
35 omapdss_init_of();
1dbae815
TL
36}
37
0e02a8c1 38#ifdef CONFIG_SOC_OMAP2420
58cda01e 39static const char *const omap242x_boards_compat[] __initconst = {
8d61649d
BC
40 "ti,omap2420",
41 NULL,
42};
43
44DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
45 .reserve = omap_reserve,
46 .map_io = omap242x_map_io,
47 .init_early = omap2420_init_early,
8d61649d 48 .init_machine = omap_generic_init,
6f82e25d 49 .init_time = omap_init_time,
8d61649d 50 .dt_compat = omap242x_boards_compat,
187e3e06 51 .restart = omap2xxx_restart,
8d61649d
BC
52MACHINE_END
53#endif
54
0e02a8c1 55#ifdef CONFIG_SOC_OMAP2430
58cda01e 56static const char *const omap243x_boards_compat[] __initconst = {
8d61649d
BC
57 "ti,omap2430",
58 NULL,
59};
60
61DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71ee7dad 62 .reserve = omap_reserve,
8d61649d
BC
63 .map_io = omap243x_map_io,
64 .init_early = omap2430_init_early,
1dbae815 65 .init_machine = omap_generic_init,
6f82e25d 66 .init_time = omap_init_time,
8d61649d 67 .dt_compat = omap243x_boards_compat,
187e3e06 68 .restart = omap2xxx_restart,
8d61649d
BC
69MACHINE_END
70#endif
71
0e02a8c1 72#ifdef CONFIG_ARCH_OMAP3
71c4f602
TL
73/* Some boards need board name for legacy userspace in /proc/cpuinfo */
74static const char *const n900_boards_compat[] __initconst = {
75 "nokia,omap3-n900",
76 NULL,
77};
78
5f35dc47
ID
79/* Set system_rev from atags */
80static void __init rx51_set_system_rev(const struct tag *tags)
81{
82 const struct tag *tag;
83
84 if (tags->hdr.tag != ATAG_CORE)
85 return;
86
87 for_each_tag(tag, tags) {
88 if (tag->hdr.tag == ATAG_REVISION) {
89 system_rev = tag->u.revision.rev;
90 break;
91 }
92 }
93}
94
8c51b034
ID
95/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
96 * save them while the data is still not overwritten
97 */
98static void __init rx51_reserve(void)
99{
5f35dc47
ID
100 const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
101
102 save_atags(tags);
103 rx51_set_system_rev(tags);
8c51b034
ID
104 omap_reserve();
105}
106
71c4f602 107DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
8c51b034 108 .reserve = rx51_reserve,
71c4f602
TL
109 .map_io = omap3_map_io,
110 .init_early = omap3430_init_early,
111 .init_machine = omap_generic_init,
112 .init_late = omap3_init_late,
6f82e25d 113 .init_time = omap_init_time,
71c4f602
TL
114 .dt_compat = n900_boards_compat,
115 .restart = omap3xxx_restart,
116MACHINE_END
117
118/* Generic omap3 boards, most boards can use these */
58cda01e 119static const char *const omap3_boards_compat[] __initconst = {
b83a08fe 120 "ti,omap3430",
8d61649d
BC
121 "ti,omap3",
122 NULL,
123};
124
125DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
126 .reserve = omap_reserve,
127 .map_io = omap3_map_io,
128 .init_early = omap3430_init_early,
93651b85 129 .init_machine = omap_generic_init,
990fa4f5 130 .init_late = omap3_init_late,
6f82e25d 131 .init_time = omap_init_time,
8d61649d 132 .dt_compat = omap3_boards_compat,
187e3e06 133 .restart = omap3xxx_restart,
8d61649d 134MACHINE_END
7dd9d502 135
58cda01e 136static const char *const omap36xx_boards_compat[] __initconst = {
57df5380 137 "ti,omap3630",
016c12d2
NM
138 "ti,omap36xx",
139 NULL,
140};
141
142DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
143 .reserve = omap_reserve,
144 .map_io = omap3_map_io,
145 .init_early = omap3630_init_early,
016c12d2
NM
146 .init_machine = omap_generic_init,
147 .init_late = omap3_init_late,
6f82e25d 148 .init_time = omap_init_time,
016c12d2
NM
149 .dt_compat = omap36xx_boards_compat,
150 .restart = omap3xxx_restart,
151MACHINE_END
152
58cda01e 153static const char *const omap3_gp_boards_compat[] __initconst = {
7dd9d502 154 "ti,omap3-beagle",
4bfe6341 155 "timll,omap3-devkit8000",
7dd9d502
JH
156 NULL,
157};
158
159DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
160 .reserve = omap_reserve,
161 .map_io = omap3_map_io,
162 .init_early = omap3430_init_early,
7dd9d502 163 .init_machine = omap_generic_init,
990fa4f5 164 .init_late = omap3_init_late,
6bb27d73 165 .init_time = omap3_secure_sync32k_timer_init,
7dd9d502 166 .dt_compat = omap3_gp_boards_compat,
d01e4afd 167 .restart = omap3xxx_restart,
8d61649d 168MACHINE_END
caef4ee8 169
58cda01e 170static const char *const am3517_boards_compat[] __initconst = {
caef4ee8
NM
171 "ti,am3517",
172 NULL,
173};
174
175DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
176 .reserve = omap_reserve,
177 .map_io = omap3_map_io,
178 .init_early = am35xx_init_early,
caef4ee8
NM
179 .init_machine = omap_generic_init,
180 .init_late = omap3_init_late,
181 .init_time = omap3_gptimer_timer_init,
182 .dt_compat = am3517_boards_compat,
183 .restart = omap3xxx_restart,
184MACHINE_END
8d61649d
BC
185#endif
186
abf8cc1d
TL
187#ifdef CONFIG_SOC_TI81XX
188static const char *const ti814x_boards_compat[] __initconst = {
189 "ti,dm8148",
190 "ti,dm814",
191 NULL,
192};
193
9fd274c0 194DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
abf8cc1d
TL
195 .reserve = omap_reserve,
196 .map_io = ti81xx_map_io,
197 .init_early = ti814x_init_early,
198 .init_machine = omap_generic_init,
199 .init_late = ti81xx_init_late,
200 .init_time = omap3_gptimer_timer_init,
201 .dt_compat = ti814x_boards_compat,
202 .restart = ti81xx_restart,
203MACHINE_END
204
205static const char *const ti816x_boards_compat[] __initconst = {
206 "ti,dm8168",
207 "ti,dm816",
208 NULL,
209};
210
211DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
212 .reserve = omap_reserve,
213 .map_io = ti81xx_map_io,
214 .init_early = ti816x_init_early,
215 .init_machine = omap_generic_init,
216 .init_late = ti81xx_init_late,
217 .init_time = omap3_gptimer_timer_init,
218 .dt_compat = ti816x_boards_compat,
219 .restart = ti81xx_restart,
220MACHINE_END
221#endif
222
08f30989 223#ifdef CONFIG_SOC_AM33XX
58cda01e 224static const char *const am33xx_boards_compat[] __initconst = {
08f30989
AM
225 "ti,am33xx",
226 NULL,
227};
228
229DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
230 .reserve = omap_reserve,
231 .map_io = am33xx_map_io,
232 .init_early = am33xx_init_early,
08f30989 233 .init_machine = omap_generic_init,
765e7a06 234 .init_late = am33xx_init_late,
00ea4d56 235 .init_time = omap3_gptimer_timer_init,
08f30989 236 .dt_compat = am33xx_boards_compat,
14e067c1 237 .restart = am33xx_restart,
08f30989
AM
238MACHINE_END
239#endif
240
0e02a8c1 241#ifdef CONFIG_ARCH_OMAP4
58cda01e 242static const char *const omap4_boards_compat[] __initconst = {
b83a08fe
NM
243 "ti,omap4460",
244 "ti,omap4430",
8d61649d
BC
245 "ti,omap4",
246 NULL,
247};
248
249DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
944e9df1
MS
250 .l2c_aux_val = OMAP_L2C_AUX_CTRL,
251 .l2c_aux_mask = 0xcf9fffff,
252 .l2c_write_sec = omap4_l2c310_write_sec,
8d61649d 253 .reserve = omap_reserve,
06915321 254 .smp = smp_ops(omap4_smp_ops),
8d61649d
BC
255 .map_io = omap4_map_io,
256 .init_early = omap4430_init_early,
c4082d49 257 .init_irq = omap_gic_of_init,
93651b85 258 .init_machine = omap_generic_init,
bbd707ac 259 .init_late = omap4430_init_late,
6bb27d73 260 .init_time = omap4_local_timer_init,
8d61649d 261 .dt_compat = omap4_boards_compat,
187e3e06 262 .restart = omap44xx_restart,
1dbae815 263MACHINE_END
8d61649d 264#endif
0c1b6fac
S
265
266#ifdef CONFIG_SOC_OMAP5
58cda01e 267static const char *const omap5_boards_compat[] __initconst = {
b83a08fe
NM
268 "ti,omap5432",
269 "ti,omap5430",
0c1b6fac
S
270 "ti,omap5",
271 NULL,
272};
273
274DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
6a3b764b
TL
275#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
276 .dma_zone_size = SZ_2G,
277#endif
0c1b6fac 278 .reserve = omap_reserve,
06915321 279 .smp = smp_ops(omap4_smp_ops),
0c1b6fac
S
280 .map_io = omap5_map_io,
281 .init_early = omap5_init_early,
282 .init_irq = omap_gic_of_init,
0c1b6fac 283 .init_machine = omap_generic_init,
765e7a06 284 .init_late = omap5_init_late,
6bb27d73 285 .init_time = omap5_realtime_timer_init,
0c1b6fac 286 .dt_compat = omap5_boards_compat,
187e3e06 287 .restart = omap44xx_restart,
0c1b6fac
S
288MACHINE_END
289#endif
bb256f80
AM
290
291#ifdef CONFIG_SOC_AM43XX
58cda01e 292static const char *const am43_boards_compat[] __initconst = {
b83a08fe 293 "ti,am4372",
bb256f80
AM
294 "ti,am43",
295 NULL,
296};
297
298DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
944e9df1
MS
299 .l2c_aux_val = OMAP_L2C_AUX_CTRL,
300 .l2c_aux_mask = 0xcf9fffff,
301 .l2c_write_sec = omap4_l2c310_write_sec,
bb256f80
AM
302 .map_io = am33xx_map_io,
303 .init_early = am43xx_init_early,
765e7a06 304 .init_late = am43xx_init_late,
bb256f80
AM
305 .init_irq = omap_gic_of_init,
306 .init_machine = omap_generic_init,
f86a2c87 307 .init_time = omap3_gptimer_timer_init,
bb256f80 308 .dt_compat = am43_boards_compat,
a7daf64a 309 .restart = omap44xx_restart,
bb256f80
AM
310MACHINE_END
311#endif
439bf39e
S
312
313#ifdef CONFIG_SOC_DRA7XX
58cda01e 314static const char *const dra74x_boards_compat[] __initconst = {
0e0cb99d
NM
315 "ti,am5728",
316 "ti,am5726",
44e97ff6 317 "ti,dra742",
439bf39e
S
318 "ti,dra7",
319 NULL,
320};
321
44e97ff6 322DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
6a3b764b
TL
323#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
324 .dma_zone_size = SZ_2G,
325#endif
439bf39e
S
326 .reserve = omap_reserve,
327 .smp = smp_ops(omap4_smp_ops),
ea827ad5 328 .map_io = dra7xx_map_io,
439bf39e 329 .init_early = dra7xx_init_early,
765e7a06 330 .init_late = dra7xx_init_late,
439bf39e
S
331 .init_irq = omap_gic_of_init,
332 .init_machine = omap_generic_init,
333 .init_time = omap5_realtime_timer_init,
44e97ff6
RN
334 .dt_compat = dra74x_boards_compat,
335 .restart = omap44xx_restart,
336MACHINE_END
337
58cda01e 338static const char *const dra72x_boards_compat[] __initconst = {
0e0cb99d
NM
339 "ti,am5718",
340 "ti,am5716",
44e97ff6 341 "ti,dra722",
a2af765a 342 "ti,dra718",
44e97ff6
RN
343 NULL,
344};
345
346DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
6a3b764b
TL
347#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
348 .dma_zone_size = SZ_2G,
349#endif
44e97ff6 350 .reserve = omap_reserve,
ea827ad5 351 .map_io = dra7xx_map_io,
44e97ff6
RN
352 .init_early = dra7xx_init_early,
353 .init_late = dra7xx_init_late,
354 .init_irq = omap_gic_of_init,
355 .init_machine = omap_generic_init,
356 .init_time = omap5_realtime_timer_init,
357 .dt_compat = dra72x_boards_compat,
1d597b07 358 .restart = omap44xx_restart,
439bf39e
S
359MACHINE_END
360#endif