[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-omap2 / board-generic.c

/*
 * Copyright (C) 2005 Nokia Corporation
 * Author: Paul Mundt <paul.mundt@nokia.com>
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
 *
 * Modified from the original mach-omap/omap2/board-generic.c did by Paul
 * to support the OMAP2+ device tree boards with an unique board file.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/io.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/irqdomain.h>

#include <asm/setup.h>
#include <asm/mach/arch.h>
#include <asm/system_info.h>

#include "common.h"

static const struct of_device_id omap_dt_match_table[] __initconst = {
	{ .compatible = "simple-bus", },
	{ .compatible = "ti,omap-infra", },
	{ }
};

static void __init omap_generic_init(void)
{
	omapdss_early_init_of();

	pdata_quirks_init(omap_dt_match_table);

	omapdss_init_of();
}

#ifdef CONFIG_SOC_OMAP2420
static const char *const omap242x_boards_compat[] __initconst = {
	"ti,omap2420",
	NULL,
};

DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap242x_map_io,
	.init_early	= omap2420_init_early,
	.init_machine	= omap_generic_init,
	.init_time	= omap_init_time,
	.dt_compat	= omap242x_boards_compat,
	.restart	= omap2xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_OMAP2430
static const char *const omap243x_boards_compat[] __initconst = {
	"ti,omap2430",
	NULL,
};

DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap243x_map_io,
	.init_early	= omap2430_init_early,
	.init_machine	= omap_generic_init,
	.init_time	= omap_init_time,
	.dt_compat	= omap243x_boards_compat,
	.restart	= omap2xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_ARCH_OMAP3
/* Some boards need board name for legacy userspace in /proc/cpuinfo */
static const char *const n900_boards_compat[] __initconst = {
	"nokia,omap3-n900",
	NULL,
};

/* Set system_rev from atags */
static void __init rx51_set_system_rev(const struct tag *tags)
{
	const struct tag *tag;

	if (tags->hdr.tag != ATAG_CORE)
		return;

	for_each_tag(tag, tags) {
		if (tag->hdr.tag == ATAG_REVISION) {
			system_rev = tag->u.revision.rev;
			break;
		}
	}
}

/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
 * save them while the data is still not overwritten
 */
static void __init rx51_reserve(void)
{
	const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);

	save_atags(tags);
	rx51_set_system_rev(tags);
	omap_reserve();
}

DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
	.reserve	= rx51_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap_init_time,
	.dt_compat	= n900_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

/* Generic omap3 boards, most boards can use these */
static const char *const omap3_boards_compat[] __initconst = {
	"ti,omap3430",
	"ti,omap3",
	NULL,
};

DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap_init_time,
	.dt_compat	= omap3_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const omap36xx_boards_compat[] __initconst = {
	"ti,omap3630",
	"ti,omap36xx",
	NULL,
};

DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3630_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap_init_time,
	.dt_compat	= omap36xx_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const omap3_gp_boards_compat[] __initconst = {
	"ti,omap3-beagle",
	"timll,omap3-devkit8000",
	NULL,
};

DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= omap3430_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_secure_sync32k_timer_init,
	.dt_compat	= omap3_gp_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END

static const char *const am3517_boards_compat[] __initconst = {
	"ti,am3517",
	NULL,
};

DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= omap3_map_io,
	.init_early	= am35xx_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= omap3_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= am3517_boards_compat,
	.restart	= omap3xxx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_TI81XX
static const char *const ti814x_boards_compat[] __initconst = {
	"ti,dm8148",
	"ti,dm814",
	NULL,
};

DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= ti81xx_map_io,
	.init_early	= ti814x_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= ti81xx_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= ti814x_boards_compat,
	.restart	= ti81xx_restart,
MACHINE_END

static const char *const ti816x_boards_compat[] __initconst = {
	"ti,dm8168",
	"ti,dm816",
	NULL,
};

DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= ti81xx_map_io,
	.init_early	= ti816x_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= ti81xx_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= ti816x_boards_compat,
	.restart	= ti81xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_AM33XX
static const char *const am33xx_boards_compat[] __initconst = {
	"ti,am33xx",
	NULL,
};

DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
	.reserve	= omap_reserve,
	.map_io		= am33xx_map_io,
	.init_early	= am33xx_init_early,
	.init_machine	= omap_generic_init,
	.init_late	= am33xx_init_late,
	.init_time	= omap3_gptimer_timer_init,
	.dt_compat	= am33xx_boards_compat,
	.restart	= am33xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_ARCH_OMAP4
static const char *const omap4_boards_compat[] __initconst = {
	"ti,omap4460",
	"ti,omap4430",
	"ti,omap4",
	NULL,
};

DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
	.l2c_aux_val	= OMAP_L2C_AUX_CTRL,
	.l2c_aux_mask	= 0xcf9fffff,
	.l2c_write_sec	= omap4_l2c310_write_sec,
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= omap4_map_io,
	.init_early	= omap4430_init_early,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_late	= omap4430_init_late,
	.init_time	= omap4_local_timer_init,
	.dt_compat	= omap4_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_OMAP5
static const char *const omap5_boards_compat[] __initconst = {
	"ti,omap5432",
	"ti,omap5430",
	"ti,omap5",
	NULL,
};

DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	.dma_zone_size	= SZ_2G,
#endif
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= omap5_map_io,
	.init_early	= omap5_init_early,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_late	= omap5_init_late,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= omap5_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_AM43XX
static const char *const am43_boards_compat[] __initconst = {
	"ti,am4372",
	"ti,am43",
	NULL,
};

DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
	.l2c_aux_val	= OMAP_L2C_AUX_CTRL,
	.l2c_aux_mask	= 0xcf9fffff,
	.l2c_write_sec	= omap4_l2c310_write_sec,
	.map_io		= am33xx_map_io,
	.init_early	= am43xx_init_early,
	.init_late	= am43xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap4_local_timer_init,
	.dt_compat	= am43_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif

#ifdef CONFIG_SOC_DRA7XX
static const char *const dra74x_boards_compat[] __initconst = {
	"ti,am5728",
	"ti,am5726",
	"ti,dra742",
	"ti,dra7",
	NULL,
};

DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	.dma_zone_size	= SZ_2G,
#endif
	.reserve	= omap_reserve,
	.smp		= smp_ops(omap4_smp_ops),
	.map_io		= dra7xx_map_io,
	.init_early	= dra7xx_init_early,
	.init_late	= dra7xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= dra74x_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END

static const char *const dra72x_boards_compat[] __initconst = {
	"ti,am5718",
	"ti,am5716",
	"ti,dra722",
	NULL,
};

DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	.dma_zone_size	= SZ_2G,
#endif
	.reserve	= omap_reserve,
	.map_io		= dra7xx_map_io,
	.init_early	= dra7xx_init_early,
	.init_late	= dra7xx_init_late,
	.init_irq	= omap_gic_of_init,
	.init_machine	= omap_generic_init,
	.init_time	= omap5_realtime_timer_init,
	.dt_compat	= dra72x_boards_compat,
	.restart	= omap44xx_restart,
MACHINE_END
#endif
Commit	Line	Data
1dbae815	1	/*
1dbae815 TL	2	* Copyright (C) 2005 Nokia Corporation
	3	* Author: Paul Mundt <paul.mundt@nokia.com>
	4	*
8d61649d	5	* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
1dbae815	6	*
8d61649d BC	7	* Modified from the original mach-omap/omap2/board-generic.c did by Paul
8d61649d BC	8	* to support the OMAP2+ device tree boards with an unique board file.
1dbae815 TL	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
8d61649d	14	#include <linux/io.h>
fbf75da7	15	#include <linux/of_irq.h>
8d61649d BC	16	#include <linux/of_platform.h>
8d61649d BC	17	#include <linux/irqdomain.h>
1dbae815	18
8c51b034	19	#include <asm/setup.h>
1dbae815	20	#include <asm/mach/arch.h>
5f35dc47	21	#include <asm/system_info.h>
1dbae815	22
4e65331c	23	#include "common.h"
8d61649d	24
31957609	25	static const struct of_device_id omap_dt_match_table[] __initconst = {
8d61649d BC	26	{ .compatible = "simple-bus", },
	27	{ .compatible = "ti,omap-infra", },
	28	{ }
b3c6df3a PW	29	};
b3c6df3a PW	30
1dbae815 TL	31	static void __init omap_generic_init(void)
1dbae815 TL	32	{
6a0e6b38 TV	33	omapdss_early_init_of();
6a0e6b38 TV	34
8651bd8c	35	pdata_quirks_init(omap_dt_match_table);
dcdf407b TV	36
dcdf407b TV	37	omapdss_init_of();
1dbae815 TL	38	}
1dbae815 TL	39
0e02a8c1	40	#ifdef CONFIG_SOC_OMAP2420
58cda01e	41	static const char *const omap242x_boards_compat[] __initconst = {
8d61649d BC	42	"ti,omap2420",
	43	NULL,
	44	};
	45
	46	DT_MACHINE_START(OMAP242X_DT, "Generic OMAP2420 (Flattened Device Tree)")
	47	.reserve = omap_reserve,
	48	.map_io = omap242x_map_io,
	49	.init_early = omap2420_init_early,
8d61649d	50	.init_machine = omap_generic_init,
6f82e25d	51	.init_time = omap_init_time,
8d61649d	52	.dt_compat = omap242x_boards_compat,
187e3e06	53	.restart = omap2xxx_restart,
8d61649d BC	54	MACHINE_END
	55	#endif
	56
0e02a8c1	57	#ifdef CONFIG_SOC_OMAP2430
58cda01e	58	static const char *const omap243x_boards_compat[] __initconst = {
8d61649d BC	59	"ti,omap2430",
	60	NULL,
	61	};
	62
	63	DT_MACHINE_START(OMAP243X_DT, "Generic OMAP2430 (Flattened Device Tree)")
71ee7dad	64	.reserve = omap_reserve,
8d61649d BC	65	.map_io = omap243x_map_io,
8d61649d BC	66	.init_early = omap2430_init_early,
1dbae815	67	.init_machine = omap_generic_init,
6f82e25d	68	.init_time = omap_init_time,
8d61649d	69	.dt_compat = omap243x_boards_compat,
187e3e06	70	.restart = omap2xxx_restart,
8d61649d BC	71	MACHINE_END
	72	#endif
	73
0e02a8c1	74	#ifdef CONFIG_ARCH_OMAP3
71c4f602 TL	75	/* Some boards need board name for legacy userspace in /proc/cpuinfo */
	76	static const char *const n900_boards_compat[] __initconst = {
	77	"nokia,omap3-n900",
	78	NULL,
	79	};
	80
5f35dc47 ID	81	/* Set system_rev from atags */
	82	static void __init rx51_set_system_rev(const struct tag *tags)
	83	{
	84	const struct tag *tag;
	85
	86	if (tags->hdr.tag != ATAG_CORE)
	87	return;
	88
	89	for_each_tag(tag, tags) {
	90	if (tag->hdr.tag == ATAG_REVISION) {
	91	system_rev = tag->u.revision.rev;
	92	break;
	93	}
	94	}
	95	}
	96
8c51b034 ID	97	/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
	98	* save them while the data is still not overwritten
	99	*/
	100	static void __init rx51_reserve(void)
	101	{
5f35dc47 ID	102	const struct tag tags = (const struct tag )(PAGE_OFFSET + 0x100);
	103
	104	save_atags(tags);
	105	rx51_set_system_rev(tags);
8c51b034 ID	106	omap_reserve();
	107	}
	108
71c4f602	109	DT_MACHINE_START(OMAP3_N900_DT, "Nokia RX-51 board")
8c51b034	110	.reserve = rx51_reserve,
71c4f602 TL	111	.map_io = omap3_map_io,
	112	.init_early = omap3430_init_early,
	113	.init_machine = omap_generic_init,
	114	.init_late = omap3_init_late,
6f82e25d	115	.init_time = omap_init_time,
71c4f602 TL	116	.dt_compat = n900_boards_compat,
	117	.restart = omap3xxx_restart,
	118	MACHINE_END
	119
	120	/* Generic omap3 boards, most boards can use these */
58cda01e	121	static const char *const omap3_boards_compat[] __initconst = {
b83a08fe	122	"ti,omap3430",
8d61649d BC	123	"ti,omap3",
	124	NULL,
	125	};
	126
	127	DT_MACHINE_START(OMAP3_DT, "Generic OMAP3 (Flattened Device Tree)")
	128	.reserve = omap_reserve,
	129	.map_io = omap3_map_io,
	130	.init_early = omap3430_init_early,
93651b85	131	.init_machine = omap_generic_init,
990fa4f5	132	.init_late = omap3_init_late,
6f82e25d	133	.init_time = omap_init_time,
8d61649d	134	.dt_compat = omap3_boards_compat,
187e3e06	135	.restart = omap3xxx_restart,
8d61649d	136	MACHINE_END
7dd9d502	137
58cda01e	138	static const char *const omap36xx_boards_compat[] __initconst = {
57df5380	139	"ti,omap3630",
016c12d2 NM	140	"ti,omap36xx",
	141	NULL,
	142	};
	143
	144	DT_MACHINE_START(OMAP36XX_DT, "Generic OMAP36xx (Flattened Device Tree)")
	145	.reserve = omap_reserve,
	146	.map_io = omap3_map_io,
	147	.init_early = omap3630_init_early,
016c12d2 NM	148	.init_machine = omap_generic_init,
016c12d2 NM	149	.init_late = omap3_init_late,
6f82e25d	150	.init_time = omap_init_time,
016c12d2 NM	151	.dt_compat = omap36xx_boards_compat,
	152	.restart = omap3xxx_restart,
	153	MACHINE_END
	154
58cda01e	155	static const char *const omap3_gp_boards_compat[] __initconst = {
7dd9d502	156	"ti,omap3-beagle",
4bfe6341	157	"timll,omap3-devkit8000",
7dd9d502 JH	158	NULL,
	159	};
	160
	161	DT_MACHINE_START(OMAP3_GP_DT, "Generic OMAP3-GP (Flattened Device Tree)")
	162	.reserve = omap_reserve,
	163	.map_io = omap3_map_io,
	164	.init_early = omap3430_init_early,
7dd9d502	165	.init_machine = omap_generic_init,
990fa4f5	166	.init_late = omap3_init_late,
6bb27d73	167	.init_time = omap3_secure_sync32k_timer_init,
7dd9d502	168	.dt_compat = omap3_gp_boards_compat,
d01e4afd	169	.restart = omap3xxx_restart,
8d61649d	170	MACHINE_END
caef4ee8	171
58cda01e	172	static const char *const am3517_boards_compat[] __initconst = {
caef4ee8 NM	173	"ti,am3517",
	174	NULL,
	175	};
	176
	177	DT_MACHINE_START(AM3517_DT, "Generic AM3517 (Flattened Device Tree)")
	178	.reserve = omap_reserve,
	179	.map_io = omap3_map_io,
	180	.init_early = am35xx_init_early,
caef4ee8 NM	181	.init_machine = omap_generic_init,
	182	.init_late = omap3_init_late,
	183	.init_time = omap3_gptimer_timer_init,
	184	.dt_compat = am3517_boards_compat,
	185	.restart = omap3xxx_restart,
	186	MACHINE_END
8d61649d BC	187	#endif
8d61649d BC	188
abf8cc1d TL	189	#ifdef CONFIG_SOC_TI81XX
	190	static const char *const ti814x_boards_compat[] __initconst = {
	191	"ti,dm8148",
	192	"ti,dm814",
	193	NULL,
	194	};
	195
9fd274c0	196	DT_MACHINE_START(TI814X_DT, "Generic ti814x (Flattened Device Tree)")
abf8cc1d TL	197	.reserve = omap_reserve,
	198	.map_io = ti81xx_map_io,
	199	.init_early = ti814x_init_early,
	200	.init_machine = omap_generic_init,
	201	.init_late = ti81xx_init_late,
	202	.init_time = omap3_gptimer_timer_init,
	203	.dt_compat = ti814x_boards_compat,
	204	.restart = ti81xx_restart,
	205	MACHINE_END
	206
	207	static const char *const ti816x_boards_compat[] __initconst = {
	208	"ti,dm8168",
	209	"ti,dm816",
	210	NULL,
	211	};
	212
	213	DT_MACHINE_START(TI816X_DT, "Generic ti816x (Flattened Device Tree)")
	214	.reserve = omap_reserve,
	215	.map_io = ti81xx_map_io,
	216	.init_early = ti816x_init_early,
	217	.init_machine = omap_generic_init,
	218	.init_late = ti81xx_init_late,
	219	.init_time = omap3_gptimer_timer_init,
	220	.dt_compat = ti816x_boards_compat,
	221	.restart = ti81xx_restart,
	222	MACHINE_END
	223	#endif
	224
08f30989	225	#ifdef CONFIG_SOC_AM33XX
58cda01e	226	static const char *const am33xx_boards_compat[] __initconst = {
08f30989 AM	227	"ti,am33xx",
	228	NULL,
	229	};
	230
	231	DT_MACHINE_START(AM33XX_DT, "Generic AM33XX (Flattened Device Tree)")
	232	.reserve = omap_reserve,
	233	.map_io = am33xx_map_io,
	234	.init_early = am33xx_init_early,
08f30989	235	.init_machine = omap_generic_init,
765e7a06	236	.init_late = am33xx_init_late,
00ea4d56	237	.init_time = omap3_gptimer_timer_init,
08f30989	238	.dt_compat = am33xx_boards_compat,
14e067c1	239	.restart = am33xx_restart,
08f30989 AM	240	MACHINE_END
	241	#endif
	242
0e02a8c1	243	#ifdef CONFIG_ARCH_OMAP4
58cda01e	244	static const char *const omap4_boards_compat[] __initconst = {
b83a08fe NM	245	"ti,omap4460",
b83a08fe NM	246	"ti,omap4430",
8d61649d BC	247	"ti,omap4",
	248	NULL,
	249	};
	250
	251	DT_MACHINE_START(OMAP4_DT, "Generic OMAP4 (Flattened Device Tree)")
944e9df1 MS	252	.l2c_aux_val = OMAP_L2C_AUX_CTRL,
	253	.l2c_aux_mask = 0xcf9fffff,
	254	.l2c_write_sec = omap4_l2c310_write_sec,
8d61649d	255	.reserve = omap_reserve,
06915321	256	.smp = smp_ops(omap4_smp_ops),
8d61649d BC	257	.map_io = omap4_map_io,
8d61649d BC	258	.init_early = omap4430_init_early,
c4082d49	259	.init_irq = omap_gic_of_init,
93651b85	260	.init_machine = omap_generic_init,
bbd707ac	261	.init_late = omap4430_init_late,
6bb27d73	262	.init_time = omap4_local_timer_init,
8d61649d	263	.dt_compat = omap4_boards_compat,
187e3e06	264	.restart = omap44xx_restart,
1dbae815	265	MACHINE_END
8d61649d	266	#endif
0c1b6fac S	267
0c1b6fac S	268	#ifdef CONFIG_SOC_OMAP5
58cda01e	269	static const char *const omap5_boards_compat[] __initconst = {
b83a08fe NM	270	"ti,omap5432",
b83a08fe NM	271	"ti,omap5430",
0c1b6fac S	272	"ti,omap5",
	273	NULL,
	274	};
	275
	276	DT_MACHINE_START(OMAP5_DT, "Generic OMAP5 (Flattened Device Tree)")
6a3b764b TL	277	#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	278	.dma_zone_size = SZ_2G,
	279	#endif
0c1b6fac	280	.reserve = omap_reserve,
06915321	281	.smp = smp_ops(omap4_smp_ops),
0c1b6fac S	282	.map_io = omap5_map_io,
	283	.init_early = omap5_init_early,
	284	.init_irq = omap_gic_of_init,
0c1b6fac	285	.init_machine = omap_generic_init,
765e7a06	286	.init_late = omap5_init_late,
6bb27d73	287	.init_time = omap5_realtime_timer_init,
0c1b6fac	288	.dt_compat = omap5_boards_compat,
187e3e06	289	.restart = omap44xx_restart,
0c1b6fac S	290	MACHINE_END
0c1b6fac S	291	#endif
bb256f80 AM	292
bb256f80 AM	293	#ifdef CONFIG_SOC_AM43XX
58cda01e	294	static const char *const am43_boards_compat[] __initconst = {
b83a08fe	295	"ti,am4372",
bb256f80 AM	296	"ti,am43",
	297	NULL,
	298	};
	299
	300	DT_MACHINE_START(AM43_DT, "Generic AM43 (Flattened Device Tree)")
944e9df1 MS	301	.l2c_aux_val = OMAP_L2C_AUX_CTRL,
	302	.l2c_aux_mask = 0xcf9fffff,
	303	.l2c_write_sec = omap4_l2c310_write_sec,
bb256f80 AM	304	.map_io = am33xx_map_io,
bb256f80 AM	305	.init_early = am43xx_init_early,
765e7a06	306	.init_late = am43xx_init_late,
bb256f80 AM	307	.init_irq = omap_gic_of_init,
bb256f80 AM	308	.init_machine = omap_generic_init,
55ee7017	309	.init_time = omap4_local_timer_init,
bb256f80	310	.dt_compat = am43_boards_compat,
a7daf64a	311	.restart = omap44xx_restart,
bb256f80 AM	312	MACHINE_END
bb256f80 AM	313	#endif
439bf39e S	314
439bf39e S	315	#ifdef CONFIG_SOC_DRA7XX
58cda01e	316	static const char *const dra74x_boards_compat[] __initconst = {
0e0cb99d NM	317	"ti,am5728",
0e0cb99d NM	318	"ti,am5726",
44e97ff6	319	"ti,dra742",
439bf39e S	320	"ti,dra7",
	321	NULL,
	322	};
	323
44e97ff6	324	DT_MACHINE_START(DRA74X_DT, "Generic DRA74X (Flattened Device Tree)")
6a3b764b TL	325	#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	326	.dma_zone_size = SZ_2G,
	327	#endif
439bf39e S	328	.reserve = omap_reserve,
439bf39e S	329	.smp = smp_ops(omap4_smp_ops),
ea827ad5	330	.map_io = dra7xx_map_io,
439bf39e	331	.init_early = dra7xx_init_early,
765e7a06	332	.init_late = dra7xx_init_late,
439bf39e S	333	.init_irq = omap_gic_of_init,
	334	.init_machine = omap_generic_init,
	335	.init_time = omap5_realtime_timer_init,
44e97ff6 RN	336	.dt_compat = dra74x_boards_compat,
	337	.restart = omap44xx_restart,
	338	MACHINE_END
	339
58cda01e	340	static const char *const dra72x_boards_compat[] __initconst = {
0e0cb99d NM	341	"ti,am5718",
0e0cb99d NM	342	"ti,am5716",
44e97ff6 RN	343	"ti,dra722",
	344	NULL,
	345	};
	346
	347	DT_MACHINE_START(DRA72X_DT, "Generic DRA72X (Flattened Device Tree)")
6a3b764b TL	348	#if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
	349	.dma_zone_size = SZ_2G,
	350	#endif
44e97ff6	351	.reserve = omap_reserve,
ea827ad5	352	.map_io = dra7xx_map_io,
44e97ff6 RN	353	.init_early = dra7xx_init_early,
	354	.init_late = dra7xx_init_late,
	355	.init_irq = omap_gic_of_init,
	356	.init_machine = omap_generic_init,
	357	.init_time = omap5_realtime_timer_init,
	358	.dt_compat = dra72x_boards_compat,
1d597b07	359	.restart = omap44xx_restart,
439bf39e S	360	MACHINE_END
439bf39e S	361	#endif