]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - arch/arm/mach-omap2/board-n8x0.c
Merge branch 'omap-for-v4.14/fixes' into omap-for-v4.15/fixes-v2
[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-omap2 / board-n8x0.c
CommitLineData
63138812
KV
1/*
2 * linux/arch/arm/mach-omap2/board-n8x0.c
3 *
4 * Copyright (C) 2005-2009 Nokia Corporation
5 * Author: Juha Yrjola <juha.yrjola@nokia.com>
6 *
7 * Modified from mach-omap2/board-generic.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/init.h>
18#include <linux/io.h>
0857ba3c 19#include <linux/irq.h>
63138812 20#include <linux/stddef.h>
9418c65f 21#include <linux/i2c.h>
63138812
KV
22#include <linux/spi/spi.h>
23#include <linux/usb/musb.h>
826c71a0 24#include <linux/mmc/host.h>
2203747c 25#include <linux/platform_data/spi-omap2-mcspi.h>
826c71a0 26#include <linux/platform_data/mmc-omap.h>
7bd3b618 27#include <linux/mfd/menelaus.h>
366498d4 28#include <sound/tlv320aic3x.h>
63138812
KV
29
30#include <asm/mach/arch.h>
31#include <asm/mach-types.h>
32
4e65331c 33#include "common.h"
68f39e74 34#include "mmc.h"
810ac2a1 35#include "soc.h"
e92ce89c 36#include "common-board-devices.h"
bd8f0fc9 37
97b9ad16
FA
38#define TUSB6010_ASYNC_CS 1
39#define TUSB6010_SYNC_CS 4
40#define TUSB6010_GPIO_INT 58
41#define TUSB6010_GPIO_ENABLE 0
42#define TUSB6010_DMACHAN 0x3f
43
c8f27e97
TL
44#define NOKIA_N810_WIMAX (1 << 2)
45#define NOKIA_N810 (1 << 1)
46#define NOKIA_N800 (1 << 0)
47
48static u32 board_caps;
49
50#define board_is_n800() (board_caps & NOKIA_N800)
51#define board_is_n810() (board_caps & NOKIA_N810)
52#define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
53
54static void board_check_revision(void)
55{
0e78b121
TL
56 if (of_machine_is_compatible("nokia,n800"))
57 board_caps = NOKIA_N800;
58 else if (of_machine_is_compatible("nokia,n810"))
59 board_caps = NOKIA_N810;
60 else if (of_machine_is_compatible("nokia,n810-wimax"))
61 board_caps = NOKIA_N810_WIMAX;
c8f27e97
TL
62
63 if (!board_caps)
64 pr_err("Unknown board\n");
65}
66
502ad2a6 67#if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010)
97b9ad16
FA
68/*
69 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
70 * 1.5 V voltage regulators of PM companion chip. Companion chip will then
71 * provide then PGOOD signal to TUSB6010 which will release it from reset.
72 */
73static int tusb_set_power(int state)
74{
75 int i, retval = 0;
76
77 if (state) {
78 gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
79 msleep(1);
80
81 /* Wait until TUSB6010 pulls INT pin down */
82 i = 100;
83 while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
84 msleep(1);
85 i--;
86 }
87
88 if (!i) {
89 printk(KERN_ERR "tusb: powerup failed\n");
90 retval = -ENODEV;
91 }
92 } else {
93 gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
94 msleep(10);
95 }
96
97 return retval;
98}
99
100static struct musb_hdrc_config musb_config = {
101 .multipoint = 1,
102 .dyn_fifo = 1,
103 .num_eps = 16,
104 .ram_bits = 12,
105};
106
107static struct musb_hdrc_platform_data tusb_data = {
97b9ad16 108 .mode = MUSB_OTG,
97b9ad16
FA
109 .set_power = tusb_set_power,
110 .min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
111 .power = 100, /* Max 100 mA VBUS for host mode */
112 .config = &musb_config,
113};
114
115static void __init n8x0_usb_init(void)
116{
117 int ret = 0;
06324664 118 static const char announce[] __initconst = KERN_INFO "TUSB 6010\n";
97b9ad16
FA
119
120 /* PM companion chip power control pin */
bc593f5d
IG
121 ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
122 "TUSB6010 enable");
97b9ad16
FA
123 if (ret != 0) {
124 printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
125 TUSB6010_GPIO_ENABLE);
126 return;
127 }
97b9ad16
FA
128 tusb_set_power(0);
129
130 ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
131 TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
132 TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
133 if (ret != 0)
134 goto err;
135
136 printk(announce);
137
138 return;
139
140err:
141 gpio_free(TUSB6010_GPIO_ENABLE);
142}
143#else
144
145static void __init n8x0_usb_init(void) {}
146
7c925546 147#endif /*CONFIG_USB_MUSB_TUSB6010 */
97b9ad16
FA
148
149
63138812
KV
150static struct omap2_mcspi_device_config p54spi_mcspi_config = {
151 .turbo_mode = 0,
63138812
KV
152};
153
154static struct spi_board_info n800_spi_board_info[] __initdata = {
155 {
156 .modalias = "p54spi",
157 .bus_num = 2,
158 .chip_select = 0,
159 .max_speed_hz = 48000000,
160 .controller_data = &p54spi_mcspi_config,
161 },
162};
163
502ad2a6 164#if defined(CONFIG_MENELAUS) && IS_ENABLED(CONFIG_MMC_OMAP)
9418c65f
TL
165
166/*
167 * On both N800 and N810, only the first of the two MMC controllers is in use.
168 * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
169 * On N800, both slots are powered via Menelaus. On N810, only one of the
170 * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
171 *
172 * VMMC slot 1 on both N800 and N810
173 * VDCDC3_APE and VMCS2_APE slot 2 on N800
174 * GPIO23 and GPIO9 slot 2 EMMC on N810
175 *
176 */
177#define N8X0_SLOT_SWITCH_GPIO 96
178#define N810_EMMC_VSD_GPIO 23
1dea5c6b 179#define N810_EMMC_VIO_GPIO 9
9418c65f 180
49b87c6d
TL
181static int slot1_cover_open;
182static int slot2_cover_open;
183static struct device *mmc_device;
184
9418c65f
TL
185static int n8x0_mmc_switch_slot(struct device *dev, int slot)
186{
187#ifdef CONFIG_MMC_DEBUG
188 dev_dbg(dev, "Choose slot %d\n", slot + 1);
189#endif
190 gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
191 return 0;
192}
193
194static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
195 int power_on, int vdd)
196{
197 int mV;
198
199#ifdef CONFIG_MMC_DEBUG
200 dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
201 power_on ? "on" : "off", vdd);
202#endif
203 if (slot == 0) {
204 if (!power_on)
205 return menelaus_set_vmmc(0);
206 switch (1 << vdd) {
207 case MMC_VDD_33_34:
208 case MMC_VDD_32_33:
209 case MMC_VDD_31_32:
210 mV = 3100;
211 break;
212 case MMC_VDD_30_31:
213 mV = 3000;
214 break;
215 case MMC_VDD_28_29:
216 mV = 2800;
217 break;
218 case MMC_VDD_165_195:
219 mV = 1850;
220 break;
221 default:
222 BUG();
223 }
224 return menelaus_set_vmmc(mV);
225 } else {
226 if (!power_on)
227 return menelaus_set_vdcdc(3, 0);
228 switch (1 << vdd) {
229 case MMC_VDD_33_34:
230 case MMC_VDD_32_33:
231 mV = 3300;
232 break;
233 case MMC_VDD_30_31:
234 case MMC_VDD_29_30:
235 mV = 3000;
236 break;
237 case MMC_VDD_28_29:
238 case MMC_VDD_27_28:
239 mV = 2800;
240 break;
241 case MMC_VDD_24_25:
242 case MMC_VDD_23_24:
243 mV = 2400;
244 break;
245 case MMC_VDD_22_23:
246 case MMC_VDD_21_22:
247 mV = 2200;
248 break;
249 case MMC_VDD_20_21:
250 mV = 2000;
251 break;
252 case MMC_VDD_165_195:
253 mV = 1800;
254 break;
255 default:
256 BUG();
257 }
258 return menelaus_set_vdcdc(3, mV);
259 }
260 return 0;
261}
262
263static void n810_set_power_emmc(struct device *dev,
264 int power_on)
265{
266 dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
267
268 if (power_on) {
269 gpio_set_value(N810_EMMC_VSD_GPIO, 1);
270 msleep(1);
1dea5c6b 271 gpio_set_value(N810_EMMC_VIO_GPIO, 1);
9418c65f
TL
272 msleep(1);
273 } else {
1dea5c6b 274 gpio_set_value(N810_EMMC_VIO_GPIO, 0);
9418c65f
TL
275 msleep(50);
276 gpio_set_value(N810_EMMC_VSD_GPIO, 0);
277 msleep(50);
278 }
279}
280
281static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
282 int vdd)
283{
c8f27e97 284 if (board_is_n800() || slot == 0)
9418c65f
TL
285 return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
286
287 n810_set_power_emmc(dev, power_on);
288
289 return 0;
290}
291
292static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
293{
294 int r;
295
296 dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
297 bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
298 BUG_ON(slot != 0 && slot != 1);
299 slot++;
300 switch (bus_mode) {
301 case MMC_BUSMODE_OPENDRAIN:
302 r = menelaus_set_mmc_opendrain(slot, 1);
303 break;
304 case MMC_BUSMODE_PUSHPULL:
305 r = menelaus_set_mmc_opendrain(slot, 0);
306 break;
307 default:
308 BUG();
309 }
310 if (r != 0 && printk_ratelimit())
311 dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
312 slot);
313 return r;
314}
315
316static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
317{
318 slot++;
319 BUG_ON(slot != 1 && slot != 2);
320 if (slot == 1)
321 return slot1_cover_open;
322 else
323 return slot2_cover_open;
324}
325
326static void n8x0_mmc_callback(void *data, u8 card_mask)
327{
328 int bit, *openp, index;
329
c8f27e97 330 if (board_is_n800()) {
9418c65f
TL
331 bit = 1 << 1;
332 openp = &slot2_cover_open;
333 index = 1;
334 } else {
335 bit = 1;
336 openp = &slot1_cover_open;
337 index = 0;
338 }
339
340 if (card_mask & bit)
341 *openp = 1;
342 else
343 *openp = 0;
344
d5171102 345#ifdef CONFIG_MMC_OMAP
9418c65f 346 omap_mmc_notify_cover_event(mmc_device, index, *openp);
d5171102
TL
347#else
348 pr_warn("MMC: notify cover event not available\n");
349#endif
9418c65f
TL
350}
351
9418c65f
TL
352static int n8x0_mmc_late_init(struct device *dev)
353{
354 int r, bit, *openp;
355 int vs2sel;
356
357 mmc_device = dev;
358
359 r = menelaus_set_slot_sel(1);
360 if (r < 0)
361 return r;
362
c8f27e97 363 if (board_is_n800())
9418c65f
TL
364 vs2sel = 0;
365 else
366 vs2sel = 2;
367
368 r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
369 if (r < 0)
370 return r;
371
372 n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
373 n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
374
375 r = menelaus_set_mmc_slot(1, 1, 0, 1);
376 if (r < 0)
377 return r;
378 r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
379 if (r < 0)
380 return r;
381
382 r = menelaus_get_slot_pin_states();
383 if (r < 0)
384 return r;
385
c8f27e97 386 if (board_is_n800()) {
9418c65f
TL
387 bit = 1 << 1;
388 openp = &slot2_cover_open;
389 } else {
390 bit = 1;
391 openp = &slot1_cover_open;
392 slot2_cover_open = 0;
393 }
394
395 /* All slot pin bits seem to be inversed until first switch change */
396 if (r == 0xf || r == (0xf & ~bit))
397 r = ~r;
398
399 if (r & bit)
400 *openp = 1;
401 else
402 *openp = 0;
403
404 r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
405
406 return r;
407}
408
409static void n8x0_mmc_shutdown(struct device *dev)
410{
411 int vs2sel;
412
c8f27e97 413 if (board_is_n800())
9418c65f
TL
414 vs2sel = 0;
415 else
416 vs2sel = 2;
417
418 menelaus_set_mmc_slot(1, 0, 0, 0);
419 menelaus_set_mmc_slot(2, 0, vs2sel, 0);
420}
421
422static void n8x0_mmc_cleanup(struct device *dev)
423{
424 menelaus_unregister_mmc_callback();
425
426 gpio_free(N8X0_SLOT_SWITCH_GPIO);
427
c8f27e97 428 if (board_is_n810()) {
9418c65f 429 gpio_free(N810_EMMC_VSD_GPIO);
1dea5c6b 430 gpio_free(N810_EMMC_VIO_GPIO);
9418c65f
TL
431 }
432}
433
434/*
435 * MMC controller1 has two slots that are multiplexed via I2C.
436 * MMC controller2 is not in use.
437 */
438static struct omap_mmc_platform_data mmc1_data = {
fa590c92 439 .nr_slots = 0,
9418c65f
TL
440 .switch_slot = n8x0_mmc_switch_slot,
441 .init = n8x0_mmc_late_init,
442 .cleanup = n8x0_mmc_cleanup,
443 .shutdown = n8x0_mmc_shutdown,
444 .max_freq = 24000000,
9418c65f
TL
445 .slots[0] = {
446 .wires = 4,
447 .set_power = n8x0_mmc_set_power,
448 .set_bus_mode = n8x0_mmc_set_bus_mode,
449 .get_cover_state = n8x0_mmc_get_cover_state,
450 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
451 MMC_VDD_32_33 | MMC_VDD_33_34,
452 .name = "internal",
453 },
454 .slots[1] = {
455 .set_power = n8x0_mmc_set_power,
456 .set_bus_mode = n8x0_mmc_set_bus_mode,
457 .get_cover_state = n8x0_mmc_get_cover_state,
458 .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
459 MMC_VDD_21_22 | MMC_VDD_22_23 |
460 MMC_VDD_23_24 | MMC_VDD_24_25 |
461 MMC_VDD_27_28 | MMC_VDD_28_29 |
462 MMC_VDD_29_30 | MMC_VDD_30_31 |
463 MMC_VDD_32_33 | MMC_VDD_33_34,
464 .name = "external",
465 },
466};
467
468static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
469
bc593f5d
IG
470static struct gpio n810_emmc_gpios[] __initdata = {
471 { N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
472 { N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
473};
9418c65f 474
bc593f5d 475static void __init n8x0_mmc_init(void)
9418c65f
TL
476{
477 int err;
478
c8f27e97 479 if (board_is_n810()) {
9418c65f
TL
480 mmc1_data.slots[0].name = "external";
481
482 /*
483 * Some Samsung Movinand chips do not like open-ended
484 * multi-block reads and fall to braind-dead state
485 * while doing so. Reducing the number of blocks in
486 * the transfer or delays in clock disable do not help
487 */
488 mmc1_data.slots[1].name = "internal";
489 mmc1_data.slots[1].ban_openended = 1;
490 }
491
bc593f5d
IG
492 err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
493 "MMC slot switch");
9418c65f 494 if (err)
1dea5c6b 495 return;
9418c65f 496
c8f27e97 497 if (board_is_n810()) {
bc593f5d
IG
498 err = gpio_request_array(n810_emmc_gpios,
499 ARRAY_SIZE(n810_emmc_gpios));
9418c65f
TL
500 if (err) {
501 gpio_free(N8X0_SLOT_SWITCH_GPIO);
1dea5c6b 502 return;
9418c65f 503 }
9418c65f
TL
504 }
505
fa590c92 506 mmc1_data.nr_slots = 2;
9418c65f 507 mmc_data[0] = &mmc1_data;
9418c65f
TL
508}
509#else
fa590c92 510static struct omap_mmc_platform_data mmc1_data;
9418c65f
TL
511void __init n8x0_mmc_init(void)
512{
513}
9418c65f
TL
514#endif /* CONFIG_MMC_OMAP */
515
516#ifdef CONFIG_MENELAUS
517
518static int n8x0_auto_sleep_regulators(void)
519{
520 u32 val;
521 int ret;
522
523 val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
524 | EN_VAUX_SLEEP | EN_VIO_SLEEP \
525 | EN_VMEM_SLEEP | EN_DC3_SLEEP \
526 | EN_VC_SLEEP | EN_DC2_SLEEP;
527
528 ret = menelaus_set_regulator_sleep(1, val);
529 if (ret < 0) {
7852ec05
PW
530 pr_err("Could not set regulators to sleep on menelaus: %u\n",
531 ret);
9418c65f
TL
532 return ret;
533 }
534 return 0;
535}
536
537static int n8x0_auto_voltage_scale(void)
538{
539 int ret;
540
541 ret = menelaus_set_vcore_hw(1400, 1050);
542 if (ret < 0) {
7852ec05 543 pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
9418c65f
TL
544 return ret;
545 }
546 return 0;
547}
548
549static int n8x0_menelaus_late_init(struct device *dev)
550{
551 int ret;
552
553 ret = n8x0_auto_voltage_scale();
554 if (ret < 0)
555 return ret;
556 ret = n8x0_auto_sleep_regulators();
557 if (ret < 0)
558 return ret;
559 return 0;
560}
561
a7f97d25
JN
562#else
563static int n8x0_menelaus_late_init(struct device *dev)
564{
565 return 0;
566}
567#endif
568
e92ce89c 569struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
a7f97d25
JN
570 .late_init = n8x0_menelaus_late_init,
571};
572
e92ce89c 573struct aic3x_pdata n810_aic33_data __initdata = {
366498d4 574 .gpio_reset = 118,
9418c65f
TL
575};
576
810ac2a1
TL
577static int __init n8x0_late_initcall(void)
578{
579 if (!board_caps)
580 return -ENODEV;
581
810ac2a1
TL
582 n8x0_mmc_init();
583 n8x0_usb_init();
810ac2a1
TL
584
585 return 0;
586}
587omap_late_initcall(n8x0_late_initcall);
588
fa590c92
TL
589/*
590 * Legacy init pdata init for n8x0. Note that we want to follow the
591 * I2C bus numbering starting at 0 for device tree like other omaps.
592 */
593void * __init n8x0_legacy_init(void)
594{
595 board_check_revision();
596 spi_register_board_info(n800_spi_board_info,
597 ARRAY_SIZE(n800_spi_board_info));
fa590c92
TL
598 return &mmc1_data;
599}