[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-omap2 / board-n8x0.c

/*
 * linux/arch/arm/mach-omap2/board-n8x0.c
 *
 * Copyright (C) 2005-2009 Nokia Corporation
 * Author: Juha Yrjola <juha.yrjola@nokia.com>
 *
 * Modified from mach-omap2/board-generic.c
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/stddef.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/usb/musb.h>
#include <linux/platform_data/i2c-cbus-gpio.h>
#include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/platform_data/mtd-onenand-omap2.h>
#include <linux/mfd/menelaus.h>
#include <sound/tlv320aic3x.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include "common.h"
#include "mmc.h"

#include "mux.h"
#include "gpmc-onenand.h"

#define TUSB6010_ASYNC_CS	1
#define TUSB6010_SYNC_CS	4
#define TUSB6010_GPIO_INT	58
#define TUSB6010_GPIO_ENABLE	0
#define TUSB6010_DMACHAN	0x3f

#define NOKIA_N810_WIMAX	(1 << 2)
#define NOKIA_N810		(1 << 1)
#define NOKIA_N800		(1 << 0)

static u32 board_caps;

#define board_is_n800()		(board_caps & NOKIA_N800)
#define board_is_n810()		(board_caps & NOKIA_N810)
#define board_is_n810_wimax()	(board_caps & NOKIA_N810_WIMAX)

static void board_check_revision(void)
{
	if (of_have_populated_dt()) {
		if (of_machine_is_compatible("nokia,n800"))
			board_caps = NOKIA_N800;
		else if (of_machine_is_compatible("nokia,n810"))
			board_caps = NOKIA_N810;
		else if (of_machine_is_compatible("nokia,n810-wimax"))
			board_caps = NOKIA_N810_WIMAX;
	} else {
		if (machine_is_nokia_n800())
			board_caps = NOKIA_N800;
		else if (machine_is_nokia_n810())
			board_caps = NOKIA_N810;
		else if (machine_is_nokia_n810_wimax())
			board_caps = NOKIA_N810_WIMAX;
	}

	if (!board_caps)
		pr_err("Unknown board\n");
}

#if defined(CONFIG_I2C_CBUS_GPIO) || defined(CONFIG_I2C_CBUS_GPIO_MODULE)
static struct i2c_cbus_platform_data n8x0_cbus_data = {
	.clk_gpio = 66,
	.dat_gpio = 65,
	.sel_gpio = 64,
};

static struct platform_device n8x0_cbus_device = {
	.name	= "i2c-cbus-gpio",
	.id	= 3,
	.dev	= {
		.platform_data = &n8x0_cbus_data,
	},
};

static struct i2c_board_info n8x0_i2c_board_info_3[] __initdata = {
	{
		I2C_BOARD_INFO("retu-mfd", 0x01),
	},
};

static void __init n8x0_cbus_init(void)
{
	const int retu_irq_gpio = 108;

	if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
		return;
	irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
	n8x0_i2c_board_info_3[0].irq = gpio_to_irq(retu_irq_gpio);
	i2c_register_board_info(3, n8x0_i2c_board_info_3,
				ARRAY_SIZE(n8x0_i2c_board_info_3));
	platform_device_register(&n8x0_cbus_device);
}
#else /* CONFIG_I2C_CBUS_GPIO */
static void __init n8x0_cbus_init(void)
{
}
#endif /* CONFIG_I2C_CBUS_GPIO */

#if defined(CONFIG_USB_MUSB_TUSB6010) || defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
/*
 * Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
 * 1.5 V voltage regulators of PM companion chip. Companion chip will then
 * provide then PGOOD signal to TUSB6010 which will release it from reset.
 */
static int tusb_set_power(int state)
{
	int i, retval = 0;

	if (state) {
		gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
		msleep(1);

		/* Wait until TUSB6010 pulls INT pin down */
		i = 100;
		while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
			msleep(1);
			i--;
		}

		if (!i) {
			printk(KERN_ERR "tusb: powerup failed\n");
			retval = -ENODEV;
		}
	} else {
		gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
		msleep(10);
	}

	return retval;
}

static struct musb_hdrc_config musb_config = {
	.multipoint	= 1,
	.dyn_fifo	= 1,
	.num_eps	= 16,
	.ram_bits	= 12,
};

static struct musb_hdrc_platform_data tusb_data = {
	.mode		= MUSB_OTG,
	.set_power	= tusb_set_power,
	.min_power	= 25,	/* x2 = 50 mA drawn from VBUS as peripheral */
	.power		= 100,	/* Max 100 mA VBUS for host mode */
	.config		= &musb_config,
};

static void __init n8x0_usb_init(void)
{
	int ret = 0;
	static char	announce[] __initdata = KERN_INFO "TUSB 6010\n";

	/* PM companion chip power control pin */
	ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
			       "TUSB6010 enable");
	if (ret != 0) {
		printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
		       TUSB6010_GPIO_ENABLE);
		return;
	}
	tusb_set_power(0);

	ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
					TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
					TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
	if (ret != 0)
		goto err;

	printk(announce);

	return;

err:
	gpio_free(TUSB6010_GPIO_ENABLE);
}
#else

static void __init n8x0_usb_init(void) {}

#endif /*CONFIG_USB_MUSB_TUSB6010 */


static struct omap2_mcspi_device_config p54spi_mcspi_config = {
	.turbo_mode	= 0,
};

static struct spi_board_info n800_spi_board_info[] __initdata = {
	{
		.modalias	= "p54spi",
		.bus_num	= 2,
		.chip_select	= 0,
		.max_speed_hz   = 48000000,
		.controller_data = &p54spi_mcspi_config,
	},
};

#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
	defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)

static struct mtd_partition onenand_partitions[] = {
	{
		.name           = "bootloader",
		.offset         = 0,
		.size           = 0x20000,
		.mask_flags     = MTD_WRITEABLE,	/* Force read-only */
	},
	{
		.name           = "config",
		.offset         = MTDPART_OFS_APPEND,
		.size           = 0x60000,
	},
	{
		.name           = "kernel",
		.offset         = MTDPART_OFS_APPEND,
		.size           = 0x200000,
	},
	{
		.name           = "initfs",
		.offset         = MTDPART_OFS_APPEND,
		.size           = 0x400000,
	},
	{
		.name           = "rootfs",
		.offset         = MTDPART_OFS_APPEND,
		.size           = MTDPART_SIZ_FULL,
	},
};

static struct omap_onenand_platform_data board_onenand_data[] = {
	{
		.cs		= 0,
		.gpio_irq	= 26,
		.parts		= onenand_partitions,
		.nr_parts	= ARRAY_SIZE(onenand_partitions),
		.flags		= ONENAND_SYNC_READ,
	}
};
#endif

#if defined(CONFIG_MENELAUS) &&						\
	(defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))

/*
 * On both N800 and N810, only the first of the two MMC controllers is in use.
 * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
 * On N800, both slots are powered via Menelaus. On N810, only one of the
 * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
 *
 * VMMC				slot 1 on both N800 and N810
 * VDCDC3_APE and VMCS2_APE	slot 2 on N800
 * GPIO23 and GPIO9		slot 2 EMMC on N810
 *
 */
#define N8X0_SLOT_SWITCH_GPIO	96
#define N810_EMMC_VSD_GPIO	23
#define N810_EMMC_VIO_GPIO	9

static int slot1_cover_open;
static int slot2_cover_open;
static struct device *mmc_device;

static int n8x0_mmc_switch_slot(struct device *dev, int slot)
{
#ifdef CONFIG_MMC_DEBUG
	dev_dbg(dev, "Choose slot %d\n", slot + 1);
#endif
	gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
	return 0;
}

static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
					int power_on, int vdd)
{
	int mV;

#ifdef CONFIG_MMC_DEBUG
	dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
		power_on ? "on" : "off", vdd);
#endif
	if (slot == 0) {
		if (!power_on)
			return menelaus_set_vmmc(0);
		switch (1 << vdd) {
		case MMC_VDD_33_34:
		case MMC_VDD_32_33:
		case MMC_VDD_31_32:
			mV = 3100;
			break;
		case MMC_VDD_30_31:
			mV = 3000;
			break;
		case MMC_VDD_28_29:
			mV = 2800;
			break;
		case MMC_VDD_165_195:
			mV = 1850;
			break;
		default:
			BUG();
		}
		return menelaus_set_vmmc(mV);
	} else {
		if (!power_on)
			return menelaus_set_vdcdc(3, 0);
		switch (1 << vdd) {
		case MMC_VDD_33_34:
		case MMC_VDD_32_33:
			mV = 3300;
			break;
		case MMC_VDD_30_31:
		case MMC_VDD_29_30:
			mV = 3000;
			break;
		case MMC_VDD_28_29:
		case MMC_VDD_27_28:
			mV = 2800;
			break;
		case MMC_VDD_24_25:
		case MMC_VDD_23_24:
			mV = 2400;
			break;
		case MMC_VDD_22_23:
		case MMC_VDD_21_22:
			mV = 2200;
			break;
		case MMC_VDD_20_21:
			mV = 2000;
			break;
		case MMC_VDD_165_195:
			mV = 1800;
			break;
		default:
			BUG();
		}
		return menelaus_set_vdcdc(3, mV);
	}
	return 0;
}

static void n810_set_power_emmc(struct device *dev,
					 int power_on)
{
	dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");

	if (power_on) {
		gpio_set_value(N810_EMMC_VSD_GPIO, 1);
		msleep(1);
		gpio_set_value(N810_EMMC_VIO_GPIO, 1);
		msleep(1);
	} else {
		gpio_set_value(N810_EMMC_VIO_GPIO, 0);
		msleep(50);
		gpio_set_value(N810_EMMC_VSD_GPIO, 0);
		msleep(50);
	}
}

static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
			      int vdd)
{
	if (board_is_n800() || slot == 0)
		return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);

	n810_set_power_emmc(dev, power_on);

	return 0;
}

static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
{
	int r;

	dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
		bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
	BUG_ON(slot != 0 && slot != 1);
	slot++;
	switch (bus_mode) {
	case MMC_BUSMODE_OPENDRAIN:
		r = menelaus_set_mmc_opendrain(slot, 1);
		break;
	case MMC_BUSMODE_PUSHPULL:
		r = menelaus_set_mmc_opendrain(slot, 0);
		break;
	default:
		BUG();
	}
	if (r != 0 && printk_ratelimit())
		dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
			slot);
	return r;
}

static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
{
	slot++;
	BUG_ON(slot != 1 && slot != 2);
	if (slot == 1)
		return slot1_cover_open;
	else
		return slot2_cover_open;
}

static void n8x0_mmc_callback(void *data, u8 card_mask)
{
	int bit, *openp, index;

	if (board_is_n800()) {
		bit = 1 << 1;
		openp = &slot2_cover_open;
		index = 1;
	} else {
		bit = 1;
		openp = &slot1_cover_open;
		index = 0;
	}

	if (card_mask & bit)
		*openp = 1;
	else
		*openp = 0;

#ifdef CONFIG_MMC_OMAP
	omap_mmc_notify_cover_event(mmc_device, index, *openp);
#else
	pr_warn("MMC: notify cover event not available\n");
#endif
}

static int n8x0_mmc_late_init(struct device *dev)
{
	int r, bit, *openp;
	int vs2sel;

	mmc_device = dev;

	r = menelaus_set_slot_sel(1);
	if (r < 0)
		return r;

	if (board_is_n800())
		vs2sel = 0;
	else
		vs2sel = 2;

	r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
	if (r < 0)
		return r;

	n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
	n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);

	r = menelaus_set_mmc_slot(1, 1, 0, 1);
	if (r < 0)
		return r;
	r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
	if (r < 0)
		return r;

	r = menelaus_get_slot_pin_states();
	if (r < 0)
		return r;

	if (board_is_n800()) {
		bit = 1 << 1;
		openp = &slot2_cover_open;
	} else {
		bit = 1;
		openp = &slot1_cover_open;
		slot2_cover_open = 0;
	}

	/* All slot pin bits seem to be inversed until first switch change */
	if (r == 0xf || r == (0xf & ~bit))
		r = ~r;

	if (r & bit)
		*openp = 1;
	else
		*openp = 0;

	r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);

	return r;
}

static void n8x0_mmc_shutdown(struct device *dev)
{
	int vs2sel;

	if (board_is_n800())
		vs2sel = 0;
	else
		vs2sel = 2;

	menelaus_set_mmc_slot(1, 0, 0, 0);
	menelaus_set_mmc_slot(2, 0, vs2sel, 0);
}

static void n8x0_mmc_cleanup(struct device *dev)
{
	menelaus_unregister_mmc_callback();

	gpio_free(N8X0_SLOT_SWITCH_GPIO);

	if (board_is_n810()) {
		gpio_free(N810_EMMC_VSD_GPIO);
		gpio_free(N810_EMMC_VIO_GPIO);
	}
}

/*
 * MMC controller1 has two slots that are multiplexed via I2C.
 * MMC controller2 is not in use.
 */
static struct omap_mmc_platform_data mmc1_data = {
	.nr_slots			= 2,
	.switch_slot			= n8x0_mmc_switch_slot,
	.init				= n8x0_mmc_late_init,
	.cleanup			= n8x0_mmc_cleanup,
	.shutdown			= n8x0_mmc_shutdown,
	.max_freq			= 24000000,
	.slots[0] = {
		.wires			= 4,
		.set_power		= n8x0_mmc_set_power,
		.set_bus_mode		= n8x0_mmc_set_bus_mode,
		.get_cover_state	= n8x0_mmc_get_cover_state,
		.ocr_mask		= MMC_VDD_165_195 | MMC_VDD_30_31 |
						MMC_VDD_32_33   | MMC_VDD_33_34,
		.name			= "internal",
	},
	.slots[1] = {
		.set_power		= n8x0_mmc_set_power,
		.set_bus_mode		= n8x0_mmc_set_bus_mode,
		.get_cover_state	= n8x0_mmc_get_cover_state,
		.ocr_mask		= MMC_VDD_165_195 | MMC_VDD_20_21 |
						MMC_VDD_21_22 | MMC_VDD_22_23 |
						MMC_VDD_23_24 | MMC_VDD_24_25 |
						MMC_VDD_27_28 | MMC_VDD_28_29 |
						MMC_VDD_29_30 | MMC_VDD_30_31 |
						MMC_VDD_32_33 | MMC_VDD_33_34,
		.name			= "external",
	},
};

static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];

static struct gpio n810_emmc_gpios[] __initdata = {
	{ N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW,  "MMC slot 2 Vddf" },
	{ N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW,  "MMC slot 2 Vdd"  },
};

static void __init n8x0_mmc_init(void)
{
	int err;

	if (board_is_n810()) {
		mmc1_data.slots[0].name = "external";

		/*
		 * Some Samsung Movinand chips do not like open-ended
		 * multi-block reads and fall to braind-dead state
		 * while doing so. Reducing the number of blocks in
		 * the transfer or delays in clock disable do not help
		 */
		mmc1_data.slots[1].name = "internal";
		mmc1_data.slots[1].ban_openended = 1;
	}

	err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
			       "MMC slot switch");
	if (err)
		return;

	if (board_is_n810()) {
		err = gpio_request_array(n810_emmc_gpios,
					 ARRAY_SIZE(n810_emmc_gpios));
		if (err) {
			gpio_free(N8X0_SLOT_SWITCH_GPIO);
			return;
		}
	}

	mmc_data[0] = &mmc1_data;
	omap242x_init_mmc(mmc_data);
}
#else

void __init n8x0_mmc_init(void)
{
}
#endif	/* CONFIG_MMC_OMAP */

#ifdef CONFIG_MENELAUS

static int n8x0_auto_sleep_regulators(void)
{
	u32 val;
	int ret;

	val = EN_VPLL_SLEEP | EN_VMMC_SLEEP    \
		| EN_VAUX_SLEEP | EN_VIO_SLEEP \
		| EN_VMEM_SLEEP | EN_DC3_SLEEP \
		| EN_VC_SLEEP | EN_DC2_SLEEP;

	ret = menelaus_set_regulator_sleep(1, val);
	if (ret < 0) {
		pr_err("Could not set regulators to sleep on menelaus: %u\n",
		       ret);
		return ret;
	}
	return 0;
}

static int n8x0_auto_voltage_scale(void)
{
	int ret;

	ret = menelaus_set_vcore_hw(1400, 1050);
	if (ret < 0) {
		pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
		return ret;
	}
	return 0;
}

static int n8x0_menelaus_late_init(struct device *dev)
{
	int ret;

	ret = n8x0_auto_voltage_scale();
	if (ret < 0)
		return ret;
	ret = n8x0_auto_sleep_regulators();
	if (ret < 0)
		return ret;
	return 0;
}

#else
static int n8x0_menelaus_late_init(struct device *dev)
{
	return 0;
}
#endif

static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
	.late_init = n8x0_menelaus_late_init,
};

static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
	{
		I2C_BOARD_INFO("menelaus", 0x72),
		.irq = 7 + OMAP_INTC_START,
		.platform_data = &n8x0_menelaus_platform_data,
	},
};

static struct aic3x_pdata n810_aic33_data __initdata = {
	.gpio_reset = 118,
};

static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
	{
		I2C_BOARD_INFO("tlv320aic3x", 0x18),
		.platform_data = &n810_aic33_data,
	},
};

#ifdef CONFIG_OMAP_MUX
static struct omap_board_mux board_mux[] __initdata = {
	/* I2S codec port pins for McBSP block */
	OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
	OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
	OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
	OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
	{ .reg_offset = OMAP_MUX_TERMINATOR },
};

static struct omap_device_pad serial2_pads[] __initdata = {
	{
		.name	= "uart3_rx_irrx.uart3_rx_irrx",
		.flags	= OMAP_DEVICE_PAD_REMUX | OMAP_DEVICE_PAD_WAKEUP,
		.enable	= OMAP_MUX_MODE0,
		.idle	= OMAP_MUX_MODE3	/* Mux as GPIO for idle */
	},
};

static inline void board_serial_init(void)
{
	struct omap_board_data bdata;

	bdata.flags = 0;
	bdata.pads = NULL;
	bdata.pads_cnt = 0;

	bdata.id = 0;
	omap_serial_init_port(&bdata, NULL);

	bdata.id = 1;
	omap_serial_init_port(&bdata, NULL);

	bdata.id = 2;
	bdata.pads = serial2_pads;
	bdata.pads_cnt = ARRAY_SIZE(serial2_pads);
	omap_serial_init_port(&bdata, NULL);
}

#else

static inline void board_serial_init(void)
{
	omap_serial_init();
}

#endif

static void __init n8x0_init_machine(void)
{
	board_check_revision();
	omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
	/* FIXME: add n810 spi devices */
	spi_register_board_info(n800_spi_board_info,
				ARRAY_SIZE(n800_spi_board_info));
	omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
			      ARRAY_SIZE(n8x0_i2c_board_info_1));
	omap_register_i2c_bus(2, 400, NULL, 0);
	if (board_is_n810())
		i2c_register_board_info(2, n810_i2c_board_info_2,
					ARRAY_SIZE(n810_i2c_board_info_2));
	board_serial_init();
	omap_sdrc_init(NULL, NULL);
	gpmc_onenand_init(board_onenand_data);
	n8x0_mmc_init();
	n8x0_usb_init();
	n8x0_cbus_init();
}

MACHINE_START(NOKIA_N800, "Nokia N800")
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap242x_map_io,
	.init_early	= omap2420_init_early,
	.init_irq	= omap2_init_irq,
	.handle_irq	= omap2_intc_handle_irq,
	.init_machine	= n8x0_init_machine,
	.init_late	= omap2420_init_late,
	.init_time	= omap2_sync32k_timer_init,
	.restart	= omap2xxx_restart,
MACHINE_END

MACHINE_START(NOKIA_N810, "Nokia N810")
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap242x_map_io,
	.init_early	= omap2420_init_early,
	.init_irq	= omap2_init_irq,
	.handle_irq	= omap2_intc_handle_irq,
	.init_machine	= n8x0_init_machine,
	.init_late	= omap2420_init_late,
	.init_time	= omap2_sync32k_timer_init,
	.restart	= omap2xxx_restart,
MACHINE_END

MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
	.atag_offset	= 0x100,
	.reserve	= omap_reserve,
	.map_io		= omap242x_map_io,
	.init_early	= omap2420_init_early,
	.init_irq	= omap2_init_irq,
	.handle_irq	= omap2_intc_handle_irq,
	.init_machine	= n8x0_init_machine,
	.init_late	= omap2420_init_late,
	.init_time	= omap2_sync32k_timer_init,
	.restart	= omap2xxx_restart,
MACHINE_END
Commit	Line	Data
63138812 KV	1	/*
	2	* linux/arch/arm/mach-omap2/board-n8x0.c
	3	*
	4	* Copyright (C) 2005-2009 Nokia Corporation
	5	* Author: Juha Yrjola <juha.yrjola@nokia.com>
	6	*
	7	* Modified from mach-omap2/board-generic.c
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/clk.h>
	15	#include <linux/delay.h>
	16	#include <linux/gpio.h>
	17	#include <linux/init.h>
	18	#include <linux/io.h>
0857ba3c	19	#include <linux/irq.h>
63138812	20	#include <linux/stddef.h>
9418c65f	21	#include <linux/i2c.h>
63138812 KV	22	#include <linux/spi/spi.h>
63138812 KV	23	#include <linux/usb/musb.h>
0857ba3c	24	#include <linux/platform_data/i2c-cbus-gpio.h>
2203747c AB	25	#include <linux/platform_data/spi-omap2-mcspi.h>
2203747c AB	26	#include <linux/platform_data/mtd-onenand-omap2.h>
7bd3b618	27	#include <linux/mfd/menelaus.h>
366498d4	28	#include <sound/tlv320aic3x.h>
63138812 KV	29
	30	#include <asm/mach/arch.h>
	31	#include <asm/mach-types.h>
	32
4e65331c	33	#include "common.h"
68f39e74	34	#include "mmc.h"
63138812	35
bd8f0fc9	36	#include "mux.h"
b6ab13e7	37	#include "gpmc-onenand.h"
bd8f0fc9	38
97b9ad16 FA	39	#define TUSB6010_ASYNC_CS 1
	40	#define TUSB6010_SYNC_CS 4
	41	#define TUSB6010_GPIO_INT 58
	42	#define TUSB6010_GPIO_ENABLE 0
	43	#define TUSB6010_DMACHAN 0x3f
	44
c8f27e97 TL	45	#define NOKIA_N810_WIMAX (1 << 2)
	46	#define NOKIA_N810 (1 << 1)
	47	#define NOKIA_N800 (1 << 0)
	48
	49	static u32 board_caps;
	50
	51	#define board_is_n800() (board_caps & NOKIA_N800)
	52	#define board_is_n810() (board_caps & NOKIA_N810)
	53	#define board_is_n810_wimax() (board_caps & NOKIA_N810_WIMAX)
	54
	55	static void board_check_revision(void)
	56	{
	57	if (of_have_populated_dt()) {
	58	if (of_machine_is_compatible("nokia,n800"))
	59	board_caps = NOKIA_N800;
	60	else if (of_machine_is_compatible("nokia,n810"))
	61	board_caps = NOKIA_N810;
	62	else if (of_machine_is_compatible("nokia,n810-wimax"))
	63	board_caps = NOKIA_N810_WIMAX;
	64	} else {
	65	if (machine_is_nokia_n800())
	66	board_caps = NOKIA_N800;
	67	else if (machine_is_nokia_n810())
	68	board_caps = NOKIA_N810;
	69	else if (machine_is_nokia_n810_wimax())
	70	board_caps = NOKIA_N810_WIMAX;
	71	}
	72
	73	if (!board_caps)
	74	pr_err("Unknown board\n");
	75	}
	76
0857ba3c AK	77	#if defined(CONFIG_I2C_CBUS_GPIO) \|\| defined(CONFIG_I2C_CBUS_GPIO_MODULE)
	78	static struct i2c_cbus_platform_data n8x0_cbus_data = {
	79	.clk_gpio = 66,
	80	.dat_gpio = 65,
	81	.sel_gpio = 64,
	82	};
	83
	84	static struct platform_device n8x0_cbus_device = {
	85	.name = "i2c-cbus-gpio",
	86	.id = 3,
	87	.dev = {
	88	.platform_data = &n8x0_cbus_data,
	89	},
	90	};
	91
	92	static struct i2c_board_info n8x0_i2c_board_info_3[] __initdata = {
	93	{
	94	I2C_BOARD_INFO("retu-mfd", 0x01),
	95	},
	96	};
	97
	98	static void __init n8x0_cbus_init(void)
	99	{
	100	const int retu_irq_gpio = 108;
	101
	102	if (gpio_request_one(retu_irq_gpio, GPIOF_IN, "Retu IRQ"))
	103	return;
	104	irq_set_irq_type(gpio_to_irq(retu_irq_gpio), IRQ_TYPE_EDGE_RISING);
	105	n8x0_i2c_board_info_3[0].irq = gpio_to_irq(retu_irq_gpio);
	106	i2c_register_board_info(3, n8x0_i2c_board_info_3,
	107	ARRAY_SIZE(n8x0_i2c_board_info_3));
	108	platform_device_register(&n8x0_cbus_device);
	109	}
	110	#else /* CONFIG_I2C_CBUS_GPIO */
	111	static void __init n8x0_cbus_init(void)
	112	{
	113	}
	114	#endif /* CONFIG_I2C_CBUS_GPIO */
	115
9a35f876	116	#if defined(CONFIG_USB_MUSB_TUSB6010) \|\| defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
97b9ad16 FA	117	/*
	118	* Enable or disable power to TUSB6010. When enabling, turn on 3.3 V and
	119	* 1.5 V voltage regulators of PM companion chip. Companion chip will then
	120	* provide then PGOOD signal to TUSB6010 which will release it from reset.
	121	*/
	122	static int tusb_set_power(int state)
	123	{
	124	int i, retval = 0;
	125
	126	if (state) {
	127	gpio_set_value(TUSB6010_GPIO_ENABLE, 1);
	128	msleep(1);
	129
	130	/* Wait until TUSB6010 pulls INT pin down */
	131	i = 100;
	132	while (i && gpio_get_value(TUSB6010_GPIO_INT)) {
	133	msleep(1);
	134	i--;
	135	}
	136
	137	if (!i) {
	138	printk(KERN_ERR "tusb: powerup failed\n");
	139	retval = -ENODEV;
	140	}
	141	} else {
	142	gpio_set_value(TUSB6010_GPIO_ENABLE, 0);
	143	msleep(10);
	144	}
	145
	146	return retval;
	147	}
	148
	149	static struct musb_hdrc_config musb_config = {
	150	.multipoint = 1,
	151	.dyn_fifo = 1,
	152	.num_eps = 16,
	153	.ram_bits = 12,
	154	};
	155
	156	static struct musb_hdrc_platform_data tusb_data = {
97b9ad16	157	.mode = MUSB_OTG,
97b9ad16 FA	158	.set_power = tusb_set_power,
	159	.min_power = 25, /* x2 = 50 mA drawn from VBUS as peripheral */
	160	.power = 100, /* Max 100 mA VBUS for host mode */
	161	.config = &musb_config,
	162	};
	163
	164	static void __init n8x0_usb_init(void)
	165	{
	166	int ret = 0;
	167	static char announce[] __initdata = KERN_INFO "TUSB 6010\n";
	168
	169	/* PM companion chip power control pin */
bc593f5d IG	170	ret = gpio_request_one(TUSB6010_GPIO_ENABLE, GPIOF_OUT_INIT_LOW,
bc593f5d IG	171	"TUSB6010 enable");
97b9ad16 FA	172	if (ret != 0) {
	173	printk(KERN_ERR "Could not get TUSB power GPIO%i\n",
	174	TUSB6010_GPIO_ENABLE);
	175	return;
	176	}
97b9ad16 FA	177	tusb_set_power(0);
	178
	179	ret = tusb6010_setup_interface(&tusb_data, TUSB6010_REFCLK_19, 2,
	180	TUSB6010_ASYNC_CS, TUSB6010_SYNC_CS,
	181	TUSB6010_GPIO_INT, TUSB6010_DMACHAN);
	182	if (ret != 0)
	183	goto err;
	184
	185	printk(announce);
	186
	187	return;
	188
	189	err:
	190	gpio_free(TUSB6010_GPIO_ENABLE);
	191	}
	192	#else
	193
	194	static void __init n8x0_usb_init(void) {}
	195
7c925546	196	#endif /CONFIG_USB_MUSB_TUSB6010 /
97b9ad16 FA	197
97b9ad16 FA	198
63138812 KV	199	static struct omap2_mcspi_device_config p54spi_mcspi_config = {
63138812 KV	200	.turbo_mode = 0,
63138812 KV	201	};
	202
	203	static struct spi_board_info n800_spi_board_info[] __initdata = {
	204	{
	205	.modalias = "p54spi",
	206	.bus_num = 2,
	207	.chip_select = 0,
	208	.max_speed_hz = 48000000,
	209	.controller_data = &p54spi_mcspi_config,
	210	},
	211	};
	212
	213	#if defined(CONFIG_MTD_ONENAND_OMAP2) \|\| \
	214	defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
	215
	216	static struct mtd_partition onenand_partitions[] = {
	217	{
	218	.name = "bootloader",
	219	.offset = 0,
	220	.size = 0x20000,
	221	.mask_flags = MTD_WRITEABLE, /* Force read-only */
	222	},
	223	{
	224	.name = "config",
	225	.offset = MTDPART_OFS_APPEND,
	226	.size = 0x60000,
	227	},
	228	{
	229	.name = "kernel",
	230	.offset = MTDPART_OFS_APPEND,
	231	.size = 0x200000,
	232	},
	233	{
	234	.name = "initfs",
	235	.offset = MTDPART_OFS_APPEND,
	236	.size = 0x400000,
	237	},
	238	{
	239	.name = "rootfs",
	240	.offset = MTDPART_OFS_APPEND,
	241	.size = MTDPART_SIZ_FULL,
	242	},
	243	};
	244
a1a92e6f AK	245	static struct omap_onenand_platform_data board_onenand_data[] = {
	246	{
	247	.cs = 0,
	248	.gpio_irq = 26,
	249	.parts = onenand_partitions,
	250	.nr_parts = ARRAY_SIZE(onenand_partitions),
	251	.flags = ONENAND_SYNC_READ,
	252	}
63138812	253	};
63138812 KV	254	#endif
63138812 KV	255
9418c65f TL	256	#if defined(CONFIG_MENELAUS) && \
	257	(defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE))
	258
	259	/*
	260	* On both N800 and N810, only the first of the two MMC controllers is in use.
	261	* The two MMC slots are multiplexed via Menelaus companion chip over I2C.
	262	* On N800, both slots are powered via Menelaus. On N810, only one of the
	263	* slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
	264	*
	265	* VMMC slot 1 on both N800 and N810
	266	* VDCDC3_APE and VMCS2_APE slot 2 on N800
	267	* GPIO23 and GPIO9 slot 2 EMMC on N810
	268	*
	269	*/
	270	#define N8X0_SLOT_SWITCH_GPIO 96
	271	#define N810_EMMC_VSD_GPIO 23
1dea5c6b	272	#define N810_EMMC_VIO_GPIO 9
9418c65f	273
49b87c6d TL	274	static int slot1_cover_open;
	275	static int slot2_cover_open;
	276	static struct device *mmc_device;
	277
9418c65f TL	278	static int n8x0_mmc_switch_slot(struct device *dev, int slot)
	279	{
	280	#ifdef CONFIG_MMC_DEBUG
	281	dev_dbg(dev, "Choose slot %d\n", slot + 1);
	282	#endif
	283	gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
	284	return 0;
	285	}
	286
	287	static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
	288	int power_on, int vdd)
	289	{
	290	int mV;
	291
	292	#ifdef CONFIG_MMC_DEBUG
	293	dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
	294	power_on ? "on" : "off", vdd);
	295	#endif
	296	if (slot == 0) {
	297	if (!power_on)
	298	return menelaus_set_vmmc(0);
	299	switch (1 << vdd) {
	300	case MMC_VDD_33_34:
	301	case MMC_VDD_32_33:
	302	case MMC_VDD_31_32:
	303	mV = 3100;
	304	break;
	305	case MMC_VDD_30_31:
	306	mV = 3000;
	307	break;
	308	case MMC_VDD_28_29:
	309	mV = 2800;
	310	break;
	311	case MMC_VDD_165_195:
	312	mV = 1850;
	313	break;
	314	default:
	315	BUG();
	316	}
	317	return menelaus_set_vmmc(mV);
	318	} else {
	319	if (!power_on)
	320	return menelaus_set_vdcdc(3, 0);
	321	switch (1 << vdd) {
	322	case MMC_VDD_33_34:
	323	case MMC_VDD_32_33:
	324	mV = 3300;
	325	break;
	326	case MMC_VDD_30_31:
	327	case MMC_VDD_29_30:
	328	mV = 3000;
	329	break;
	330	case MMC_VDD_28_29:
	331	case MMC_VDD_27_28:
	332	mV = 2800;
	333	break;
	334	case MMC_VDD_24_25:
	335	case MMC_VDD_23_24:
	336	mV = 2400;
	337	break;
	338	case MMC_VDD_22_23:
	339	case MMC_VDD_21_22:
	340	mV = 2200;
	341	break;
342	case MMC_VDD_20_21:
343	mV = 2000;
344	break;
345	case MMC_VDD_165_195:
346	mV = 1800;
347	break;
348	default:
349	BUG();
350	}
351	return menelaus_set_vdcdc(3, mV);
352	}
353	return 0;
354	}
355
356	static void n810_set_power_emmc(struct device *dev,
357	int power_on)
358	{
359	dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
360
361	if (power_on) {
362	gpio_set_value(N810_EMMC_VSD_GPIO, 1);
363	msleep(1);
1dea5c6b	364	gpio_set_value(N810_EMMC_VIO_GPIO, 1);
9418c65f TL	365	msleep(1);
9418c65f TL	366	} else {
1dea5c6b	367	gpio_set_value(N810_EMMC_VIO_GPIO, 0);
9418c65f TL	368	msleep(50);
	369	gpio_set_value(N810_EMMC_VSD_GPIO, 0);
	370	msleep(50);
	371	}
	372	}
	373
	374	static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
	375	int vdd)
	376	{
c8f27e97	377	if (board_is_n800() \|\| slot == 0)
9418c65f TL	378	return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
	379
	380	n810_set_power_emmc(dev, power_on);
	381
	382	return 0;
	383	}
	384
	385	static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
	386	{
	387	int r;
	388
	389	dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
	390	bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
	391	BUG_ON(slot != 0 && slot != 1);
	392	slot++;
	393	switch (bus_mode) {
	394	case MMC_BUSMODE_OPENDRAIN:
	395	r = menelaus_set_mmc_opendrain(slot, 1);
	396	break;
	397	case MMC_BUSMODE_PUSHPULL:
	398	r = menelaus_set_mmc_opendrain(slot, 0);
	399	break;
	400	default:
	401	BUG();
	402	}
	403	if (r != 0 && printk_ratelimit())
	404	dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
	405	slot);
	406	return r;
	407	}
	408
	409	static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
	410	{
	411	slot++;
	412	BUG_ON(slot != 1 && slot != 2);
	413	if (slot == 1)
	414	return slot1_cover_open;
	415	else
	416	return slot2_cover_open;
	417	}
	418
	419	static void n8x0_mmc_callback(void *data, u8 card_mask)
	420	{
	421	int bit, *openp, index;
	422
c8f27e97	423	if (board_is_n800()) {
9418c65f TL	424	bit = 1 << 1;
	425	openp = &slot2_cover_open;
	426	index = 1;
	427	} else {
	428	bit = 1;
	429	openp = &slot1_cover_open;
	430	index = 0;
	431	}
	432
	433	if (card_mask & bit)
	434	*openp = 1;
	435	else
	436	*openp = 0;
	437
d5171102	438	#ifdef CONFIG_MMC_OMAP
9418c65f	439	omap_mmc_notify_cover_event(mmc_device, index, *openp);
d5171102 TL	440	#else
	441	pr_warn("MMC: notify cover event not available\n");
	442	#endif
9418c65f TL	443	}
9418c65f TL	444
9418c65f TL	445	static int n8x0_mmc_late_init(struct device *dev)
	446	{
	447	int r, bit, *openp;
	448	int vs2sel;
	449
	450	mmc_device = dev;
	451
	452	r = menelaus_set_slot_sel(1);
	453	if (r < 0)
	454	return r;
	455
c8f27e97	456	if (board_is_n800())
9418c65f TL	457	vs2sel = 0;
	458	else
	459	vs2sel = 2;
	460
	461	r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
	462	if (r < 0)
	463	return r;
	464
	465	n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
	466	n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
	467
	468	r = menelaus_set_mmc_slot(1, 1, 0, 1);
	469	if (r < 0)
	470	return r;
	471	r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
	472	if (r < 0)
	473	return r;
	474
	475	r = menelaus_get_slot_pin_states();
	476	if (r < 0)
	477	return r;
	478
c8f27e97	479	if (board_is_n800()) {
9418c65f TL	480	bit = 1 << 1;
	481	openp = &slot2_cover_open;
	482	} else {
	483	bit = 1;
	484	openp = &slot1_cover_open;
	485	slot2_cover_open = 0;
	486	}
	487
	488	/* All slot pin bits seem to be inversed until first switch change */
	489	if (r == 0xf \|\| r == (0xf & ~bit))
	490	r = ~r;
	491
	492	if (r & bit)
	493	*openp = 1;
	494	else
	495	*openp = 0;
	496
	497	r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
	498
	499	return r;
	500	}
	501
	502	static void n8x0_mmc_shutdown(struct device *dev)
	503	{
	504	int vs2sel;
	505
c8f27e97	506	if (board_is_n800())
9418c65f TL	507	vs2sel = 0;
	508	else
	509	vs2sel = 2;
	510
	511	menelaus_set_mmc_slot(1, 0, 0, 0);
	512	menelaus_set_mmc_slot(2, 0, vs2sel, 0);
	513	}
	514
	515	static void n8x0_mmc_cleanup(struct device *dev)
	516	{
	517	menelaus_unregister_mmc_callback();
	518
	519	gpio_free(N8X0_SLOT_SWITCH_GPIO);
	520
c8f27e97	521	if (board_is_n810()) {
9418c65f	522	gpio_free(N810_EMMC_VSD_GPIO);
1dea5c6b	523	gpio_free(N810_EMMC_VIO_GPIO);
9418c65f TL	524	}
	525	}
	526
	527	/*
	528	* MMC controller1 has two slots that are multiplexed via I2C.
	529	* MMC controller2 is not in use.
	530	*/
	531	static struct omap_mmc_platform_data mmc1_data = {
	532	.nr_slots = 2,
	533	.switch_slot = n8x0_mmc_switch_slot,
	534	.init = n8x0_mmc_late_init,
	535	.cleanup = n8x0_mmc_cleanup,
	536	.shutdown = n8x0_mmc_shutdown,
	537	.max_freq = 24000000,
9418c65f TL	538	.slots[0] = {
	539	.wires = 4,
	540	.set_power = n8x0_mmc_set_power,
	541	.set_bus_mode = n8x0_mmc_set_bus_mode,
	542	.get_cover_state = n8x0_mmc_get_cover_state,
	543	.ocr_mask = MMC_VDD_165_195 \| MMC_VDD_30_31 \|
	544	MMC_VDD_32_33 \| MMC_VDD_33_34,
	545	.name = "internal",
	546	},
	547	.slots[1] = {
	548	.set_power = n8x0_mmc_set_power,
	549	.set_bus_mode = n8x0_mmc_set_bus_mode,
	550	.get_cover_state = n8x0_mmc_get_cover_state,
	551	.ocr_mask = MMC_VDD_165_195 \| MMC_VDD_20_21 \|
	552	MMC_VDD_21_22 \| MMC_VDD_22_23 \|
	553	MMC_VDD_23_24 \| MMC_VDD_24_25 \|
	554	MMC_VDD_27_28 \| MMC_VDD_28_29 \|
	555	MMC_VDD_29_30 \| MMC_VDD_30_31 \|
	556	MMC_VDD_32_33 \| MMC_VDD_33_34,
	557	.name = "external",
	558	},
	559	};
	560
	561	static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
	562
bc593f5d IG	563	static struct gpio n810_emmc_gpios[] __initdata = {
	564	{ N810_EMMC_VSD_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vddf" },
	565	{ N810_EMMC_VIO_GPIO, GPIOF_OUT_INIT_LOW, "MMC slot 2 Vdd" },
	566	};
9418c65f	567
bc593f5d	568	static void __init n8x0_mmc_init(void)
9418c65f TL	569	{
	570	int err;
	571
c8f27e97	572	if (board_is_n810()) {
9418c65f TL	573	mmc1_data.slots[0].name = "external";
	574
	575	/*
	576	* Some Samsung Movinand chips do not like open-ended
	577	* multi-block reads and fall to braind-dead state
	578	* while doing so. Reducing the number of blocks in
	579	* the transfer or delays in clock disable do not help
	580	*/
	581	mmc1_data.slots[1].name = "internal";
	582	mmc1_data.slots[1].ban_openended = 1;
	583	}
	584
bc593f5d IG	585	err = gpio_request_one(N8X0_SLOT_SWITCH_GPIO, GPIOF_OUT_INIT_LOW,
bc593f5d IG	586	"MMC slot switch");
9418c65f	587	if (err)
1dea5c6b	588	return;
9418c65f	589
c8f27e97	590	if (board_is_n810()) {
bc593f5d IG	591	err = gpio_request_array(n810_emmc_gpios,
bc593f5d IG	592	ARRAY_SIZE(n810_emmc_gpios));
9418c65f TL	593	if (err) {
9418c65f TL	594	gpio_free(N8X0_SLOT_SWITCH_GPIO);
1dea5c6b	595	return;
9418c65f	596	}
9418c65f TL	597	}
	598
	599	mmc_data[0] = &mmc1_data;
e08016d0	600	omap242x_init_mmc(mmc_data);
9418c65f TL	601	}
	602	#else
	603
	604	void __init n8x0_mmc_init(void)
	605	{
	606	}
9418c65f TL	607	#endif /* CONFIG_MMC_OMAP */
	608
	609	#ifdef CONFIG_MENELAUS
	610
	611	static int n8x0_auto_sleep_regulators(void)
	612	{
	613	u32 val;
	614	int ret;
	615
	616	val = EN_VPLL_SLEEP \| EN_VMMC_SLEEP \
	617	\| EN_VAUX_SLEEP \| EN_VIO_SLEEP \
	618	\| EN_VMEM_SLEEP \| EN_DC3_SLEEP \
	619	\| EN_VC_SLEEP \| EN_DC2_SLEEP;
	620
	621	ret = menelaus_set_regulator_sleep(1, val);
	622	if (ret < 0) {
7852ec05 PW	623	pr_err("Could not set regulators to sleep on menelaus: %u\n",
7852ec05 PW	624	ret);
9418c65f TL	625	return ret;
	626	}
	627	return 0;
	628	}
	629
	630	static int n8x0_auto_voltage_scale(void)
	631	{
	632	int ret;
	633
	634	ret = menelaus_set_vcore_hw(1400, 1050);
	635	if (ret < 0) {
7852ec05	636	pr_err("Could not set VCORE voltage on menelaus: %u\n", ret);
9418c65f TL	637	return ret;
	638	}
	639	return 0;
	640	}
	641
	642	static int n8x0_menelaus_late_init(struct device *dev)
	643	{
	644	int ret;
	645
	646	ret = n8x0_auto_voltage_scale();
	647	if (ret < 0)
	648	return ret;
	649	ret = n8x0_auto_sleep_regulators();
	650	if (ret < 0)
	651	return ret;
	652	return 0;
	653	}
	654
a7f97d25 JN	655	#else
	656	static int n8x0_menelaus_late_init(struct device *dev)
	657	{
	658	return 0;
	659	}
	660	#endif
	661
	662	static struct menelaus_platform_data n8x0_menelaus_platform_data __initdata = {
	663	.late_init = n8x0_menelaus_late_init,
	664	};
	665
	666	static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] __initdata = {
9418c65f TL	667	{
9418c65f TL	668	I2C_BOARD_INFO("menelaus", 0x72),
7d7e1eba	669	.irq = 7 + OMAP_INTC_START,
a7f97d25	670	.platform_data = &n8x0_menelaus_platform_data,
9418c65f TL	671	},
	672	};
	673
366498d4 JN	674	static struct aic3x_pdata n810_aic33_data __initdata = {
366498d4 JN	675	.gpio_reset = 118,
9418c65f TL	676	};
9418c65f TL	677
366498d4 JN	678	static struct i2c_board_info n810_i2c_board_info_2[] __initdata = {
	679	{
	680	I2C_BOARD_INFO("tlv320aic3x", 0x18),
	681	.platform_data = &n810_aic33_data,
	682	},
	683	};
9418c65f	684
bd8f0fc9 TL	685	#ifdef CONFIG_OMAP_MUX
bd8f0fc9 TL	686	static struct omap_board_mux board_mux[] __initdata = {
04be1e9b JN	687	/* I2S codec port pins for McBSP block */
	688	OMAP2420_MUX(EAC_AC_SCLK, OMAP_MUX_MODE1 \| OMAP_PIN_INPUT),
	689	OMAP2420_MUX(EAC_AC_FS, OMAP_MUX_MODE1 \| OMAP_PIN_INPUT),
	690	OMAP2420_MUX(EAC_AC_DIN, OMAP_MUX_MODE1 \| OMAP_PIN_INPUT),
	691	OMAP2420_MUX(EAC_AC_DOUT, OMAP_MUX_MODE1 \| OMAP_PIN_OUTPUT),
bd8f0fc9 TL	692	{ .reg_offset = OMAP_MUX_TERMINATOR },
bd8f0fc9 TL	693	};
0b50c691 TL	694
	695	static struct omap_device_pad serial2_pads[] __initdata = {
	696	{
	697	.name = "uart3_rx_irrx.uart3_rx_irrx",
	698	.flags = OMAP_DEVICE_PAD_REMUX \| OMAP_DEVICE_PAD_WAKEUP,
	699	.enable = OMAP_MUX_MODE0,
	700	.idle = OMAP_MUX_MODE3 /* Mux as GPIO for idle */
	701	},
	702	};
	703
	704	static inline void board_serial_init(void)
	705	{
	706	struct omap_board_data bdata;
	707
	708	bdata.flags = 0;
	709	bdata.pads = NULL;
	710	bdata.pads_cnt = 0;
	711
	712	bdata.id = 0;
c86845db	713	omap_serial_init_port(&bdata, NULL);
0b50c691 TL	714
0b50c691 TL	715	bdata.id = 1;
c86845db	716	omap_serial_init_port(&bdata, NULL);
0b50c691 TL	717
	718	bdata.id = 2;
	719	bdata.pads = serial2_pads;
	720	bdata.pads_cnt = ARRAY_SIZE(serial2_pads);
c86845db	721	omap_serial_init_port(&bdata, NULL);
0b50c691 TL	722	}
	723
	724	#else
	725
	726	static inline void board_serial_init(void)
	727	{
	728	omap_serial_init();
	729	}
	730
bd8f0fc9 TL	731	#endif
bd8f0fc9 TL	732
63138812 KV	733	static void __init n8x0_init_machine(void)
63138812 KV	734	{
c8f27e97	735	board_check_revision();
bd8f0fc9	736	omap2420_mux_init(board_mux, OMAP_PACKAGE_ZAC);
63138812 KV	737	/* FIXME: add n810 spi devices */
	738	spi_register_board_info(n800_spi_board_info,
	739	ARRAY_SIZE(n800_spi_board_info));
a7f97d25 JN	740	omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
a7f97d25 JN	741	ARRAY_SIZE(n8x0_i2c_board_info_1));
366498d4	742	omap_register_i2c_bus(2, 400, NULL, 0);
c8f27e97	743	if (board_is_n810())
366498d4 JN	744	i2c_register_board_info(2, n810_i2c_board_info_2,
366498d4 JN	745	ARRAY_SIZE(n810_i2c_board_info_2));
0b50c691	746	board_serial_init();
a4ca9dbe	747	omap_sdrc_init(NULL, NULL);
a1a92e6f	748	gpmc_onenand_init(board_onenand_data);
9418c65f	749	n8x0_mmc_init();
97b9ad16	750	n8x0_usb_init();
0857ba3c	751	n8x0_cbus_init();
63138812 KV	752	}
	753
	754	MACHINE_START(NOKIA_N800, "Nokia N800")
5e52b435	755	.atag_offset = 0x100,
71ee7dad	756	.reserve = omap_reserve,
e990a406	757	.map_io = omap242x_map_io,
8f5b5a41	758	.init_early = omap2420_init_early,
741e3a89	759	.init_irq = omap2_init_irq,
6b2f55d7	760	.handle_irq = omap2_intc_handle_irq,
63138812	761	.init_machine = n8x0_init_machine,
bbd707ac	762	.init_late = omap2420_init_late,
6bb27d73	763	.init_time = omap2_sync32k_timer_init,
187e3e06	764	.restart = omap2xxx_restart,
63138812 KV	765	MACHINE_END
	766
	767	MACHINE_START(NOKIA_N810, "Nokia N810")
5e52b435	768	.atag_offset = 0x100,
71ee7dad	769	.reserve = omap_reserve,
e990a406	770	.map_io = omap242x_map_io,
8f5b5a41	771	.init_early = omap2420_init_early,
741e3a89	772	.init_irq = omap2_init_irq,
6b2f55d7	773	.handle_irq = omap2_intc_handle_irq,
63138812	774	.init_machine = n8x0_init_machine,
bbd707ac	775	.init_late = omap2420_init_late,
6bb27d73	776	.init_time = omap2_sync32k_timer_init,
187e3e06	777	.restart = omap2xxx_restart,
63138812 KV	778	MACHINE_END
	779
	780	MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
5e52b435	781	.atag_offset = 0x100,
71ee7dad	782	.reserve = omap_reserve,
e990a406	783	.map_io = omap242x_map_io,
8f5b5a41	784	.init_early = omap2420_init_early,
741e3a89	785	.init_irq = omap2_init_irq,
6b2f55d7	786	.handle_irq = omap2_intc_handle_irq,
63138812	787	.init_machine = n8x0_init_machine,
bbd707ac	788	.init_late = omap2420_init_late,
6bb27d73	789	.init_time = omap2_sync32k_timer_init,
187e3e06	790	.restart = omap2xxx_restart,
63138812	791	MACHINE_END