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[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
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ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
5e763d29 26#include <linux/mmc/host.h>
10299e2e 27#include <linux/power/isp1704_charger.h>
2203747c
AB		 28#include <linux/platform_data/spi-omap2-mcspi.h>
29#include <linux/platform_data/mtd-onenand-omap2.h>
30
9f97da78 31#include <asm/system_info.h>
ffe7f95b 32
4e65331c 33#include "common.h"
45c3eb7d 34#include <linux/omap-dma.h>
60628152 35#include "gpmc-smc91x.h"
ffe7f95b 36
0a6f98c9 37#include "board-rx51.h"
04aeae77 38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN		 41#include <media/radio-si4713.h>
42#include <media/si4713.h>
df4094d2 43#include <linux/platform_data/leds-lp55xx.h>
87581fd4 44
9c2251dd 45#include <linux/platform_data/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
322c183c
TK		 48#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
49#include <media/ir-rx51.h>
50#endif
51
4896e394 52#include "mux.h"
1d5aef49 53#include "omap-pm.h"
d02a900b 54#include "hsmmc.h"
fbd8071c 55#include "common-board-devices.h"
99f0b8d6 56#include "gpmc.h"
b6ab13e7 57#include "gpmc-onenand.h"
ffe7f95b 58
f52eeee8
AH		 59#define SYSTEM_REV_B_USES_VAUX3 0x1699
60#define SYSTEM_REV_S_USES_VAUX3 0x8
61
a24e61a9
KV		 62#define RX51_WL1251_POWER_GPIO 87
63#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 64#define RX51_FMTX_RESET_GPIO 163
65#define RX51_FMTX_IRQ 53
eeada9e8 66#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 67
10299e2e
KJ		 68#define RX51_USB_TRANSCEIVER_RST_GPIO 67
69
3dad5356
AK		 70#define RX51_TSC2005_RESET_GPIO 104
71#define RX51_TSC2005_IRQ_GPIO 100
72
3b511201
AP		 73#define LIS302_IRQ1_GPIO 181
74#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
75
e65f131a 76/* List all SPI devices here. Note that the list/probe order seems to matter! */
a24e61a9
KV		 77enum {
78 RX51_SPI_WL1251,
6996e7ff 79 RX51_SPI_TSC2005, /* Touch Controller */
e65f131a 80 RX51_SPI_MIPID, /* LCD panel */
a24e61a9
KV		 81};
82
83static struct wl12xx_platform_data wl1251_pdata;
3dad5356 84static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 85
3b511201
AP		 86#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
87static int lis302_setup(void)
88{
89 int err;
90 int irq1 = LIS302_IRQ1_GPIO;
91 int irq2 = LIS302_IRQ2_GPIO;
92
93 /* gpio for interrupt pin 1 */
94 err = gpio_request(irq1, "lis3lv02dl_irq1");
95 if (err) {
96 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
97 goto out;
98 }
99
100 /* gpio for interrupt pin 2 */
101 err = gpio_request(irq2, "lis3lv02dl_irq2");
102 if (err) {
103 gpio_free(irq1);
104 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
105 goto out;
106 }
107
108 gpio_direction_input(irq1);
109 gpio_direction_input(irq2);
110
111out:
112 return err;
113}
114
115static int lis302_release(void)
116{
117 gpio_free(LIS302_IRQ1_GPIO);
118 gpio_free(LIS302_IRQ2_GPIO);
119
120 return 0;
121}
122
123static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
124 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
125 LIS3_CLICK_SINGLE_Z,
126 /* Limits are 0.5g * value */
127 .click_thresh_x = 8,
128 .click_thresh_y = 8,
129 .click_thresh_z = 10,
130 /* Click must be longer than time limit */
131 .click_time_limit = 9,
132 /* Kind of debounce filter */
133 .click_latency = 50,
134
135 /* Limits for all axis. millig-value / 18 to get HW values */
136 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
137 .wakeup_thresh = 800 / 18,
138 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
139 .wakeup_thresh2 = 900 / 18,
140
141 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
142
143 /* Interrupt line 2 for click detection, line 1 for thresholds */
144 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
145
146 .axis_x = LIS3_DEV_X,
147 .axis_y = LIS3_INV_DEV_Y,
148 .axis_z = LIS3_INV_DEV_Z,
149 .setup_resources = lis302_setup,
150 .release_resources = lis302_release,
151 .st_min_limits = {-32, 3, 3},
152 .st_max_limits = {-3, 32, 32},
3b511201
AP		 153};
154#endif
155
70b5d737
MN		 156#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
157static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
158 .cover_comp_gain = 16,
159};
160#endif
161
eeada9e8 162#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 163static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 164 {
1e7bf5e3 165 .name = "lp5523:kb1",
eeada9e8
AP		 166 .chan_nr = 0,
167 .led_current = 50,
168 }, {
1e7bf5e3 169 .name = "lp5523:kb2",
eeada9e8
AP		 170 .chan_nr = 1,
171 .led_current = 50,
172 }, {
1e7bf5e3 173 .name = "lp5523:kb3",
eeada9e8
AP		 174 .chan_nr = 2,
175 .led_current = 50,
176 }, {
1e7bf5e3 177 .name = "lp5523:kb4",
eeada9e8
AP		 178 .chan_nr = 3,
179 .led_current = 50,
180 }, {
1e7bf5e3 181 .name = "lp5523:b",
eeada9e8
AP		 182 .chan_nr = 4,
183 .led_current = 50,
184 }, {
1e7bf5e3 185 .name = "lp5523:g",
eeada9e8
AP		 186 .chan_nr = 5,
187 .led_current = 50,
188 }, {
1e7bf5e3 189 .name = "lp5523:r",
eeada9e8
AP		 190 .chan_nr = 6,
191 .led_current = 50,
192 }, {
1e7bf5e3 193 .name = "lp5523:kb5",
eeada9e8
AP		 194 .chan_nr = 7,
195 .led_current = 50,
196 }, {
1e7bf5e3 197 .name = "lp5523:kb6",
eeada9e8
AP		 198 .chan_nr = 8,
199 .led_current = 50,
200 }
201};
202
203static int rx51_lp5523_setup(void)
204{
205 return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT,
206 "lp5523_enable");
207}
208
209static void rx51_lp5523_release(void)
210{
211 gpio_free(RX51_LP5523_CHIP_EN_GPIO);
212}
213
214static void rx51_lp5523_enable(bool state)
215{
216 gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state);
217}
218
df4094d2 219static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP		 220 .led_config = rx51_lp5523_led_config,
221 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 222 .clock_mode = LP55XX_CLOCK_AUTO,
eeada9e8
AP		 223 .setup_resources = rx51_lp5523_setup,
224 .release_resources = rx51_lp5523_release,
225 .enable = rx51_lp5523_enable,
226};
227#endif
228
a24e61a9
KV		 229static struct omap2_mcspi_device_config wl1251_mcspi_config = {
230 .turbo_mode = 0,
a24e61a9
KV		 231};
232
03e11104
RQ		 233static struct omap2_mcspi_device_config mipid_mcspi_config = {
234 .turbo_mode = 0,
03e11104
RQ		 235};
236
6996e7ff
RQ		 237static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
238 .turbo_mode = 0,
6996e7ff
RQ		 239};
240
a24e61a9
KV		 241static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
242 [RX51_SPI_WL1251] = {
243 .modalias = "wl1251",
244 .bus_num = 4,
245 .chip_select = 0,
246 .max_speed_hz = 48000000,
860fc976 247 .mode = SPI_MODE_3,
a24e61a9
KV		 248 .controller_data = &wl1251_mcspi_config,
249 .platform_data = &wl1251_pdata,
250 },
03e11104
RQ		 251 [RX51_SPI_MIPID] = {
252 .modalias = "acx565akm",
253 .bus_num = 1,
254 .chip_select = 2,
255 .max_speed_hz = 6000000,
256 .controller_data = &mipid_mcspi_config,
257 },
6996e7ff
RQ		 258 [RX51_SPI_TSC2005] = {
259 .modalias = "tsc2005",
260 .bus_num = 1,
261 .chip_select = 0,
6996e7ff
RQ		 262 .max_speed_hz = 6000000,
263 .controller_data = &tsc2005_mcspi_config,
3dad5356 264 .platform_data = &tsc2005_pdata,
6996e7ff 265 },
a24e61a9
KV		 266};
267
7605c0b0
PR		 268static struct platform_device rx51_battery_device = {
269 .name = "rx51-battery",
270 .id = -1,
271};
272
10299e2e
KJ		 273static void rx51_charger_set_power(bool on)
274{
275 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
276}
277
278static struct isp1704_charger_data rx51_charger_data = {
279 .set_power = rx51_charger_set_power,
280};
281
fd0964c5 282static struct platform_device rx51_charger_device = {
10299e2e
KJ		 283 .name = "isp1704_charger",
284 .dev = {
285 .platform_data = &rx51_charger_data,
286 },
fd0964c5
HK		 287};
288
10299e2e
KJ		 289static void __init rx51_charger_init(void)
290{
291 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 292 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 293
7605c0b0 294 platform_device_register(&rx51_battery_device);
10299e2e
KJ		 295 platform_device_register(&rx51_charger_device);
296}
297
f014ee32
JN		 298#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
299
300#define RX51_GPIO_CAMERA_LENS_COVER 110
301#define RX51_GPIO_CAMERA_FOCUS 68
302#define RX51_GPIO_CAMERA_CAPTURE 69
303#define RX51_GPIO_KEYPAD_SLIDE 71
304#define RX51_GPIO_LOCK_BUTTON 113
305#define RX51_GPIO_PROXIMITY 89
306
307#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
308
309static struct gpio_keys_button rx51_gpio_keys[] = {
310 {
311 .desc = "Camera Lens Cover",
312 .type = EV_SW,
313 .code = SW_CAMERA_LENS_COVER,
314 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
315 .active_low = 1,
316 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
317 }, {
318 .desc = "Camera Focus",
319 .type = EV_KEY,
320 .code = KEY_CAMERA_FOCUS,
321 .gpio = RX51_GPIO_CAMERA_FOCUS,
322 .active_low = 1,
323 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
324 }, {
325 .desc = "Camera Capture",
326 .type = EV_KEY,
327 .code = KEY_CAMERA,
328 .gpio = RX51_GPIO_CAMERA_CAPTURE,
329 .active_low = 1,
330 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
331 }, {
332 .desc = "Lock Button",
333 .type = EV_KEY,
334 .code = KEY_SCREENLOCK,
335 .gpio = RX51_GPIO_LOCK_BUTTON,
336 .active_low = 1,
337 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
338 }, {
339 .desc = "Keypad Slide",
340 .type = EV_SW,
341 .code = SW_KEYPAD_SLIDE,
342 .gpio = RX51_GPIO_KEYPAD_SLIDE,
343 .active_low = 1,
344 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
345 }, {
346 .desc = "Proximity Sensor",
347 .type = EV_SW,
348 .code = SW_FRONT_PROXIMITY,
349 .gpio = RX51_GPIO_PROXIMITY,
350 .active_low = 0,
351 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
352 }
353};
354
355static struct gpio_keys_platform_data rx51_gpio_keys_data = {
356 .buttons = rx51_gpio_keys,
357 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
358};
359
360static struct platform_device rx51_gpio_keys_device = {
361 .name = "gpio-keys",
362 .id = -1,
363 .dev = {
364 .platform_data = &rx51_gpio_keys_data,
365 },
366};
367
368static void __init rx51_add_gpio_keys(void)
369{
370 platform_device_register(&rx51_gpio_keys_device);
371}
372#else
373static void __init rx51_add_gpio_keys(void)
374{
375}
376#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
377
bead4375 378static uint32_t board_keymap[] = {
3fea6026
DT		 379 /*
380 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
381 * connected to the ground" matrix state.
382 */
ffe7f95b 383 KEY(0, 0, KEY_Q),
acf442dc
AK		 384 KEY(0, 1, KEY_O),
385 KEY(0, 2, KEY_P),
386 KEY(0, 3, KEY_COMMA),
387 KEY(0, 4, KEY_BACKSPACE),
388 KEY(0, 6, KEY_A),
389 KEY(0, 7, KEY_S),
3fea6026 390
acf442dc 391 KEY(1, 0, KEY_W),
ffe7f95b 392 KEY(1, 1, KEY_D),
acf442dc
AK		 393 KEY(1, 2, KEY_F),
394 KEY(1, 3, KEY_G),
395 KEY(1, 4, KEY_H),
396 KEY(1, 5, KEY_J),
397 KEY(1, 6, KEY_K),
398 KEY(1, 7, KEY_L),
3fea6026 399
acf442dc
AK		 400 KEY(2, 0, KEY_E),
401 KEY(2, 1, KEY_DOT),
ffe7f95b 402 KEY(2, 2, KEY_UP),
acf442dc
AK		 403 KEY(2, 3, KEY_ENTER),
404 KEY(2, 5, KEY_Z),
405 KEY(2, 6, KEY_X),
406 KEY(2, 7, KEY_C),
3fea6026
DT		 407 KEY(2, 8, KEY_F9),
408
acf442dc
AK		 409 KEY(3, 0, KEY_R),
410 KEY(3, 1, KEY_V),
411 KEY(3, 2, KEY_B),
ffe7f95b 412 KEY(3, 3, KEY_N),
acf442dc
AK		 413 KEY(3, 4, KEY_M),
414 KEY(3, 5, KEY_SPACE),
415 KEY(3, 6, KEY_SPACE),
416 KEY(3, 7, KEY_LEFT),
3fea6026 417
acf442dc
AK		 418 KEY(4, 0, KEY_T),
419 KEY(4, 1, KEY_DOWN),
420 KEY(4, 2, KEY_RIGHT),
ffe7f95b 421 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 422 KEY(4, 5, KEY_RIGHTALT),
423 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 424 KEY(4, 8, KEY_F10),
3fea6026 425
acf442dc 426 KEY(5, 0, KEY_Y),
2e65a207 427 KEY(5, 8, KEY_F11),
3fea6026 428
acf442dc 429 KEY(6, 0, KEY_U),
3fea6026 430
acf442dc
AK		 431 KEY(7, 0, KEY_I),
432 KEY(7, 1, KEY_F7),
433 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 434};
435
4f543332
TL		 436static struct matrix_keymap_data board_map_data = {
437 .keymap = board_keymap,
438 .keymap_size = ARRAY_SIZE(board_keymap),
439};
440
ffe7f95b 441static struct twl4030_keypad_data rx51_kp_data = {
4f543332 442 .keymap_data = &board_map_data,
ffe7f95b
LL		 443 .rows = 8,
444 .cols = 8,
ffe7f95b
LL		 445 .rep = 1,
446};
447
ce6f0016
AH		 448/* Enable input logic and pull all lines up when eMMC is on. */
449static struct omap_board_mux rx51_mmc2_on_mux[] = {
450 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
451 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
452 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
453 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
454 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
455 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
456 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
457 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
458 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
459 { .reg_offset = OMAP_MUX_TERMINATOR },
460};
461
462/* Disable input logic and pull all lines down when eMMC is off. */
463static struct omap_board_mux rx51_mmc2_off_mux[] = {
464 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
465 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
466 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
467 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
468 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
469 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
471 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
472 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
473 { .reg_offset = OMAP_MUX_TERMINATOR },
474};
475
112485e9
BC		 476static struct omap_mux_partition *partition;
477
ce6f0016
AH		 478/*
479 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
480 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
481 */
482static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
483{
484 if (power_on)
112485e9 485 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 486 else
112485e9 487 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 488}
489
68ff0423 490static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 491 {
492 .name = "external",
493 .mmc = 1,
3a63833e 494 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 495 .cover_only = true,
496 .gpio_cd = 160,
497 .gpio_wp = -EINVAL,
5e763d29 498 .power_saving = true,
ffe7f95b
LL		 499 },
500 {
501 .name = "internal",
502 .mmc = 2,
3a63833e
SG		 503 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
504 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 505 .gpio_cd = -EINVAL,
506 .gpio_wp = -EINVAL,
5e763d29
AH		 507 .nonremovable = true,
508 .power_saving = true,
ce6f0016 509 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 510 },
511 {} /* Terminator */
512};
513
786b01a8
OD		 514static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
515 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
516};
ffe7f95b 517
664a41b8
LT		 518static struct regulator_consumer_supply rx51_vaux2_supply[] = {
519 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
520};
75ccf268 521
786b01a8
OD		 522static struct regulator_consumer_supply rx51_vaux3_supply[] = {
523 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
524};
ffe7f95b 525
786b01a8
OD		 526static struct regulator_consumer_supply rx51_vsim_supply[] = {
527 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
528};
ffe7f95b 529
4cfcaef1
JN		 530static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
531 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 532 REGULATOR_SUPPLY("AVDD", "2-0018"),
533 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 534 REGULATOR_SUPPLY("AVDD", "2-0019"),
535 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 536 /* tpa6130a2 */
537 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 538 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 539 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 540};
541
542static struct regulator_consumer_supply rx51_vio_supplies[] = {
543 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 544 REGULATOR_SUPPLY("IOVDD", "2-0018"),
545 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 546 REGULATOR_SUPPLY("IOVDD", "2-0019"),
547 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 548 /* Si4713 IO supply */
549 REGULATOR_SUPPLY("vio", "2-0063"),
17fd8cdb
AK		 550 /* lis3lv02d */
551 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
4cfcaef1
JN		 552};
553
0581b52e 554static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 555 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
3d85f548 556 REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
589541c0
JN		 557 /* Si4713 supply */
558 REGULATOR_SUPPLY("vdd", "2-0063"),
17fd8cdb
AK		 559 /* lis3lv02d */
560 REGULATOR_SUPPLY("Vdd", "3-001d"),
0581b52e
RQ		 561};
562
ffe7f95b
LL		 563static struct regulator_init_data rx51_vaux1 = {
564 .constraints = {
565 .name = "V28",
566 .min_uV = 2800000,
567 .max_uV = 2800000,
000d534e 568 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 569 .valid_modes_mask = REGULATOR_MODE_NORMAL
570 | REGULATOR_MODE_STANDBY,
571 .valid_ops_mask = REGULATOR_CHANGE_MODE
572 | REGULATOR_CHANGE_STATUS,
573 },
0581b52e
RQ		 574 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
575 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 576};
577
578static struct regulator_init_data rx51_vaux2 = {
579 .constraints = {
580 .name = "VCSI",
581 .min_uV = 1800000,
582 .max_uV = 1800000,
583 .valid_modes_mask = REGULATOR_MODE_NORMAL
584 | REGULATOR_MODE_STANDBY,
585 .valid_ops_mask = REGULATOR_CHANGE_MODE
586 | REGULATOR_CHANGE_STATUS,
587 },
664a41b8
LT		 588 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
589 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 590};
591
592/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 593static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 594 .constraints = {
595 .name = "VCAM_DIG_18",
596 .min_uV = 1800000,
597 .max_uV = 1800000,
598 .apply_uV = true,
599 .valid_modes_mask = REGULATOR_MODE_NORMAL
600 | REGULATOR_MODE_STANDBY,
601 .valid_ops_mask = REGULATOR_CHANGE_MODE
602 | REGULATOR_CHANGE_STATUS,
603 },
604};
605
f52eeee8
AH		 606static struct regulator_init_data rx51_vaux3_mmc = {
607 .constraints = {
608 .name = "VMMC2_30",
609 .min_uV = 2800000,
610 .max_uV = 3000000,
611 .apply_uV = true,
612 .valid_modes_mask = REGULATOR_MODE_NORMAL
613 | REGULATOR_MODE_STANDBY,
614 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
615 | REGULATOR_CHANGE_MODE
616 | REGULATOR_CHANGE_STATUS,
617 },
786b01a8
OD		 618 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
619 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 620};
621
ffe7f95b
LL		 622static struct regulator_init_data rx51_vaux4 = {
623 .constraints = {
624 .name = "VCAM_ANA_28",
625 .min_uV = 2800000,
626 .max_uV = 2800000,
627 .apply_uV = true,
628 .valid_modes_mask = REGULATOR_MODE_NORMAL
629 | REGULATOR_MODE_STANDBY,
630 .valid_ops_mask = REGULATOR_CHANGE_MODE
631 | REGULATOR_CHANGE_STATUS,
632 },
633};
634
635static struct regulator_init_data rx51_vmmc1 = {
636 .constraints = {
637 .min_uV = 1850000,
638 .max_uV = 3150000,
639 .valid_modes_mask = REGULATOR_MODE_NORMAL
640 | REGULATOR_MODE_STANDBY,
641 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
642 | REGULATOR_CHANGE_MODE
643 | REGULATOR_CHANGE_STATUS,
644 },
786b01a8
OD		 645 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
646 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 647};
648
649static struct regulator_init_data rx51_vmmc2 = {
650 .constraints = {
f2add1de
JN		 651 .name = "V28_A",
652 .min_uV = 2800000,
653 .max_uV = 3000000,
2827411e 654 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 655 .apply_uV = true,
656 .valid_modes_mask = REGULATOR_MODE_NORMAL
657 | REGULATOR_MODE_STANDBY,
658 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
659 | REGULATOR_CHANGE_MODE
660 | REGULATOR_CHANGE_STATUS,
661 },
4cfcaef1
JN		 662 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
663 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 664};
665
094fc559
KJ		 666static struct regulator_init_data rx51_vpll1 = {
667 .constraints = {
668 .name = "VPLL",
669 .min_uV = 1800000,
670 .max_uV = 1800000,
671 .apply_uV = true,
672 .always_on = true,
673 .valid_modes_mask = REGULATOR_MODE_NORMAL
674 | REGULATOR_MODE_STANDBY,
675 .valid_ops_mask = REGULATOR_CHANGE_MODE,
676 },
677};
678
679static struct regulator_init_data rx51_vpll2 = {
680 .constraints = {
681 .name = "VSDI_CSI",
682 .min_uV = 1800000,
683 .max_uV = 1800000,
684 .apply_uV = true,
685 .always_on = true,
686 .valid_modes_mask = REGULATOR_MODE_NORMAL
687 | REGULATOR_MODE_STANDBY,
688 .valid_ops_mask = REGULATOR_CHANGE_MODE,
689 },
690};
691
ffe7f95b
LL		 692static struct regulator_init_data rx51_vsim = {
693 .constraints = {
694 .name = "VMMC2_IO_18",
695 .min_uV = 1800000,
696 .max_uV = 1800000,
697 .apply_uV = true,
698 .valid_modes_mask = REGULATOR_MODE_NORMAL
699 | REGULATOR_MODE_STANDBY,
700 .valid_ops_mask = REGULATOR_CHANGE_MODE
701 | REGULATOR_CHANGE_STATUS,
702 },
786b01a8
OD		 703 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
704 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 705};
706
4cfcaef1
JN		 707static struct regulator_init_data rx51_vio = {
708 .constraints = {
709 .min_uV = 1800000,
710 .max_uV = 1800000,
711 .valid_modes_mask = REGULATOR_MODE_NORMAL
712 | REGULATOR_MODE_STANDBY,
713 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
714 | REGULATOR_CHANGE_MODE
715 | REGULATOR_CHANGE_STATUS,
716 },
717 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
718 .consumer_supplies = rx51_vio_supplies,
719};
720
094fc559
KJ		 721static struct regulator_init_data rx51_vintana1 = {
722 .constraints = {
723 .name = "VINTANA1",
724 .min_uV = 1500000,
725 .max_uV = 1500000,
726 .always_on = true,
727 .valid_modes_mask = REGULATOR_MODE_NORMAL
728 | REGULATOR_MODE_STANDBY,
729 .valid_ops_mask = REGULATOR_CHANGE_MODE,
730 },
731};
732
733static struct regulator_init_data rx51_vintana2 = {
734 .constraints = {
735 .name = "VINTANA2",
736 .min_uV = 2750000,
737 .max_uV = 2750000,
738 .apply_uV = true,
739 .always_on = true,
740 .valid_modes_mask = REGULATOR_MODE_NORMAL
741 | REGULATOR_MODE_STANDBY,
742 .valid_ops_mask = REGULATOR_CHANGE_MODE,
743 },
744};
745
746static struct regulator_init_data rx51_vintdig = {
747 .constraints = {
748 .name = "VINTDIG",
749 .min_uV = 1500000,
750 .max_uV = 1500000,
751 .always_on = true,
752 .valid_modes_mask = REGULATOR_MODE_NORMAL
753 | REGULATOR_MODE_STANDBY,
754 .valid_ops_mask = REGULATOR_CHANGE_MODE,
755 },
756};
757
589541c0
JN		 758static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
759 .gpio_reset = RX51_FMTX_RESET_GPIO,
760};
761
762static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
763 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
764 .platform_data = &rx51_si4713_i2c_data,
765};
766
767static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
768 .i2c_bus = 2,
769 .subdev_board_info = &rx51_si4713_board_info,
770};
771
12aee6c6 772static struct platform_device rx51_si4713_dev __initdata_or_module = {
589541c0
JN		 773 .name = "radio-si4713",
774 .id = -1,
775 .dev = {
776 .platform_data = &rx51_si4713_data,
777 },
778};
779
780static __init void rx51_init_si4713(void)
781{
782 int err;
783
784 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
785 if (err) {
786 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
787 return;
788 }
789 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
790 platform_device_register(&rx51_si4713_dev);
791}
792
ffe7f95b
LL		 793static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
794{
795 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 796 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 797 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 798
ffe7f95b
LL		 799 return 0;
800}
801
802static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL		 803 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
804 | BIT(4) | BIT(5)
805 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
806 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
807 | BIT(16) | BIT(17) ,
808 .setup = rx51_twlgpio_setup,
809};
810
9312fffb
AK		 811static struct twl4030_ins sleep_on_seq[] __initdata = {
812/*
3c684e84 813 * Turn off everything
9312fffb 814 */
3c684e84 815 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 816};
817
818static struct twl4030_script sleep_on_script __initdata = {
819 .script = sleep_on_seq,
820 .size = ARRAY_SIZE(sleep_on_seq),
821 .flags = TWL4030_SLEEP_SCRIPT,
822};
823
824static struct twl4030_ins wakeup_seq[] __initdata = {
825/*
3c684e84 826 * Reenable everything
9312fffb 827 */
3c684e84 828 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 829};
830
831static struct twl4030_script wakeup_script __initdata = {
832 .script = wakeup_seq,
833 .size = ARRAY_SIZE(wakeup_seq),
834 .flags = TWL4030_WAKEUP12_SCRIPT,
835};
836
837static struct twl4030_ins wakeup_p3_seq[] __initdata = {
838/*
3c684e84 839 * Reenable everything
9312fffb 840 */
3c684e84 841 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 842};
843
844static struct twl4030_script wakeup_p3_script __initdata = {
845 .script = wakeup_p3_seq,
846 .size = ARRAY_SIZE(wakeup_p3_seq),
847 .flags = TWL4030_WAKEUP3_SCRIPT,
848};
849
850static struct twl4030_ins wrst_seq[] __initdata = {
851/*
852 * Reset twl4030.
853 * Reset VDD1 regulator.
854 * Reset VDD2 regulator.
855 * Reset VPLL1 regulator.
856 * Enable sysclk output.
857 * Reenable twl4030.
858 */
859 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
860 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
861 0x13},
9312fffb
AK		 862 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
863 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
864 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
865 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 866 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 867 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
868};
869
870static struct twl4030_script wrst_script __initdata = {
871 .script = wrst_seq,
872 .size = ARRAY_SIZE(wrst_seq),
873 .flags = TWL4030_WRST_SCRIPT,
874};
875
876static struct twl4030_script *twl4030_scripts[] __initdata = {
877 /* wakeup12 script should be loaded before sleep script, otherwise a
878 board might hit retention before loading of wakeup script is
879 completed. This can cause boot failures depending on timing issues.
880 */
881 &wakeup_script,
882 &sleep_on_script,
883 &wakeup_p3_script,
884 &wrst_script,
885};
886
887static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 888 { .resource = RES_VDD1, .devgroup = -1,
889 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
890 .remap_sleep = RES_STATE_OFF
891 },
892 { .resource = RES_VDD2, .devgroup = -1,
893 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
894 .remap_sleep = RES_STATE_OFF
895 },
896 { .resource = RES_VPLL1, .devgroup = -1,
897 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
898 .remap_sleep = RES_STATE_OFF
899 },
900 { .resource = RES_VPLL2, .devgroup = -1,
901 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
902 },
903 { .resource = RES_VAUX1, .devgroup = -1,
904 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
905 },
906 { .resource = RES_VAUX2, .devgroup = -1,
907 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
908 },
909 { .resource = RES_VAUX3, .devgroup = -1,
910 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
911 },
912 { .resource = RES_VAUX4, .devgroup = -1,
913 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
914 },
915 { .resource = RES_VMMC1, .devgroup = -1,
916 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
917 },
918 { .resource = RES_VMMC2, .devgroup = -1,
919 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
920 },
921 { .resource = RES_VDAC, .devgroup = -1,
922 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
923 },
924 { .resource = RES_VSIM, .devgroup = -1,
925 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
926 },
927 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
928 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
929 },
930 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
931 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
932 },
933 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
934 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
935 },
936 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
937 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
938 },
939 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
940 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
941 },
942 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
943 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
944 },
945 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
946 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
947 },
948 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
949 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
950 },
951 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
952 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
953 },
954 { .resource = RES_32KCLKOUT, .devgroup = -1,
955 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
956 },
957 { .resource = RES_RESET, .devgroup = -1,
958 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
959 },
d7ac829f 960 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 961 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
962 },
9312fffb
AK		 963 { 0, 0},
964};
965
966static struct twl4030_power_data rx51_t2scripts_data __initdata = {
967 .scripts = twl4030_scripts,
968 .num = ARRAY_SIZE(twl4030_scripts),
969 .resource_config = twl4030_rconfig,
970};
971
8c3d4534 972static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 973 .coexist = 0,
974};
975
8c3d4534 976static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 977 .audio_mclk = 26000000,
978 .vibra = &rx51_vibra_data,
979};
9312fffb 980
9312fffb 981static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 982 /* platform_data for children goes here */
983 .gpio = &rx51_gpio_data,
984 .keypad = &rx51_kp_data,
9312fffb 985 .power = &rx51_t2scripts_data,
4ae6df5e 986 .audio = &rx51_audio_data,
ffe7f95b
LL		 987
988 .vaux1 = &rx51_vaux1,
989 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 990 .vaux4 = &rx51_vaux4,
991 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 992 .vpll1 = &rx51_vpll1,
993 .vpll2 = &rx51_vpll2,
ffe7f95b 994 .vsim = &rx51_vsim,
094fc559
KJ		 995 .vintana1 = &rx51_vintana1,
996 .vintana2 = &rx51_vintana2,
997 .vintdig = &rx51_vintdig,
4cfcaef1 998 .vio = &rx51_vio,
ffe7f95b
LL		 999};
1000
f0c61d3d 1001static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 1002 .power_gpio = 98,
1003};
1004
f0fba2ad
LG		 1005/* Audio setup data */
1006static struct aic3x_setup_data rx51_aic34_setup = {
1007 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
1008 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
1009};
1010
e4862f2f 1011static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 1012 .setup = &rx51_aic34_setup,
1013 .gpio_reset = 60,
1014};
1015
caeeb4aa
JN		 1016static struct aic3x_pdata rx51_aic3x_data2 = {
1017 .gpio_reset = 60,
1018};
1019
dabe929b
JN		 1020static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
1021 {
1022 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1023 .platform_data = &rx51_aic3x_data,
dabe929b 1024 },
caeeb4aa
JN		 1025 {
1026 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1027 .platform_data = &rx51_aic3x_data2,
1028 },
70b5d737
MN		 1029#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1030 {
1031 I2C_BOARD_INFO("tsl2563", 0x29),
1032 .platform_data = &rx51_tsl2563_platform_data,
1033 },
eeada9e8
AP		 1034#endif
1035#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1036 {
1037 I2C_BOARD_INFO("lp5523", 0x32),
1038 .platform_data = &rx51_lp5523_platform_data,
1039 },
70b5d737 1040#endif
d77711aa
PR		 1041 {
1042 I2C_BOARD_INFO("bq27200", 0x55),
1043 },
64d06691
JN		 1044 {
1045 I2C_BOARD_INFO("tpa6130a2", 0x60),
1046 .platform_data = &rx51_tpa6130a2_data,
1047 }
dabe929b
JN		 1048};
1049
3b511201
AP		 1050static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1051#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1052 {
1053 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1054 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1055 },
1056#endif
1057};
1058
ffe7f95b
LL		 1059static int __init rx51_i2c_init(void)
1060{
f52eeee8 1061 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1062 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1063 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1064 /* Only older boards use VMMC2 for internal MMC */
1065 rx51_vmmc2.num_consumer_supplies--;
1066 } else {
f52eeee8 1067 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1068 }
4cfcaef1 1069 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1070 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1071 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1072 TWL_COMMON_REGULATOR_VDAC);
1073
1074 rx51_twldata.vdac->constraints.apply_uV = true;
1075 rx51_twldata.vdac->constraints.name = "VDAC";
1076
7d7e1eba 1077 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN		 1078 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1079 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1080#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1081 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1082 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1083#endif
3b511201
AP		 1084 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1085 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1086 return 0;
1087}
1088
aa62e90f
JY		 1089#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1090 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1091
1092static struct mtd_partition onenand_partitions[] = {
1093 {
1094 .name = "bootloader",
1095 .offset = 0,
1096 .size = 0x20000,
1097 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1098 },
1099 {
1100 .name = "config",
1101 .offset = MTDPART_OFS_APPEND,
1102 .size = 0x60000,
1103 },
1104 {
1105 .name = "log",
1106 .offset = MTDPART_OFS_APPEND,
1107 .size = 0x40000,
1108 },
1109 {
1110 .name = "kernel",
1111 .offset = MTDPART_OFS_APPEND,
1112 .size = 0x200000,
1113 },
1114 {
1115 .name = "initfs",
1116 .offset = MTDPART_OFS_APPEND,
1117 .size = 0x200000,
1118 },
1119 {
1120 .name = "rootfs",
1121 .offset = MTDPART_OFS_APPEND,
1122 .size = MTDPART_SIZ_FULL,
1123 },
1124};
1125
5403187f
AK		 1126static struct omap_onenand_platform_data board_onenand_data[] = {
1127 {
1128 .cs = 0,
1129 .gpio_irq = 65,
1130 .parts = onenand_partitions,
1131 .nr_parts = ARRAY_SIZE(onenand_partitions),
1132 .flags = ONENAND_SYNC_READWRITE,
1133 }
aa62e90f 1134};
aa62e90f 1135#endif
ffe7f95b 1136
1a48e157
TL		 1137#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1138
1139static struct omap_smc91x_platform_data board_smc91x_data = {
1140 .cs = 1,
1141 .gpio_irq = 54,
1142 .gpio_pwrdwn = 86,
1143 .gpio_reset = 164,
1144 .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL,
1145};
1146
1147static void __init board_smc91x_init(void)
1148{
4896e394
TL		 1149 omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN);
1150 omap_mux_init_gpio(86, OMAP_PIN_OUTPUT);
1151 omap_mux_init_gpio(164, OMAP_PIN_OUTPUT);
1a48e157
TL		 1152
1153 gpmc_smc91x_init(&board_smc91x_data);
1154}
1155
1156#else
1157
1158static inline void board_smc91x_init(void)
1159{
1160}
1161
1162#endif
1163
a24e61a9
KV		 1164static void rx51_wl1251_set_power(bool enable)
1165{
1166 gpio_set_value(RX51_WL1251_POWER_GPIO, enable);
1167}
1168
bc593f5d
IG		 1169static struct gpio rx51_wl1251_gpios[] __initdata = {
1170 { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" },
1171 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1172};
1173
a24e61a9
KV		 1174static void __init rx51_init_wl1251(void)
1175{
1176 int irq, ret;
1177
bc593f5d
IG		 1178 ret = gpio_request_array(rx51_wl1251_gpios,
1179 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1180 if (ret < 0)
1181 goto error;
1182
a24e61a9
KV		 1183 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1184 if (irq < 0)
1185 goto err_irq;
1186
1187 wl1251_pdata.set_power = rx51_wl1251_set_power;
1188 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1189
1190 return;
1191
1192err_irq:
1193 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9 1194 gpio_free(RX51_WL1251_POWER_GPIO);
a24e61a9
KV		 1195error:
1196 printk(KERN_ERR "wl1251 board initialisation failed\n");
1197 wl1251_pdata.set_power = NULL;
1198
1199 /*
1200 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1201 * set_power is null, and wl1251_probe() will fail.
1202 */
1203}
1204
3dad5356
AK		 1205static struct tsc2005_platform_data tsc2005_pdata = {
1206 .ts_pressure_max = 2048,
1207 .ts_pressure_fudge = 2,
1208 .ts_x_max = 4096,
1209 .ts_x_fudge = 4,
1210 .ts_y_max = 4096,
1211 .ts_y_fudge = 7,
1212 .ts_x_plate_ohm = 280,
1213 .esd_timeout_ms = 8000,
1214};
1215
d4860ebe
VZ		 1216static struct gpio rx51_tsc2005_gpios[] __initdata = {
1217 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1218 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1219};
1220
3dad5356
AK		 1221static void rx51_tsc2005_set_reset(bool enable)
1222{
1223 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1224}
1225
1226static void __init rx51_init_tsc2005(void)
1227{
1228 int r;
1229
d4860ebe
VZ		 1230 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1231 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1232
d4860ebe
VZ		 1233 r = gpio_request_array(rx51_tsc2005_gpios,
1234 ARRAY_SIZE(rx51_tsc2005_gpios));
1235 if (r < 0) {
1236 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1237 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1238 return;
3dad5356 1239 }
d4860ebe
VZ		 1240
1241 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1242 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1243 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1244}
1245
322c183c
TK		 1246#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1247static struct lirc_rx51_platform_data rx51_lirc_data = {
1248 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1249 .pwm_timer = 9, /* Use GPT 9 for CIR */
1250};
1251
1252static struct platform_device rx51_lirc_device = {
1253 .name = "lirc_rx51",
1254 .id = -1,
1255 .dev = {
1256 .platform_data = &rx51_lirc_data,
1257 },
1258};
1259
1260static void __init rx51_init_lirc(void)
1261{
1262 platform_device_register(&rx51_lirc_device);
1263}
1264#else
1265static void __init rx51_init_lirc(void)
1266{
1267}
1268#endif
1269
749a34b3
PR		 1270static struct platform_device madc_hwmon = {
1271 .name = "twl4030_madc_hwmon",
1272 .id = -1,
1273};
1274
1275static void __init rx51_init_twl4030_hwmon(void)
1276{
1277 platform_device_register(&madc_hwmon);
1278}
1279
ffe7f95b
LL		 1280void __init rx51_peripherals_init(void)
1281{
ffe7f95b 1282 rx51_i2c_init();
094fc559 1283 regulator_has_full_constraints();
5403187f 1284 gpmc_onenand_init(board_onenand_data);
1a48e157 1285 board_smc91x_init();
f014ee32 1286 rx51_add_gpio_keys();
a24e61a9 1287 rx51_init_wl1251();
3dad5356 1288 rx51_init_tsc2005();
589541c0 1289 rx51_init_si4713();
322c183c 1290 rx51_init_lirc();
a24e61a9
KV		 1291 spi_register_board_info(rx51_peripherals_spi_board_info,
1292 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1293
1294 partition = omap_mux_get("core");
1295 if (partition)
3b972bf0 1296 omap_hsmmc_init(mmc);
112485e9 1297
10299e2e 1298 rx51_charger_init();
749a34b3 1299 rx51_init_twl4030_hwmon();
ffe7f95b
LL		 1300}
1301
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