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Commit | Line | Data |
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ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
ffe7f95b | 18 | #include <linux/i2c.h> |
ebeb53e1 | 19 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/regulator/machine.h> | |
23 | #include <linux/gpio.h> | |
f014ee32 | 24 | #include <linux/gpio_keys.h> |
5e763d29 | 25 | #include <linux/mmc/host.h> |
10299e2e | 26 | #include <linux/power/isp1704_charger.h> |
ffe7f95b | 27 | |
ce491cf8 | 28 | #include <plat/mcspi.h> |
ce491cf8 TL |
29 | #include <plat/board.h> |
30 | #include <plat/common.h> | |
31 | #include <plat/dma.h> | |
32 | #include <plat/gpmc.h> | |
ce491cf8 TL |
33 | #include <plat/onenand.h> |
34 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 35 | |
04aeae77 MK |
36 | #include <mach/board-rx51.h> |
37 | ||
87581fd4 | 38 | #include <sound/tlv320aic3x.h> |
64d06691 | 39 | #include <sound/tpa6130a2-plat.h> |
589541c0 JN |
40 | #include <media/radio-si4713.h> |
41 | #include <media/si4713.h> | |
87581fd4 | 42 | |
70b5d737 MN |
43 | #include <../drivers/staging/iio/light/tsl2563.h> |
44 | ||
4896e394 | 45 | #include "mux.h" |
d02a900b | 46 | #include "hsmmc.h" |
fbd8071c | 47 | #include "common-board-devices.h" |
ffe7f95b | 48 | |
f52eeee8 AH |
49 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
50 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
51 | ||
a24e61a9 KV |
52 | #define RX51_WL1251_POWER_GPIO 87 |
53 | #define RX51_WL1251_IRQ_GPIO 42 | |
589541c0 JN |
54 | #define RX51_FMTX_RESET_GPIO 163 |
55 | #define RX51_FMTX_IRQ 53 | |
a24e61a9 | 56 | |
10299e2e KJ |
57 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 |
58 | ||
a24e61a9 KV |
59 | /* list all spi devices here */ |
60 | enum { | |
61 | RX51_SPI_WL1251, | |
03e11104 | 62 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 63 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
64 | }; |
65 | ||
66 | static struct wl12xx_platform_data wl1251_pdata; | |
67 | ||
70b5d737 MN |
68 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
69 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
70 | .cover_comp_gain = 16, | |
71 | }; | |
72 | #endif | |
73 | ||
a24e61a9 KV |
74 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
75 | .turbo_mode = 0, | |
76 | .single_channel = 1, | |
77 | }; | |
78 | ||
03e11104 RQ |
79 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
80 | .turbo_mode = 0, | |
81 | .single_channel = 1, | |
82 | }; | |
83 | ||
6996e7ff RQ |
84 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
85 | .turbo_mode = 0, | |
86 | .single_channel = 1, | |
87 | }; | |
88 | ||
a24e61a9 KV |
89 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
90 | [RX51_SPI_WL1251] = { | |
91 | .modalias = "wl1251", | |
92 | .bus_num = 4, | |
93 | .chip_select = 0, | |
94 | .max_speed_hz = 48000000, | |
860fc976 | 95 | .mode = SPI_MODE_3, |
a24e61a9 KV |
96 | .controller_data = &wl1251_mcspi_config, |
97 | .platform_data = &wl1251_pdata, | |
98 | }, | |
03e11104 RQ |
99 | [RX51_SPI_MIPID] = { |
100 | .modalias = "acx565akm", | |
101 | .bus_num = 1, | |
102 | .chip_select = 2, | |
103 | .max_speed_hz = 6000000, | |
104 | .controller_data = &mipid_mcspi_config, | |
105 | }, | |
6996e7ff RQ |
106 | [RX51_SPI_TSC2005] = { |
107 | .modalias = "tsc2005", | |
108 | .bus_num = 1, | |
109 | .chip_select = 0, | |
110 | /* .irq = OMAP_GPIO_IRQ(RX51_TSC2005_IRQ_GPIO),*/ | |
111 | .max_speed_hz = 6000000, | |
112 | .controller_data = &tsc2005_mcspi_config, | |
113 | /* .platform_data = &tsc2005_config,*/ | |
114 | }, | |
a24e61a9 KV |
115 | }; |
116 | ||
10299e2e KJ |
117 | static void rx51_charger_set_power(bool on) |
118 | { | |
119 | gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on); | |
120 | } | |
121 | ||
122 | static struct isp1704_charger_data rx51_charger_data = { | |
123 | .set_power = rx51_charger_set_power, | |
124 | }; | |
125 | ||
fd0964c5 | 126 | static struct platform_device rx51_charger_device = { |
10299e2e KJ |
127 | .name = "isp1704_charger", |
128 | .dev = { | |
129 | .platform_data = &rx51_charger_data, | |
130 | }, | |
fd0964c5 HK |
131 | }; |
132 | ||
10299e2e KJ |
133 | static void __init rx51_charger_init(void) |
134 | { | |
135 | WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, | |
136 | GPIOF_OUT_INIT_LOW, "isp1704_reset")); | |
137 | ||
138 | platform_device_register(&rx51_charger_device); | |
139 | } | |
140 | ||
f014ee32 JN |
141 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
142 | ||
143 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
144 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
145 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
146 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
147 | #define RX51_GPIO_LOCK_BUTTON 113 | |
148 | #define RX51_GPIO_PROXIMITY 89 | |
149 | ||
150 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
151 | ||
152 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
153 | { | |
154 | .desc = "Camera Lens Cover", | |
155 | .type = EV_SW, | |
156 | .code = SW_CAMERA_LENS_COVER, | |
157 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
158 | .active_low = 1, | |
159 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
160 | }, { | |
161 | .desc = "Camera Focus", | |
162 | .type = EV_KEY, | |
163 | .code = KEY_CAMERA_FOCUS, | |
164 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
165 | .active_low = 1, | |
166 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
167 | }, { | |
168 | .desc = "Camera Capture", | |
169 | .type = EV_KEY, | |
170 | .code = KEY_CAMERA, | |
171 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
172 | .active_low = 1, | |
173 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
174 | }, { | |
175 | .desc = "Lock Button", | |
176 | .type = EV_KEY, | |
177 | .code = KEY_SCREENLOCK, | |
178 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
179 | .active_low = 1, | |
180 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
181 | }, { | |
182 | .desc = "Keypad Slide", | |
183 | .type = EV_SW, | |
184 | .code = SW_KEYPAD_SLIDE, | |
185 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
186 | .active_low = 1, | |
187 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
188 | }, { | |
189 | .desc = "Proximity Sensor", | |
190 | .type = EV_SW, | |
191 | .code = SW_FRONT_PROXIMITY, | |
192 | .gpio = RX51_GPIO_PROXIMITY, | |
193 | .active_low = 0, | |
194 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
195 | } | |
196 | }; | |
197 | ||
198 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
199 | .buttons = rx51_gpio_keys, | |
200 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
201 | }; | |
202 | ||
203 | static struct platform_device rx51_gpio_keys_device = { | |
204 | .name = "gpio-keys", | |
205 | .id = -1, | |
206 | .dev = { | |
207 | .platform_data = &rx51_gpio_keys_data, | |
208 | }, | |
209 | }; | |
210 | ||
211 | static void __init rx51_add_gpio_keys(void) | |
212 | { | |
213 | platform_device_register(&rx51_gpio_keys_device); | |
214 | } | |
215 | #else | |
216 | static void __init rx51_add_gpio_keys(void) | |
217 | { | |
218 | } | |
219 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
220 | ||
bead4375 | 221 | static uint32_t board_keymap[] = { |
3fea6026 DT |
222 | /* |
223 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
224 | * connected to the ground" matrix state. | |
225 | */ | |
ffe7f95b | 226 | KEY(0, 0, KEY_Q), |
acf442dc AK |
227 | KEY(0, 1, KEY_O), |
228 | KEY(0, 2, KEY_P), | |
229 | KEY(0, 3, KEY_COMMA), | |
230 | KEY(0, 4, KEY_BACKSPACE), | |
231 | KEY(0, 6, KEY_A), | |
232 | KEY(0, 7, KEY_S), | |
3fea6026 | 233 | |
acf442dc | 234 | KEY(1, 0, KEY_W), |
ffe7f95b | 235 | KEY(1, 1, KEY_D), |
acf442dc AK |
236 | KEY(1, 2, KEY_F), |
237 | KEY(1, 3, KEY_G), | |
238 | KEY(1, 4, KEY_H), | |
239 | KEY(1, 5, KEY_J), | |
240 | KEY(1, 6, KEY_K), | |
241 | KEY(1, 7, KEY_L), | |
3fea6026 | 242 | |
acf442dc AK |
243 | KEY(2, 0, KEY_E), |
244 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 245 | KEY(2, 2, KEY_UP), |
acf442dc AK |
246 | KEY(2, 3, KEY_ENTER), |
247 | KEY(2, 5, KEY_Z), | |
248 | KEY(2, 6, KEY_X), | |
249 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
250 | KEY(2, 8, KEY_F9), |
251 | ||
acf442dc AK |
252 | KEY(3, 0, KEY_R), |
253 | KEY(3, 1, KEY_V), | |
254 | KEY(3, 2, KEY_B), | |
ffe7f95b | 255 | KEY(3, 3, KEY_N), |
acf442dc AK |
256 | KEY(3, 4, KEY_M), |
257 | KEY(3, 5, KEY_SPACE), | |
258 | KEY(3, 6, KEY_SPACE), | |
259 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 260 | |
acf442dc AK |
261 | KEY(4, 0, KEY_T), |
262 | KEY(4, 1, KEY_DOWN), | |
263 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 264 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
265 | KEY(4, 5, KEY_RIGHTALT), |
266 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 267 | KEY(4, 8, KEY_F10), |
3fea6026 | 268 | |
acf442dc | 269 | KEY(5, 0, KEY_Y), |
2e65a207 | 270 | KEY(5, 8, KEY_F11), |
3fea6026 | 271 | |
acf442dc | 272 | KEY(6, 0, KEY_U), |
3fea6026 | 273 | |
acf442dc AK |
274 | KEY(7, 0, KEY_I), |
275 | KEY(7, 1, KEY_F7), | |
276 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
277 | }; |
278 | ||
4f543332 TL |
279 | static struct matrix_keymap_data board_map_data = { |
280 | .keymap = board_keymap, | |
281 | .keymap_size = ARRAY_SIZE(board_keymap), | |
282 | }; | |
283 | ||
ffe7f95b | 284 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 285 | .keymap_data = &board_map_data, |
ffe7f95b LL |
286 | .rows = 8, |
287 | .cols = 8, | |
ffe7f95b LL |
288 | .rep = 1, |
289 | }; | |
290 | ||
ce6f0016 AH |
291 | /* Enable input logic and pull all lines up when eMMC is on. */ |
292 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
293 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
294 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
295 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
296 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
297 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
298 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
299 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
300 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
301 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
302 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
303 | }; | |
304 | ||
305 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
306 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
307 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
308 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
309 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
310 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
311 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
312 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
313 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
314 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
315 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
316 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
317 | }; | |
318 | ||
112485e9 BC |
319 | static struct omap_mux_partition *partition; |
320 | ||
ce6f0016 AH |
321 | /* |
322 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
323 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
324 | */ | |
325 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
326 | { | |
327 | if (power_on) | |
112485e9 | 328 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 329 | else |
112485e9 | 330 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
331 | } |
332 | ||
68ff0423 | 333 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
334 | { |
335 | .name = "external", | |
336 | .mmc = 1, | |
3a63833e | 337 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
338 | .cover_only = true, |
339 | .gpio_cd = 160, | |
340 | .gpio_wp = -EINVAL, | |
5e763d29 | 341 | .power_saving = true, |
ffe7f95b LL |
342 | }, |
343 | { | |
344 | .name = "internal", | |
345 | .mmc = 2, | |
3a63833e SG |
346 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
347 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
348 | .gpio_cd = -EINVAL, |
349 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
350 | .nonremovable = true, |
351 | .power_saving = true, | |
ce6f0016 | 352 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
353 | }, |
354 | {} /* Terminator */ | |
355 | }; | |
356 | ||
786b01a8 OD |
357 | static struct regulator_consumer_supply rx51_vmmc1_supply[] = { |
358 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
359 | }; | |
ffe7f95b | 360 | |
786b01a8 OD |
361 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { |
362 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
363 | }; | |
ffe7f95b | 364 | |
786b01a8 OD |
365 | static struct regulator_consumer_supply rx51_vsim_supply[] = { |
366 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
367 | }; | |
ffe7f95b | 368 | |
4cfcaef1 JN |
369 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
370 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
371 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
372 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
373 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
374 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
375 | /* tpa6130a2 */ |
376 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 377 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
0005ae73 | 378 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
4cfcaef1 JN |
379 | }; |
380 | ||
381 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
382 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
383 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
384 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
385 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
386 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
589541c0 JN |
387 | /* Si4713 IO supply */ |
388 | REGULATOR_SUPPLY("vio", "2-0063"), | |
4cfcaef1 JN |
389 | }; |
390 | ||
0581b52e | 391 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { |
b5b9945b | 392 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), |
589541c0 JN |
393 | /* Si4713 supply */ |
394 | REGULATOR_SUPPLY("vdd", "2-0063"), | |
0581b52e RQ |
395 | }; |
396 | ||
ffe7f95b LL |
397 | static struct regulator_init_data rx51_vaux1 = { |
398 | .constraints = { | |
399 | .name = "V28", | |
400 | .min_uV = 2800000, | |
401 | .max_uV = 2800000, | |
000d534e | 402 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
403 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
404 | | REGULATOR_MODE_STANDBY, | |
405 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
406 | | REGULATOR_CHANGE_STATUS, | |
407 | }, | |
0581b52e RQ |
408 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
409 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
410 | }; |
411 | ||
412 | static struct regulator_init_data rx51_vaux2 = { | |
413 | .constraints = { | |
414 | .name = "VCSI", | |
415 | .min_uV = 1800000, | |
416 | .max_uV = 1800000, | |
417 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
418 | | REGULATOR_MODE_STANDBY, | |
419 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
420 | | REGULATOR_CHANGE_STATUS, | |
421 | }, | |
422 | }; | |
423 | ||
424 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 425 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
426 | .constraints = { |
427 | .name = "VCAM_DIG_18", | |
428 | .min_uV = 1800000, | |
429 | .max_uV = 1800000, | |
430 | .apply_uV = true, | |
431 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
432 | | REGULATOR_MODE_STANDBY, | |
433 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
434 | | REGULATOR_CHANGE_STATUS, | |
435 | }, | |
436 | }; | |
437 | ||
f52eeee8 AH |
438 | static struct regulator_init_data rx51_vaux3_mmc = { |
439 | .constraints = { | |
440 | .name = "VMMC2_30", | |
441 | .min_uV = 2800000, | |
442 | .max_uV = 3000000, | |
443 | .apply_uV = true, | |
444 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
445 | | REGULATOR_MODE_STANDBY, | |
446 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
447 | | REGULATOR_CHANGE_MODE | |
448 | | REGULATOR_CHANGE_STATUS, | |
449 | }, | |
786b01a8 OD |
450 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), |
451 | .consumer_supplies = rx51_vaux3_supply, | |
f52eeee8 AH |
452 | }; |
453 | ||
ffe7f95b LL |
454 | static struct regulator_init_data rx51_vaux4 = { |
455 | .constraints = { | |
456 | .name = "VCAM_ANA_28", | |
457 | .min_uV = 2800000, | |
458 | .max_uV = 2800000, | |
459 | .apply_uV = true, | |
460 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
461 | | REGULATOR_MODE_STANDBY, | |
462 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
463 | | REGULATOR_CHANGE_STATUS, | |
464 | }, | |
465 | }; | |
466 | ||
467 | static struct regulator_init_data rx51_vmmc1 = { | |
468 | .constraints = { | |
469 | .min_uV = 1850000, | |
470 | .max_uV = 3150000, | |
471 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
472 | | REGULATOR_MODE_STANDBY, | |
473 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
474 | | REGULATOR_CHANGE_MODE | |
475 | | REGULATOR_CHANGE_STATUS, | |
476 | }, | |
786b01a8 OD |
477 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), |
478 | .consumer_supplies = rx51_vmmc1_supply, | |
ffe7f95b LL |
479 | }; |
480 | ||
481 | static struct regulator_init_data rx51_vmmc2 = { | |
482 | .constraints = { | |
f2add1de JN |
483 | .name = "V28_A", |
484 | .min_uV = 2800000, | |
485 | .max_uV = 3000000, | |
2827411e | 486 | .always_on = true, /* due VIO leak to AIC34 VDDs */ |
ffe7f95b LL |
487 | .apply_uV = true, |
488 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
489 | | REGULATOR_MODE_STANDBY, | |
490 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
491 | | REGULATOR_CHANGE_MODE | |
492 | | REGULATOR_CHANGE_STATUS, | |
493 | }, | |
4cfcaef1 JN |
494 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
495 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
496 | }; |
497 | ||
498 | static struct regulator_init_data rx51_vsim = { | |
499 | .constraints = { | |
500 | .name = "VMMC2_IO_18", | |
501 | .min_uV = 1800000, | |
502 | .max_uV = 1800000, | |
503 | .apply_uV = true, | |
504 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
505 | | REGULATOR_MODE_STANDBY, | |
506 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
507 | | REGULATOR_CHANGE_STATUS, | |
508 | }, | |
786b01a8 OD |
509 | .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), |
510 | .consumer_supplies = rx51_vsim_supply, | |
ffe7f95b LL |
511 | }; |
512 | ||
4cfcaef1 JN |
513 | static struct regulator_init_data rx51_vio = { |
514 | .constraints = { | |
515 | .min_uV = 1800000, | |
516 | .max_uV = 1800000, | |
517 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
518 | | REGULATOR_MODE_STANDBY, | |
519 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
520 | | REGULATOR_CHANGE_MODE | |
521 | | REGULATOR_CHANGE_STATUS, | |
522 | }, | |
523 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
524 | .consumer_supplies = rx51_vio_supplies, | |
525 | }; | |
526 | ||
589541c0 JN |
527 | static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = { |
528 | .gpio_reset = RX51_FMTX_RESET_GPIO, | |
529 | }; | |
530 | ||
531 | static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = { | |
532 | I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH), | |
533 | .platform_data = &rx51_si4713_i2c_data, | |
534 | }; | |
535 | ||
536 | static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = { | |
537 | .i2c_bus = 2, | |
538 | .subdev_board_info = &rx51_si4713_board_info, | |
539 | }; | |
540 | ||
541 | static struct platform_device rx51_si4713_dev __initdata_or_module = { | |
542 | .name = "radio-si4713", | |
543 | .id = -1, | |
544 | .dev = { | |
545 | .platform_data = &rx51_si4713_data, | |
546 | }, | |
547 | }; | |
548 | ||
549 | static __init void rx51_init_si4713(void) | |
550 | { | |
551 | int err; | |
552 | ||
553 | err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq"); | |
554 | if (err) { | |
555 | printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err); | |
556 | return; | |
557 | } | |
558 | rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ); | |
559 | platform_device_register(&rx51_si4713_dev); | |
560 | } | |
561 | ||
ffe7f95b LL |
562 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
563 | { | |
564 | /* FIXME this gpio setup is just a placeholder for now */ | |
bc593f5d | 565 | gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm"); |
c0ad4fac | 566 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en"); |
ffe7f95b | 567 | |
ffe7f95b LL |
568 | return 0; |
569 | } | |
570 | ||
571 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
572 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
573 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
574 | .irq_end = TWL4030_GPIO_IRQ_END, | |
575 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
576 | | BIT(4) | BIT(5) | |
577 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
578 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
579 | | BIT(16) | BIT(17) , | |
580 | .setup = rx51_twlgpio_setup, | |
581 | }; | |
582 | ||
9312fffb AK |
583 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
584 | /* | |
3c684e84 | 585 | * Turn off everything |
9312fffb | 586 | */ |
3c684e84 | 587 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
588 | }; |
589 | ||
590 | static struct twl4030_script sleep_on_script __initdata = { | |
591 | .script = sleep_on_seq, | |
592 | .size = ARRAY_SIZE(sleep_on_seq), | |
593 | .flags = TWL4030_SLEEP_SCRIPT, | |
594 | }; | |
595 | ||
596 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
597 | /* | |
3c684e84 | 598 | * Reenable everything |
9312fffb | 599 | */ |
3c684e84 | 600 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
601 | }; |
602 | ||
603 | static struct twl4030_script wakeup_script __initdata = { | |
604 | .script = wakeup_seq, | |
605 | .size = ARRAY_SIZE(wakeup_seq), | |
606 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
607 | }; | |
608 | ||
609 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
610 | /* | |
3c684e84 | 611 | * Reenable everything |
9312fffb | 612 | */ |
3c684e84 | 613 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
614 | }; |
615 | ||
616 | static struct twl4030_script wakeup_p3_script __initdata = { | |
617 | .script = wakeup_p3_seq, | |
618 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
619 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
620 | }; | |
621 | ||
622 | static struct twl4030_ins wrst_seq[] __initdata = { | |
623 | /* | |
624 | * Reset twl4030. | |
625 | * Reset VDD1 regulator. | |
626 | * Reset VDD2 regulator. | |
627 | * Reset VPLL1 regulator. | |
628 | * Enable sysclk output. | |
629 | * Reenable twl4030. | |
630 | */ | |
631 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
632 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
633 | 0x13}, | |
9312fffb AK |
634 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
635 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
636 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
637 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 638 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
639 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
640 | }; | |
641 | ||
642 | static struct twl4030_script wrst_script __initdata = { | |
643 | .script = wrst_seq, | |
644 | .size = ARRAY_SIZE(wrst_seq), | |
645 | .flags = TWL4030_WRST_SCRIPT, | |
646 | }; | |
647 | ||
648 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
649 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
650 | board might hit retention before loading of wakeup script is | |
651 | completed. This can cause boot failures depending on timing issues. | |
652 | */ | |
653 | &wakeup_script, | |
654 | &sleep_on_script, | |
655 | &wakeup_p3_script, | |
656 | &wrst_script, | |
657 | }; | |
658 | ||
659 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
660 | { .resource = RES_VDD1, .devgroup = -1, |
661 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
662 | .remap_sleep = RES_STATE_OFF | |
663 | }, | |
664 | { .resource = RES_VDD2, .devgroup = -1, | |
665 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
666 | .remap_sleep = RES_STATE_OFF | |
667 | }, | |
668 | { .resource = RES_VPLL1, .devgroup = -1, | |
669 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
670 | .remap_sleep = RES_STATE_OFF | |
671 | }, | |
672 | { .resource = RES_VPLL2, .devgroup = -1, | |
673 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
674 | }, | |
675 | { .resource = RES_VAUX1, .devgroup = -1, | |
676 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
677 | }, | |
678 | { .resource = RES_VAUX2, .devgroup = -1, | |
679 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
680 | }, | |
681 | { .resource = RES_VAUX3, .devgroup = -1, | |
682 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
683 | }, | |
684 | { .resource = RES_VAUX4, .devgroup = -1, | |
685 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
686 | }, | |
687 | { .resource = RES_VMMC1, .devgroup = -1, | |
688 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
689 | }, | |
690 | { .resource = RES_VMMC2, .devgroup = -1, | |
691 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
692 | }, | |
693 | { .resource = RES_VDAC, .devgroup = -1, | |
694 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
695 | }, | |
696 | { .resource = RES_VSIM, .devgroup = -1, | |
697 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
698 | }, | |
699 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
700 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
701 | }, | |
702 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
703 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
704 | }, | |
705 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
706 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
707 | }, | |
708 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
709 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
710 | }, | |
711 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
712 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
713 | }, | |
714 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
715 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
716 | }, | |
717 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
718 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
719 | }, | |
720 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
721 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
722 | }, | |
723 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
724 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
725 | }, | |
726 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
727 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
728 | }, | |
729 | { .resource = RES_RESET, .devgroup = -1, | |
730 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
731 | }, | |
d7ac829f | 732 | { .resource = RES_MAIN_REF, .devgroup = -1, |
3c684e84 AK |
733 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
734 | }, | |
9312fffb AK |
735 | { 0, 0}, |
736 | }; | |
737 | ||
738 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
739 | .scripts = twl4030_scripts, | |
740 | .num = ARRAY_SIZE(twl4030_scripts), | |
741 | .resource_config = twl4030_rconfig, | |
742 | }; | |
743 | ||
b7a834cc IK |
744 | struct twl4030_codec_vibra_data rx51_vibra_data __initdata = { |
745 | .coexist = 0, | |
746 | }; | |
747 | ||
748 | struct twl4030_codec_data rx51_codec_data __initdata = { | |
749 | .audio_mclk = 26000000, | |
750 | .vibra = &rx51_vibra_data, | |
751 | }; | |
9312fffb | 752 | |
9312fffb | 753 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
754 | /* platform_data for children goes here */ |
755 | .gpio = &rx51_gpio_data, | |
756 | .keypad = &rx51_kp_data, | |
9312fffb | 757 | .power = &rx51_t2scripts_data, |
b7a834cc | 758 | .codec = &rx51_codec_data, |
ffe7f95b LL |
759 | |
760 | .vaux1 = &rx51_vaux1, | |
761 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
762 | .vaux4 = &rx51_vaux4, |
763 | .vmmc1 = &rx51_vmmc1, | |
ffe7f95b | 764 | .vsim = &rx51_vsim, |
4cfcaef1 | 765 | .vio = &rx51_vio, |
ffe7f95b LL |
766 | }; |
767 | ||
f0c61d3d | 768 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
769 | .id = TPA6130A2, |
770 | .power_gpio = 98, | |
771 | }; | |
772 | ||
f0fba2ad LG |
773 | /* Audio setup data */ |
774 | static struct aic3x_setup_data rx51_aic34_setup = { | |
775 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
776 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
777 | }; | |
778 | ||
e4862f2f | 779 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
780 | .setup = &rx51_aic34_setup, |
781 | .gpio_reset = 60, | |
782 | }; | |
783 | ||
caeeb4aa JN |
784 | static struct aic3x_pdata rx51_aic3x_data2 = { |
785 | .gpio_reset = 60, | |
786 | }; | |
787 | ||
dabe929b JN |
788 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
789 | { | |
790 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 791 | .platform_data = &rx51_aic3x_data, |
dabe929b | 792 | }, |
caeeb4aa JN |
793 | { |
794 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
795 | .platform_data = &rx51_aic3x_data2, | |
796 | }, | |
70b5d737 MN |
797 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
798 | { | |
799 | I2C_BOARD_INFO("tsl2563", 0x29), | |
800 | .platform_data = &rx51_tsl2563_platform_data, | |
801 | }, | |
802 | #endif | |
64d06691 JN |
803 | { |
804 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
805 | .platform_data = &rx51_tpa6130a2_data, | |
806 | } | |
dabe929b JN |
807 | }; |
808 | ||
ffe7f95b LL |
809 | static int __init rx51_i2c_init(void) |
810 | { | |
f52eeee8 | 811 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 812 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 813 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
814 | /* Only older boards use VMMC2 for internal MMC */ |
815 | rx51_vmmc2.num_consumer_supplies--; | |
816 | } else { | |
f52eeee8 | 817 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 818 | } |
4cfcaef1 | 819 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
827ed9ae | 820 | omap3_pmic_get_config(&rx51_twldata, |
b252b0ef PU |
821 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, |
822 | TWL_COMMON_REGULATOR_VDAC); | |
823 | ||
824 | rx51_twldata.vdac->constraints.apply_uV = true; | |
825 | rx51_twldata.vdac->constraints.name = "VDAC"; | |
826 | ||
fbd8071c | 827 | omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); |
dabe929b JN |
828 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, |
829 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
ffe7f95b LL |
830 | omap_register_i2c_bus(3, 400, NULL, 0); |
831 | return 0; | |
832 | } | |
833 | ||
aa62e90f JY |
834 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
835 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
836 | ||
837 | static struct mtd_partition onenand_partitions[] = { | |
838 | { | |
839 | .name = "bootloader", | |
840 | .offset = 0, | |
841 | .size = 0x20000, | |
842 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
843 | }, | |
844 | { | |
845 | .name = "config", | |
846 | .offset = MTDPART_OFS_APPEND, | |
847 | .size = 0x60000, | |
848 | }, | |
849 | { | |
850 | .name = "log", | |
851 | .offset = MTDPART_OFS_APPEND, | |
852 | .size = 0x40000, | |
853 | }, | |
854 | { | |
855 | .name = "kernel", | |
856 | .offset = MTDPART_OFS_APPEND, | |
857 | .size = 0x200000, | |
858 | }, | |
859 | { | |
860 | .name = "initfs", | |
861 | .offset = MTDPART_OFS_APPEND, | |
862 | .size = 0x200000, | |
863 | }, | |
864 | { | |
865 | .name = "rootfs", | |
866 | .offset = MTDPART_OFS_APPEND, | |
867 | .size = MTDPART_SIZ_FULL, | |
868 | }, | |
869 | }; | |
870 | ||
5403187f AK |
871 | static struct omap_onenand_platform_data board_onenand_data[] = { |
872 | { | |
873 | .cs = 0, | |
874 | .gpio_irq = 65, | |
875 | .parts = onenand_partitions, | |
876 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
877 | .flags = ONENAND_SYNC_READWRITE, | |
878 | } | |
aa62e90f | 879 | }; |
aa62e90f | 880 | #endif |
ffe7f95b | 881 | |
1a48e157 TL |
882 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
883 | ||
884 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
885 | .cs = 1, | |
886 | .gpio_irq = 54, | |
887 | .gpio_pwrdwn = 86, | |
888 | .gpio_reset = 164, | |
889 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
890 | }; | |
891 | ||
892 | static void __init board_smc91x_init(void) | |
893 | { | |
4896e394 TL |
894 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
895 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
896 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
897 | |
898 | gpmc_smc91x_init(&board_smc91x_data); | |
899 | } | |
900 | ||
901 | #else | |
902 | ||
903 | static inline void board_smc91x_init(void) | |
904 | { | |
905 | } | |
906 | ||
907 | #endif | |
908 | ||
a24e61a9 KV |
909 | static void rx51_wl1251_set_power(bool enable) |
910 | { | |
911 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
912 | } | |
913 | ||
bc593f5d IG |
914 | static struct gpio rx51_wl1251_gpios[] __initdata = { |
915 | { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" }, | |
916 | { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, | |
917 | }; | |
918 | ||
a24e61a9 KV |
919 | static void __init rx51_init_wl1251(void) |
920 | { | |
921 | int irq, ret; | |
922 | ||
bc593f5d IG |
923 | ret = gpio_request_array(rx51_wl1251_gpios, |
924 | ARRAY_SIZE(rx51_wl1251_gpios)); | |
a24e61a9 KV |
925 | if (ret < 0) |
926 | goto error; | |
927 | ||
a24e61a9 KV |
928 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); |
929 | if (irq < 0) | |
930 | goto err_irq; | |
931 | ||
932 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
933 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
934 | ||
935 | return; | |
936 | ||
937 | err_irq: | |
938 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
a24e61a9 | 939 | gpio_free(RX51_WL1251_POWER_GPIO); |
a24e61a9 KV |
940 | error: |
941 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
942 | wl1251_pdata.set_power = NULL; | |
943 | ||
944 | /* | |
945 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
946 | * set_power is null, and wl1251_probe() will fail. | |
947 | */ | |
948 | } | |
949 | ||
ffe7f95b LL |
950 | void __init rx51_peripherals_init(void) |
951 | { | |
ffe7f95b | 952 | rx51_i2c_init(); |
5403187f | 953 | gpmc_onenand_init(board_onenand_data); |
1a48e157 | 954 | board_smc91x_init(); |
f014ee32 | 955 | rx51_add_gpio_keys(); |
a24e61a9 | 956 | rx51_init_wl1251(); |
589541c0 | 957 | rx51_init_si4713(); |
a24e61a9 KV |
958 | spi_register_board_info(rx51_peripherals_spi_board_info, |
959 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
960 | |
961 | partition = omap_mux_get("core"); | |
962 | if (partition) | |
963 | omap2_hsmmc_init(mmc); | |
964 | ||
10299e2e | 965 | rx51_charger_init(); |
ffe7f95b LL |
966 | } |
967 |