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Commit | Line | Data |
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ffe7f95b | 1 | /* |
9312fffb | 2 | * linux/arch/arm/mach-omap2/board-rx51-peripherals.c |
ffe7f95b LL |
3 | * |
4 | * Copyright (C) 2008-2009 Nokia | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/input.h> | |
6135434a | 15 | #include <linux/input/matrix_keypad.h> |
ffe7f95b | 16 | #include <linux/spi/spi.h> |
c1f9a095 | 17 | #include <linux/wl12xx.h> |
3dad5356 | 18 | #include <linux/spi/tsc2005.h> |
ffe7f95b | 19 | #include <linux/i2c.h> |
ebeb53e1 | 20 | #include <linux/i2c/twl.h> |
ffe7f95b LL |
21 | #include <linux/clk.h> |
22 | #include <linux/delay.h> | |
23 | #include <linux/regulator/machine.h> | |
24 | #include <linux/gpio.h> | |
f014ee32 | 25 | #include <linux/gpio_keys.h> |
5e763d29 | 26 | #include <linux/mmc/host.h> |
10299e2e | 27 | #include <linux/power/isp1704_charger.h> |
9f97da78 | 28 | #include <asm/system_info.h> |
ffe7f95b | 29 | |
ce491cf8 | 30 | #include <plat/mcspi.h> |
ce491cf8 | 31 | #include <plat/board.h> |
4e65331c | 32 | #include "common.h" |
ce491cf8 TL |
33 | #include <plat/dma.h> |
34 | #include <plat/gpmc.h> | |
ce491cf8 TL |
35 | #include <plat/onenand.h> |
36 | #include <plat/gpmc-smc91x.h> | |
ffe7f95b | 37 | |
04aeae77 MK |
38 | #include <mach/board-rx51.h> |
39 | ||
87581fd4 | 40 | #include <sound/tlv320aic3x.h> |
64d06691 | 41 | #include <sound/tpa6130a2-plat.h> |
589541c0 JN |
42 | #include <media/radio-si4713.h> |
43 | #include <media/si4713.h> | |
eeada9e8 | 44 | #include <linux/leds-lp5523.h> |
87581fd4 | 45 | |
70b5d737 | 46 | #include <../drivers/staging/iio/light/tsl2563.h> |
3b511201 | 47 | #include <linux/lis3lv02d.h> |
70b5d737 | 48 | |
4896e394 | 49 | #include "mux.h" |
d02a900b | 50 | #include "hsmmc.h" |
fbd8071c | 51 | #include "common-board-devices.h" |
ffe7f95b | 52 | |
f52eeee8 AH |
53 | #define SYSTEM_REV_B_USES_VAUX3 0x1699 |
54 | #define SYSTEM_REV_S_USES_VAUX3 0x8 | |
55 | ||
a24e61a9 KV |
56 | #define RX51_WL1251_POWER_GPIO 87 |
57 | #define RX51_WL1251_IRQ_GPIO 42 | |
589541c0 JN |
58 | #define RX51_FMTX_RESET_GPIO 163 |
59 | #define RX51_FMTX_IRQ 53 | |
eeada9e8 | 60 | #define RX51_LP5523_CHIP_EN_GPIO 41 |
a24e61a9 | 61 | |
10299e2e KJ |
62 | #define RX51_USB_TRANSCEIVER_RST_GPIO 67 |
63 | ||
3dad5356 AK |
64 | #define RX51_TSC2005_RESET_GPIO 104 |
65 | #define RX51_TSC2005_IRQ_GPIO 100 | |
66 | ||
3b511201 AP |
67 | #define LIS302_IRQ1_GPIO 181 |
68 | #define LIS302_IRQ2_GPIO 180 /* Not yet in use */ | |
69 | ||
a24e61a9 KV |
70 | /* list all spi devices here */ |
71 | enum { | |
72 | RX51_SPI_WL1251, | |
03e11104 | 73 | RX51_SPI_MIPID, /* LCD panel */ |
6996e7ff | 74 | RX51_SPI_TSC2005, /* Touch Controller */ |
a24e61a9 KV |
75 | }; |
76 | ||
77 | static struct wl12xx_platform_data wl1251_pdata; | |
3dad5356 | 78 | static struct tsc2005_platform_data tsc2005_pdata; |
a24e61a9 | 79 | |
3b511201 AP |
80 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) |
81 | static int lis302_setup(void) | |
82 | { | |
83 | int err; | |
84 | int irq1 = LIS302_IRQ1_GPIO; | |
85 | int irq2 = LIS302_IRQ2_GPIO; | |
86 | ||
87 | /* gpio for interrupt pin 1 */ | |
88 | err = gpio_request(irq1, "lis3lv02dl_irq1"); | |
89 | if (err) { | |
90 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
91 | goto out; | |
92 | } | |
93 | ||
94 | /* gpio for interrupt pin 2 */ | |
95 | err = gpio_request(irq2, "lis3lv02dl_irq2"); | |
96 | if (err) { | |
97 | gpio_free(irq1); | |
98 | printk(KERN_ERR "lis3lv02dl: gpio request failed\n"); | |
99 | goto out; | |
100 | } | |
101 | ||
102 | gpio_direction_input(irq1); | |
103 | gpio_direction_input(irq2); | |
104 | ||
105 | out: | |
106 | return err; | |
107 | } | |
108 | ||
109 | static int lis302_release(void) | |
110 | { | |
111 | gpio_free(LIS302_IRQ1_GPIO); | |
112 | gpio_free(LIS302_IRQ2_GPIO); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | static struct lis3lv02d_platform_data rx51_lis3lv02d_data = { | |
118 | .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y | | |
119 | LIS3_CLICK_SINGLE_Z, | |
120 | /* Limits are 0.5g * value */ | |
121 | .click_thresh_x = 8, | |
122 | .click_thresh_y = 8, | |
123 | .click_thresh_z = 10, | |
124 | /* Click must be longer than time limit */ | |
125 | .click_time_limit = 9, | |
126 | /* Kind of debounce filter */ | |
127 | .click_latency = 50, | |
128 | ||
129 | /* Limits for all axis. millig-value / 18 to get HW values */ | |
130 | .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI, | |
131 | .wakeup_thresh = 800 / 18, | |
132 | .wakeup_flags2 = LIS3_WAKEUP_Z_HI , | |
133 | .wakeup_thresh2 = 900 / 18, | |
134 | ||
135 | .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE, | |
136 | ||
137 | /* Interrupt line 2 for click detection, line 1 for thresholds */ | |
138 | .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12, | |
139 | ||
140 | .axis_x = LIS3_DEV_X, | |
141 | .axis_y = LIS3_INV_DEV_Y, | |
142 | .axis_z = LIS3_INV_DEV_Z, | |
143 | .setup_resources = lis302_setup, | |
144 | .release_resources = lis302_release, | |
145 | .st_min_limits = {-32, 3, 3}, | |
146 | .st_max_limits = {-3, 32, 32}, | |
147 | .irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO), | |
148 | }; | |
149 | #endif | |
150 | ||
70b5d737 MN |
151 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
152 | static struct tsl2563_platform_data rx51_tsl2563_platform_data = { | |
153 | .cover_comp_gain = 16, | |
154 | }; | |
155 | #endif | |
156 | ||
eeada9e8 AP |
157 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) |
158 | static struct lp5523_led_config rx51_lp5523_led_config[] = { | |
159 | { | |
160 | .chan_nr = 0, | |
161 | .led_current = 50, | |
162 | }, { | |
163 | .chan_nr = 1, | |
164 | .led_current = 50, | |
165 | }, { | |
166 | .chan_nr = 2, | |
167 | .led_current = 50, | |
168 | }, { | |
169 | .chan_nr = 3, | |
170 | .led_current = 50, | |
171 | }, { | |
172 | .chan_nr = 4, | |
173 | .led_current = 50, | |
174 | }, { | |
175 | .chan_nr = 5, | |
176 | .led_current = 50, | |
177 | }, { | |
178 | .chan_nr = 6, | |
179 | .led_current = 50, | |
180 | }, { | |
181 | .chan_nr = 7, | |
182 | .led_current = 50, | |
183 | }, { | |
184 | .chan_nr = 8, | |
185 | .led_current = 50, | |
186 | } | |
187 | }; | |
188 | ||
189 | static int rx51_lp5523_setup(void) | |
190 | { | |
191 | return gpio_request_one(RX51_LP5523_CHIP_EN_GPIO, GPIOF_DIR_OUT, | |
192 | "lp5523_enable"); | |
193 | } | |
194 | ||
195 | static void rx51_lp5523_release(void) | |
196 | { | |
197 | gpio_free(RX51_LP5523_CHIP_EN_GPIO); | |
198 | } | |
199 | ||
200 | static void rx51_lp5523_enable(bool state) | |
201 | { | |
202 | gpio_set_value(RX51_LP5523_CHIP_EN_GPIO, !!state); | |
203 | } | |
204 | ||
205 | static struct lp5523_platform_data rx51_lp5523_platform_data = { | |
206 | .led_config = rx51_lp5523_led_config, | |
207 | .num_channels = ARRAY_SIZE(rx51_lp5523_led_config), | |
208 | .clock_mode = LP5523_CLOCK_AUTO, | |
209 | .setup_resources = rx51_lp5523_setup, | |
210 | .release_resources = rx51_lp5523_release, | |
211 | .enable = rx51_lp5523_enable, | |
212 | }; | |
213 | #endif | |
214 | ||
a24e61a9 KV |
215 | static struct omap2_mcspi_device_config wl1251_mcspi_config = { |
216 | .turbo_mode = 0, | |
a24e61a9 KV |
217 | }; |
218 | ||
03e11104 RQ |
219 | static struct omap2_mcspi_device_config mipid_mcspi_config = { |
220 | .turbo_mode = 0, | |
03e11104 RQ |
221 | }; |
222 | ||
6996e7ff RQ |
223 | static struct omap2_mcspi_device_config tsc2005_mcspi_config = { |
224 | .turbo_mode = 0, | |
6996e7ff RQ |
225 | }; |
226 | ||
a24e61a9 KV |
227 | static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = { |
228 | [RX51_SPI_WL1251] = { | |
229 | .modalias = "wl1251", | |
230 | .bus_num = 4, | |
231 | .chip_select = 0, | |
232 | .max_speed_hz = 48000000, | |
860fc976 | 233 | .mode = SPI_MODE_3, |
a24e61a9 KV |
234 | .controller_data = &wl1251_mcspi_config, |
235 | .platform_data = &wl1251_pdata, | |
236 | }, | |
03e11104 RQ |
237 | [RX51_SPI_MIPID] = { |
238 | .modalias = "acx565akm", | |
239 | .bus_num = 1, | |
240 | .chip_select = 2, | |
241 | .max_speed_hz = 6000000, | |
242 | .controller_data = &mipid_mcspi_config, | |
243 | }, | |
6996e7ff RQ |
244 | [RX51_SPI_TSC2005] = { |
245 | .modalias = "tsc2005", | |
246 | .bus_num = 1, | |
247 | .chip_select = 0, | |
6996e7ff RQ |
248 | .max_speed_hz = 6000000, |
249 | .controller_data = &tsc2005_mcspi_config, | |
3dad5356 | 250 | .platform_data = &tsc2005_pdata, |
6996e7ff | 251 | }, |
a24e61a9 KV |
252 | }; |
253 | ||
10299e2e KJ |
254 | static void rx51_charger_set_power(bool on) |
255 | { | |
256 | gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on); | |
257 | } | |
258 | ||
259 | static struct isp1704_charger_data rx51_charger_data = { | |
260 | .set_power = rx51_charger_set_power, | |
261 | }; | |
262 | ||
fd0964c5 | 263 | static struct platform_device rx51_charger_device = { |
10299e2e KJ |
264 | .name = "isp1704_charger", |
265 | .dev = { | |
266 | .platform_data = &rx51_charger_data, | |
267 | }, | |
fd0964c5 HK |
268 | }; |
269 | ||
10299e2e KJ |
270 | static void __init rx51_charger_init(void) |
271 | { | |
272 | WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO, | |
e5fe29c7 | 273 | GPIOF_OUT_INIT_HIGH, "isp1704_reset")); |
10299e2e KJ |
274 | |
275 | platform_device_register(&rx51_charger_device); | |
276 | } | |
277 | ||
f014ee32 JN |
278 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
279 | ||
280 | #define RX51_GPIO_CAMERA_LENS_COVER 110 | |
281 | #define RX51_GPIO_CAMERA_FOCUS 68 | |
282 | #define RX51_GPIO_CAMERA_CAPTURE 69 | |
283 | #define RX51_GPIO_KEYPAD_SLIDE 71 | |
284 | #define RX51_GPIO_LOCK_BUTTON 113 | |
285 | #define RX51_GPIO_PROXIMITY 89 | |
286 | ||
287 | #define RX51_GPIO_DEBOUNCE_TIMEOUT 10 | |
288 | ||
289 | static struct gpio_keys_button rx51_gpio_keys[] = { | |
290 | { | |
291 | .desc = "Camera Lens Cover", | |
292 | .type = EV_SW, | |
293 | .code = SW_CAMERA_LENS_COVER, | |
294 | .gpio = RX51_GPIO_CAMERA_LENS_COVER, | |
295 | .active_low = 1, | |
296 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
297 | }, { | |
298 | .desc = "Camera Focus", | |
299 | .type = EV_KEY, | |
300 | .code = KEY_CAMERA_FOCUS, | |
301 | .gpio = RX51_GPIO_CAMERA_FOCUS, | |
302 | .active_low = 1, | |
303 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
304 | }, { | |
305 | .desc = "Camera Capture", | |
306 | .type = EV_KEY, | |
307 | .code = KEY_CAMERA, | |
308 | .gpio = RX51_GPIO_CAMERA_CAPTURE, | |
309 | .active_low = 1, | |
310 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
311 | }, { | |
312 | .desc = "Lock Button", | |
313 | .type = EV_KEY, | |
314 | .code = KEY_SCREENLOCK, | |
315 | .gpio = RX51_GPIO_LOCK_BUTTON, | |
316 | .active_low = 1, | |
317 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
318 | }, { | |
319 | .desc = "Keypad Slide", | |
320 | .type = EV_SW, | |
321 | .code = SW_KEYPAD_SLIDE, | |
322 | .gpio = RX51_GPIO_KEYPAD_SLIDE, | |
323 | .active_low = 1, | |
324 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
325 | }, { | |
326 | .desc = "Proximity Sensor", | |
327 | .type = EV_SW, | |
328 | .code = SW_FRONT_PROXIMITY, | |
329 | .gpio = RX51_GPIO_PROXIMITY, | |
330 | .active_low = 0, | |
331 | .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT, | |
332 | } | |
333 | }; | |
334 | ||
335 | static struct gpio_keys_platform_data rx51_gpio_keys_data = { | |
336 | .buttons = rx51_gpio_keys, | |
337 | .nbuttons = ARRAY_SIZE(rx51_gpio_keys), | |
338 | }; | |
339 | ||
340 | static struct platform_device rx51_gpio_keys_device = { | |
341 | .name = "gpio-keys", | |
342 | .id = -1, | |
343 | .dev = { | |
344 | .platform_data = &rx51_gpio_keys_data, | |
345 | }, | |
346 | }; | |
347 | ||
348 | static void __init rx51_add_gpio_keys(void) | |
349 | { | |
350 | platform_device_register(&rx51_gpio_keys_device); | |
351 | } | |
352 | #else | |
353 | static void __init rx51_add_gpio_keys(void) | |
354 | { | |
355 | } | |
356 | #endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */ | |
357 | ||
bead4375 | 358 | static uint32_t board_keymap[] = { |
3fea6026 DT |
359 | /* |
360 | * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row | |
361 | * connected to the ground" matrix state. | |
362 | */ | |
ffe7f95b | 363 | KEY(0, 0, KEY_Q), |
acf442dc AK |
364 | KEY(0, 1, KEY_O), |
365 | KEY(0, 2, KEY_P), | |
366 | KEY(0, 3, KEY_COMMA), | |
367 | KEY(0, 4, KEY_BACKSPACE), | |
368 | KEY(0, 6, KEY_A), | |
369 | KEY(0, 7, KEY_S), | |
3fea6026 | 370 | |
acf442dc | 371 | KEY(1, 0, KEY_W), |
ffe7f95b | 372 | KEY(1, 1, KEY_D), |
acf442dc AK |
373 | KEY(1, 2, KEY_F), |
374 | KEY(1, 3, KEY_G), | |
375 | KEY(1, 4, KEY_H), | |
376 | KEY(1, 5, KEY_J), | |
377 | KEY(1, 6, KEY_K), | |
378 | KEY(1, 7, KEY_L), | |
3fea6026 | 379 | |
acf442dc AK |
380 | KEY(2, 0, KEY_E), |
381 | KEY(2, 1, KEY_DOT), | |
ffe7f95b | 382 | KEY(2, 2, KEY_UP), |
acf442dc AK |
383 | KEY(2, 3, KEY_ENTER), |
384 | KEY(2, 5, KEY_Z), | |
385 | KEY(2, 6, KEY_X), | |
386 | KEY(2, 7, KEY_C), | |
3fea6026 DT |
387 | KEY(2, 8, KEY_F9), |
388 | ||
acf442dc AK |
389 | KEY(3, 0, KEY_R), |
390 | KEY(3, 1, KEY_V), | |
391 | KEY(3, 2, KEY_B), | |
ffe7f95b | 392 | KEY(3, 3, KEY_N), |
acf442dc AK |
393 | KEY(3, 4, KEY_M), |
394 | KEY(3, 5, KEY_SPACE), | |
395 | KEY(3, 6, KEY_SPACE), | |
396 | KEY(3, 7, KEY_LEFT), | |
3fea6026 | 397 | |
acf442dc AK |
398 | KEY(4, 0, KEY_T), |
399 | KEY(4, 1, KEY_DOWN), | |
400 | KEY(4, 2, KEY_RIGHT), | |
ffe7f95b | 401 | KEY(4, 4, KEY_LEFTCTRL), |
acf442dc AK |
402 | KEY(4, 5, KEY_RIGHTALT), |
403 | KEY(4, 6, KEY_LEFTSHIFT), | |
2e65a207 | 404 | KEY(4, 8, KEY_F10), |
3fea6026 | 405 | |
acf442dc | 406 | KEY(5, 0, KEY_Y), |
2e65a207 | 407 | KEY(5, 8, KEY_F11), |
3fea6026 | 408 | |
acf442dc | 409 | KEY(6, 0, KEY_U), |
3fea6026 | 410 | |
acf442dc AK |
411 | KEY(7, 0, KEY_I), |
412 | KEY(7, 1, KEY_F7), | |
413 | KEY(7, 2, KEY_F8), | |
ffe7f95b LL |
414 | }; |
415 | ||
4f543332 TL |
416 | static struct matrix_keymap_data board_map_data = { |
417 | .keymap = board_keymap, | |
418 | .keymap_size = ARRAY_SIZE(board_keymap), | |
419 | }; | |
420 | ||
ffe7f95b | 421 | static struct twl4030_keypad_data rx51_kp_data = { |
4f543332 | 422 | .keymap_data = &board_map_data, |
ffe7f95b LL |
423 | .rows = 8, |
424 | .cols = 8, | |
ffe7f95b LL |
425 | .rep = 1, |
426 | }; | |
427 | ||
ce6f0016 AH |
428 | /* Enable input logic and pull all lines up when eMMC is on. */ |
429 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | |
430 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
431 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
432 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
433 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
434 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
435 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
436 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
437 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
438 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | |
439 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
440 | }; | |
441 | ||
442 | /* Disable input logic and pull all lines down when eMMC is off. */ | |
443 | static struct omap_board_mux rx51_mmc2_off_mux[] = { | |
444 | OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
445 | OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
446 | OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
447 | OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
448 | OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
449 | OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
450 | OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
451 | OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
452 | OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0), | |
453 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
454 | }; | |
455 | ||
112485e9 BC |
456 | static struct omap_mux_partition *partition; |
457 | ||
ce6f0016 AH |
458 | /* |
459 | * Current flows to eMMC when eMMC is off and the data lines are pulled up, | |
460 | * so pull them down. N.B. we pull 8 lines because we are using 8 lines. | |
461 | */ | |
462 | static void rx51_mmc2_remux(struct device *dev, int slot, int power_on) | |
463 | { | |
464 | if (power_on) | |
112485e9 | 465 | omap_mux_write_array(partition, rx51_mmc2_on_mux); |
ce6f0016 | 466 | else |
112485e9 | 467 | omap_mux_write_array(partition, rx51_mmc2_off_mux); |
ce6f0016 AH |
468 | } |
469 | ||
68ff0423 | 470 | static struct omap2_hsmmc_info mmc[] __initdata = { |
ffe7f95b LL |
471 | { |
472 | .name = "external", | |
473 | .mmc = 1, | |
3a63833e | 474 | .caps = MMC_CAP_4_BIT_DATA, |
ffe7f95b LL |
475 | .cover_only = true, |
476 | .gpio_cd = 160, | |
477 | .gpio_wp = -EINVAL, | |
5e763d29 | 478 | .power_saving = true, |
ffe7f95b LL |
479 | }, |
480 | { | |
481 | .name = "internal", | |
482 | .mmc = 2, | |
3a63833e SG |
483 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, |
484 | /* See also rx51_mmc2_remux */ | |
ffe7f95b LL |
485 | .gpio_cd = -EINVAL, |
486 | .gpio_wp = -EINVAL, | |
5e763d29 AH |
487 | .nonremovable = true, |
488 | .power_saving = true, | |
ce6f0016 | 489 | .remux = rx51_mmc2_remux, |
ffe7f95b LL |
490 | }, |
491 | {} /* Terminator */ | |
492 | }; | |
493 | ||
786b01a8 OD |
494 | static struct regulator_consumer_supply rx51_vmmc1_supply[] = { |
495 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
496 | }; | |
ffe7f95b | 497 | |
664a41b8 LT |
498 | static struct regulator_consumer_supply rx51_vaux2_supply[] = { |
499 | REGULATOR_SUPPLY("vdds_csib", "omap3isp"), | |
500 | }; | |
75ccf268 | 501 | |
786b01a8 OD |
502 | static struct regulator_consumer_supply rx51_vaux3_supply[] = { |
503 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
504 | }; | |
ffe7f95b | 505 | |
786b01a8 OD |
506 | static struct regulator_consumer_supply rx51_vsim_supply[] = { |
507 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
508 | }; | |
ffe7f95b | 509 | |
4cfcaef1 JN |
510 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { |
511 | /* tlv320aic3x analog supplies */ | |
5c7d9bbe JN |
512 | REGULATOR_SUPPLY("AVDD", "2-0018"), |
513 | REGULATOR_SUPPLY("DRVDD", "2-0018"), | |
caeeb4aa JN |
514 | REGULATOR_SUPPLY("AVDD", "2-0019"), |
515 | REGULATOR_SUPPLY("DRVDD", "2-0019"), | |
64d06691 JN |
516 | /* tpa6130a2 */ |
517 | REGULATOR_SUPPLY("Vdd", "2-0060"), | |
4cfcaef1 | 518 | /* Keep vmmc as last item. It is not iterated for newer boards */ |
0005ae73 | 519 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), |
4cfcaef1 JN |
520 | }; |
521 | ||
522 | static struct regulator_consumer_supply rx51_vio_supplies[] = { | |
523 | /* tlv320aic3x digital supplies */ | |
5c7d9bbe JN |
524 | REGULATOR_SUPPLY("IOVDD", "2-0018"), |
525 | REGULATOR_SUPPLY("DVDD", "2-0018"), | |
caeeb4aa JN |
526 | REGULATOR_SUPPLY("IOVDD", "2-0019"), |
527 | REGULATOR_SUPPLY("DVDD", "2-0019"), | |
589541c0 JN |
528 | /* Si4713 IO supply */ |
529 | REGULATOR_SUPPLY("vio", "2-0063"), | |
4cfcaef1 JN |
530 | }; |
531 | ||
0581b52e | 532 | static struct regulator_consumer_supply rx51_vaux1_consumers[] = { |
b5b9945b | 533 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), |
589541c0 JN |
534 | /* Si4713 supply */ |
535 | REGULATOR_SUPPLY("vdd", "2-0063"), | |
0581b52e RQ |
536 | }; |
537 | ||
ffe7f95b LL |
538 | static struct regulator_init_data rx51_vaux1 = { |
539 | .constraints = { | |
540 | .name = "V28", | |
541 | .min_uV = 2800000, | |
542 | .max_uV = 2800000, | |
000d534e | 543 | .always_on = true, /* due battery cover sensor */ |
ffe7f95b LL |
544 | .valid_modes_mask = REGULATOR_MODE_NORMAL |
545 | | REGULATOR_MODE_STANDBY, | |
546 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
547 | | REGULATOR_CHANGE_STATUS, | |
548 | }, | |
0581b52e RQ |
549 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers), |
550 | .consumer_supplies = rx51_vaux1_consumers, | |
ffe7f95b LL |
551 | }; |
552 | ||
553 | static struct regulator_init_data rx51_vaux2 = { | |
554 | .constraints = { | |
555 | .name = "VCSI", | |
556 | .min_uV = 1800000, | |
557 | .max_uV = 1800000, | |
558 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
559 | | REGULATOR_MODE_STANDBY, | |
560 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
561 | | REGULATOR_CHANGE_STATUS, | |
562 | }, | |
664a41b8 LT |
563 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply), |
564 | .consumer_supplies = rx51_vaux2_supply, | |
ffe7f95b LL |
565 | }; |
566 | ||
567 | /* VAUX3 - adds more power to VIO_18 rail */ | |
f52eeee8 | 568 | static struct regulator_init_data rx51_vaux3_cam = { |
ffe7f95b LL |
569 | .constraints = { |
570 | .name = "VCAM_DIG_18", | |
571 | .min_uV = 1800000, | |
572 | .max_uV = 1800000, | |
573 | .apply_uV = true, | |
574 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
575 | | REGULATOR_MODE_STANDBY, | |
576 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
577 | | REGULATOR_CHANGE_STATUS, | |
578 | }, | |
579 | }; | |
580 | ||
f52eeee8 AH |
581 | static struct regulator_init_data rx51_vaux3_mmc = { |
582 | .constraints = { | |
583 | .name = "VMMC2_30", | |
584 | .min_uV = 2800000, | |
585 | .max_uV = 3000000, | |
586 | .apply_uV = true, | |
587 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
588 | | REGULATOR_MODE_STANDBY, | |
589 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
590 | | REGULATOR_CHANGE_MODE | |
591 | | REGULATOR_CHANGE_STATUS, | |
592 | }, | |
786b01a8 OD |
593 | .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), |
594 | .consumer_supplies = rx51_vaux3_supply, | |
f52eeee8 AH |
595 | }; |
596 | ||
ffe7f95b LL |
597 | static struct regulator_init_data rx51_vaux4 = { |
598 | .constraints = { | |
599 | .name = "VCAM_ANA_28", | |
600 | .min_uV = 2800000, | |
601 | .max_uV = 2800000, | |
602 | .apply_uV = true, | |
603 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
604 | | REGULATOR_MODE_STANDBY, | |
605 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
606 | | REGULATOR_CHANGE_STATUS, | |
607 | }, | |
608 | }; | |
609 | ||
610 | static struct regulator_init_data rx51_vmmc1 = { | |
611 | .constraints = { | |
612 | .min_uV = 1850000, | |
613 | .max_uV = 3150000, | |
614 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
615 | | REGULATOR_MODE_STANDBY, | |
616 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
617 | | REGULATOR_CHANGE_MODE | |
618 | | REGULATOR_CHANGE_STATUS, | |
619 | }, | |
786b01a8 OD |
620 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), |
621 | .consumer_supplies = rx51_vmmc1_supply, | |
ffe7f95b LL |
622 | }; |
623 | ||
624 | static struct regulator_init_data rx51_vmmc2 = { | |
625 | .constraints = { | |
f2add1de JN |
626 | .name = "V28_A", |
627 | .min_uV = 2800000, | |
628 | .max_uV = 3000000, | |
2827411e | 629 | .always_on = true, /* due VIO leak to AIC34 VDDs */ |
ffe7f95b LL |
630 | .apply_uV = true, |
631 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
632 | | REGULATOR_MODE_STANDBY, | |
633 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
634 | | REGULATOR_CHANGE_MODE | |
635 | | REGULATOR_CHANGE_STATUS, | |
636 | }, | |
4cfcaef1 JN |
637 | .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies), |
638 | .consumer_supplies = rx51_vmmc2_supplies, | |
ffe7f95b LL |
639 | }; |
640 | ||
094fc559 KJ |
641 | static struct regulator_init_data rx51_vpll1 = { |
642 | .constraints = { | |
643 | .name = "VPLL", | |
644 | .min_uV = 1800000, | |
645 | .max_uV = 1800000, | |
646 | .apply_uV = true, | |
647 | .always_on = true, | |
648 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
649 | | REGULATOR_MODE_STANDBY, | |
650 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
651 | }, | |
652 | }; | |
653 | ||
654 | static struct regulator_init_data rx51_vpll2 = { | |
655 | .constraints = { | |
656 | .name = "VSDI_CSI", | |
657 | .min_uV = 1800000, | |
658 | .max_uV = 1800000, | |
659 | .apply_uV = true, | |
660 | .always_on = true, | |
661 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
662 | | REGULATOR_MODE_STANDBY, | |
663 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
664 | }, | |
665 | }; | |
666 | ||
ffe7f95b LL |
667 | static struct regulator_init_data rx51_vsim = { |
668 | .constraints = { | |
669 | .name = "VMMC2_IO_18", | |
670 | .min_uV = 1800000, | |
671 | .max_uV = 1800000, | |
672 | .apply_uV = true, | |
673 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
674 | | REGULATOR_MODE_STANDBY, | |
675 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
676 | | REGULATOR_CHANGE_STATUS, | |
677 | }, | |
786b01a8 OD |
678 | .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), |
679 | .consumer_supplies = rx51_vsim_supply, | |
ffe7f95b LL |
680 | }; |
681 | ||
4cfcaef1 JN |
682 | static struct regulator_init_data rx51_vio = { |
683 | .constraints = { | |
684 | .min_uV = 1800000, | |
685 | .max_uV = 1800000, | |
686 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
687 | | REGULATOR_MODE_STANDBY, | |
688 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
689 | | REGULATOR_CHANGE_MODE | |
690 | | REGULATOR_CHANGE_STATUS, | |
691 | }, | |
692 | .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies), | |
693 | .consumer_supplies = rx51_vio_supplies, | |
694 | }; | |
695 | ||
094fc559 KJ |
696 | static struct regulator_init_data rx51_vintana1 = { |
697 | .constraints = { | |
698 | .name = "VINTANA1", | |
699 | .min_uV = 1500000, | |
700 | .max_uV = 1500000, | |
701 | .always_on = true, | |
702 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
703 | | REGULATOR_MODE_STANDBY, | |
704 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
705 | }, | |
706 | }; | |
707 | ||
708 | static struct regulator_init_data rx51_vintana2 = { | |
709 | .constraints = { | |
710 | .name = "VINTANA2", | |
711 | .min_uV = 2750000, | |
712 | .max_uV = 2750000, | |
713 | .apply_uV = true, | |
714 | .always_on = true, | |
715 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
716 | | REGULATOR_MODE_STANDBY, | |
717 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
718 | }, | |
719 | }; | |
720 | ||
721 | static struct regulator_init_data rx51_vintdig = { | |
722 | .constraints = { | |
723 | .name = "VINTDIG", | |
724 | .min_uV = 1500000, | |
725 | .max_uV = 1500000, | |
726 | .always_on = true, | |
727 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
728 | | REGULATOR_MODE_STANDBY, | |
729 | .valid_ops_mask = REGULATOR_CHANGE_MODE, | |
730 | }, | |
731 | }; | |
732 | ||
589541c0 JN |
733 | static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = { |
734 | .gpio_reset = RX51_FMTX_RESET_GPIO, | |
735 | }; | |
736 | ||
737 | static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = { | |
738 | I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH), | |
739 | .platform_data = &rx51_si4713_i2c_data, | |
740 | }; | |
741 | ||
742 | static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = { | |
743 | .i2c_bus = 2, | |
744 | .subdev_board_info = &rx51_si4713_board_info, | |
745 | }; | |
746 | ||
07ad6ab3 | 747 | static struct platform_device rx51_si4713_dev = { |
589541c0 JN |
748 | .name = "radio-si4713", |
749 | .id = -1, | |
750 | .dev = { | |
751 | .platform_data = &rx51_si4713_data, | |
752 | }, | |
753 | }; | |
754 | ||
755 | static __init void rx51_init_si4713(void) | |
756 | { | |
757 | int err; | |
758 | ||
759 | err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq"); | |
760 | if (err) { | |
761 | printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err); | |
762 | return; | |
763 | } | |
764 | rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ); | |
765 | platform_device_register(&rx51_si4713_dev); | |
766 | } | |
767 | ||
ffe7f95b LL |
768 | static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n) |
769 | { | |
770 | /* FIXME this gpio setup is just a placeholder for now */ | |
bc593f5d | 771 | gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm"); |
c0ad4fac | 772 | gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en"); |
ffe7f95b | 773 | |
ffe7f95b LL |
774 | return 0; |
775 | } | |
776 | ||
777 | static struct twl4030_gpio_platform_data rx51_gpio_data = { | |
778 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
779 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
780 | .irq_end = TWL4030_GPIO_IRQ_END, | |
781 | .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3) | |
782 | | BIT(4) | BIT(5) | |
783 | | BIT(8) | BIT(9) | BIT(10) | BIT(11) | |
784 | | BIT(12) | BIT(13) | BIT(14) | BIT(15) | |
785 | | BIT(16) | BIT(17) , | |
786 | .setup = rx51_twlgpio_setup, | |
787 | }; | |
788 | ||
9312fffb AK |
789 | static struct twl4030_ins sleep_on_seq[] __initdata = { |
790 | /* | |
3c684e84 | 791 | * Turn off everything |
9312fffb | 792 | */ |
3c684e84 | 793 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2}, |
9312fffb AK |
794 | }; |
795 | ||
796 | static struct twl4030_script sleep_on_script __initdata = { | |
797 | .script = sleep_on_seq, | |
798 | .size = ARRAY_SIZE(sleep_on_seq), | |
799 | .flags = TWL4030_SLEEP_SCRIPT, | |
800 | }; | |
801 | ||
802 | static struct twl4030_ins wakeup_seq[] __initdata = { | |
803 | /* | |
3c684e84 | 804 | * Reenable everything |
9312fffb | 805 | */ |
3c684e84 | 806 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
807 | }; |
808 | ||
809 | static struct twl4030_script wakeup_script __initdata = { | |
810 | .script = wakeup_seq, | |
811 | .size = ARRAY_SIZE(wakeup_seq), | |
812 | .flags = TWL4030_WAKEUP12_SCRIPT, | |
813 | }; | |
814 | ||
815 | static struct twl4030_ins wakeup_p3_seq[] __initdata = { | |
816 | /* | |
3c684e84 | 817 | * Reenable everything |
9312fffb | 818 | */ |
3c684e84 | 819 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
820 | }; |
821 | ||
822 | static struct twl4030_script wakeup_p3_script __initdata = { | |
823 | .script = wakeup_p3_seq, | |
824 | .size = ARRAY_SIZE(wakeup_p3_seq), | |
825 | .flags = TWL4030_WAKEUP3_SCRIPT, | |
826 | }; | |
827 | ||
828 | static struct twl4030_ins wrst_seq[] __initdata = { | |
829 | /* | |
830 | * Reset twl4030. | |
831 | * Reset VDD1 regulator. | |
832 | * Reset VDD2 regulator. | |
833 | * Reset VPLL1 regulator. | |
834 | * Enable sysclk output. | |
835 | * Reenable twl4030. | |
836 | */ | |
837 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2}, | |
838 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE), | |
839 | 0x13}, | |
9312fffb AK |
840 | {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13}, |
841 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13}, | |
842 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13}, | |
843 | {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35}, | |
3c684e84 | 844 | {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2}, |
9312fffb AK |
845 | {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2}, |
846 | }; | |
847 | ||
848 | static struct twl4030_script wrst_script __initdata = { | |
849 | .script = wrst_seq, | |
850 | .size = ARRAY_SIZE(wrst_seq), | |
851 | .flags = TWL4030_WRST_SCRIPT, | |
852 | }; | |
853 | ||
854 | static struct twl4030_script *twl4030_scripts[] __initdata = { | |
855 | /* wakeup12 script should be loaded before sleep script, otherwise a | |
856 | board might hit retention before loading of wakeup script is | |
857 | completed. This can cause boot failures depending on timing issues. | |
858 | */ | |
859 | &wakeup_script, | |
860 | &sleep_on_script, | |
861 | &wakeup_p3_script, | |
862 | &wrst_script, | |
863 | }; | |
864 | ||
865 | static struct twl4030_resconfig twl4030_rconfig[] __initdata = { | |
3c684e84 AK |
866 | { .resource = RES_VDD1, .devgroup = -1, |
867 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
868 | .remap_sleep = RES_STATE_OFF | |
869 | }, | |
870 | { .resource = RES_VDD2, .devgroup = -1, | |
871 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
872 | .remap_sleep = RES_STATE_OFF | |
873 | }, | |
874 | { .resource = RES_VPLL1, .devgroup = -1, | |
875 | .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF, | |
876 | .remap_sleep = RES_STATE_OFF | |
877 | }, | |
878 | { .resource = RES_VPLL2, .devgroup = -1, | |
879 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
880 | }, | |
881 | { .resource = RES_VAUX1, .devgroup = -1, | |
882 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
883 | }, | |
884 | { .resource = RES_VAUX2, .devgroup = -1, | |
885 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
886 | }, | |
887 | { .resource = RES_VAUX3, .devgroup = -1, | |
888 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
889 | }, | |
890 | { .resource = RES_VAUX4, .devgroup = -1, | |
891 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
892 | }, | |
893 | { .resource = RES_VMMC1, .devgroup = -1, | |
894 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
895 | }, | |
896 | { .resource = RES_VMMC2, .devgroup = -1, | |
897 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
898 | }, | |
899 | { .resource = RES_VDAC, .devgroup = -1, | |
900 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
901 | }, | |
902 | { .resource = RES_VSIM, .devgroup = -1, | |
903 | .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1 | |
904 | }, | |
905 | { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
906 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
907 | }, | |
908 | { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
909 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
910 | }, | |
911 | { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
912 | .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
913 | }, | |
914 | { .resource = RES_VIO, .devgroup = DEV_GRP_P3, | |
915 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
916 | }, | |
917 | { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
918 | .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1 | |
919 | }, | |
920 | { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
921 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
922 | }, | |
923 | { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
924 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
925 | }, | |
926 | { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3, | |
927 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
928 | }, | |
929 | { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, | |
930 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
931 | }, | |
932 | { .resource = RES_32KCLKOUT, .devgroup = -1, | |
933 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
934 | }, | |
935 | { .resource = RES_RESET, .devgroup = -1, | |
936 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 | |
937 | }, | |
d7ac829f | 938 | { .resource = RES_MAIN_REF, .devgroup = -1, |
3c684e84 AK |
939 | .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1 |
940 | }, | |
9312fffb AK |
941 | { 0, 0}, |
942 | }; | |
943 | ||
944 | static struct twl4030_power_data rx51_t2scripts_data __initdata = { | |
945 | .scripts = twl4030_scripts, | |
946 | .num = ARRAY_SIZE(twl4030_scripts), | |
947 | .resource_config = twl4030_rconfig, | |
948 | }; | |
949 | ||
8c3d4534 | 950 | static struct twl4030_vibra_data rx51_vibra_data __initdata = { |
b7a834cc IK |
951 | .coexist = 0, |
952 | }; | |
953 | ||
8c3d4534 | 954 | static struct twl4030_audio_data rx51_audio_data __initdata = { |
b7a834cc IK |
955 | .audio_mclk = 26000000, |
956 | .vibra = &rx51_vibra_data, | |
957 | }; | |
9312fffb | 958 | |
9312fffb | 959 | static struct twl4030_platform_data rx51_twldata __initdata = { |
ffe7f95b LL |
960 | /* platform_data for children goes here */ |
961 | .gpio = &rx51_gpio_data, | |
962 | .keypad = &rx51_kp_data, | |
9312fffb | 963 | .power = &rx51_t2scripts_data, |
4ae6df5e | 964 | .audio = &rx51_audio_data, |
ffe7f95b LL |
965 | |
966 | .vaux1 = &rx51_vaux1, | |
967 | .vaux2 = &rx51_vaux2, | |
ffe7f95b LL |
968 | .vaux4 = &rx51_vaux4, |
969 | .vmmc1 = &rx51_vmmc1, | |
094fc559 KJ |
970 | .vpll1 = &rx51_vpll1, |
971 | .vpll2 = &rx51_vpll2, | |
ffe7f95b | 972 | .vsim = &rx51_vsim, |
094fc559 KJ |
973 | .vintana1 = &rx51_vintana1, |
974 | .vintana2 = &rx51_vintana2, | |
975 | .vintdig = &rx51_vintdig, | |
4cfcaef1 | 976 | .vio = &rx51_vio, |
ffe7f95b LL |
977 | }; |
978 | ||
f0c61d3d | 979 | static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = { |
64d06691 JN |
980 | .power_gpio = 98, |
981 | }; | |
982 | ||
f0fba2ad LG |
983 | /* Audio setup data */ |
984 | static struct aic3x_setup_data rx51_aic34_setup = { | |
985 | .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED, | |
986 | .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT, | |
987 | }; | |
988 | ||
e4862f2f | 989 | static struct aic3x_pdata rx51_aic3x_data = { |
f0fba2ad LG |
990 | .setup = &rx51_aic34_setup, |
991 | .gpio_reset = 60, | |
992 | }; | |
993 | ||
caeeb4aa JN |
994 | static struct aic3x_pdata rx51_aic3x_data2 = { |
995 | .gpio_reset = 60, | |
996 | }; | |
997 | ||
dabe929b JN |
998 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = { |
999 | { | |
1000 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
87581fd4 | 1001 | .platform_data = &rx51_aic3x_data, |
dabe929b | 1002 | }, |
caeeb4aa JN |
1003 | { |
1004 | I2C_BOARD_INFO("tlv320aic3x", 0x19), | |
1005 | .platform_data = &rx51_aic3x_data2, | |
1006 | }, | |
70b5d737 MN |
1007 | #if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE) |
1008 | { | |
1009 | I2C_BOARD_INFO("tsl2563", 0x29), | |
1010 | .platform_data = &rx51_tsl2563_platform_data, | |
1011 | }, | |
eeada9e8 AP |
1012 | #endif |
1013 | #if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE) | |
1014 | { | |
1015 | I2C_BOARD_INFO("lp5523", 0x32), | |
1016 | .platform_data = &rx51_lp5523_platform_data, | |
1017 | }, | |
70b5d737 | 1018 | #endif |
d77711aa PR |
1019 | { |
1020 | I2C_BOARD_INFO("bq27200", 0x55), | |
1021 | }, | |
64d06691 JN |
1022 | { |
1023 | I2C_BOARD_INFO("tpa6130a2", 0x60), | |
1024 | .platform_data = &rx51_tpa6130a2_data, | |
1025 | } | |
dabe929b JN |
1026 | }; |
1027 | ||
3b511201 AP |
1028 | static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = { |
1029 | #if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE) | |
1030 | { | |
1031 | I2C_BOARD_INFO("lis3lv02d", 0x1d), | |
1032 | .platform_data = &rx51_lis3lv02d_data, | |
1033 | .irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO), | |
1034 | }, | |
1035 | #endif | |
1036 | }; | |
1037 | ||
ffe7f95b LL |
1038 | static int __init rx51_i2c_init(void) |
1039 | { | |
f52eeee8 | 1040 | if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) || |
4cfcaef1 | 1041 | system_rev >= SYSTEM_REV_B_USES_VAUX3) { |
f52eeee8 | 1042 | rx51_twldata.vaux3 = &rx51_vaux3_mmc; |
4cfcaef1 JN |
1043 | /* Only older boards use VMMC2 for internal MMC */ |
1044 | rx51_vmmc2.num_consumer_supplies--; | |
1045 | } else { | |
f52eeee8 | 1046 | rx51_twldata.vaux3 = &rx51_vaux3_cam; |
f52eeee8 | 1047 | } |
4cfcaef1 | 1048 | rx51_twldata.vmmc2 = &rx51_vmmc2; |
827ed9ae | 1049 | omap3_pmic_get_config(&rx51_twldata, |
b252b0ef PU |
1050 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, |
1051 | TWL_COMMON_REGULATOR_VDAC); | |
1052 | ||
1053 | rx51_twldata.vdac->constraints.apply_uV = true; | |
1054 | rx51_twldata.vdac->constraints.name = "VDAC"; | |
1055 | ||
fbd8071c | 1056 | omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); |
dabe929b JN |
1057 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, |
1058 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | |
3b511201 AP |
1059 | omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3, |
1060 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_3)); | |
ffe7f95b LL |
1061 | return 0; |
1062 | } | |
1063 | ||
aa62e90f JY |
1064 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
1065 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
1066 | ||
1067 | static struct mtd_partition onenand_partitions[] = { | |
1068 | { | |
1069 | .name = "bootloader", | |
1070 | .offset = 0, | |
1071 | .size = 0x20000, | |
1072 | .mask_flags = MTD_WRITEABLE, /* Force read-only */ | |
1073 | }, | |
1074 | { | |
1075 | .name = "config", | |
1076 | .offset = MTDPART_OFS_APPEND, | |
1077 | .size = 0x60000, | |
1078 | }, | |
1079 | { | |
1080 | .name = "log", | |
1081 | .offset = MTDPART_OFS_APPEND, | |
1082 | .size = 0x40000, | |
1083 | }, | |
1084 | { | |
1085 | .name = "kernel", | |
1086 | .offset = MTDPART_OFS_APPEND, | |
1087 | .size = 0x200000, | |
1088 | }, | |
1089 | { | |
1090 | .name = "initfs", | |
1091 | .offset = MTDPART_OFS_APPEND, | |
1092 | .size = 0x200000, | |
1093 | }, | |
1094 | { | |
1095 | .name = "rootfs", | |
1096 | .offset = MTDPART_OFS_APPEND, | |
1097 | .size = MTDPART_SIZ_FULL, | |
1098 | }, | |
1099 | }; | |
1100 | ||
5403187f AK |
1101 | static struct omap_onenand_platform_data board_onenand_data[] = { |
1102 | { | |
1103 | .cs = 0, | |
1104 | .gpio_irq = 65, | |
1105 | .parts = onenand_partitions, | |
1106 | .nr_parts = ARRAY_SIZE(onenand_partitions), | |
1107 | .flags = ONENAND_SYNC_READWRITE, | |
1108 | } | |
aa62e90f | 1109 | }; |
aa62e90f | 1110 | #endif |
ffe7f95b | 1111 | |
1a48e157 TL |
1112 | #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE) |
1113 | ||
1114 | static struct omap_smc91x_platform_data board_smc91x_data = { | |
1115 | .cs = 1, | |
1116 | .gpio_irq = 54, | |
1117 | .gpio_pwrdwn = 86, | |
1118 | .gpio_reset = 164, | |
1119 | .flags = GPMC_TIMINGS_SMC91C96 | IORESOURCE_IRQ_HIGHLEVEL, | |
1120 | }; | |
1121 | ||
1122 | static void __init board_smc91x_init(void) | |
1123 | { | |
4896e394 TL |
1124 | omap_mux_init_gpio(54, OMAP_PIN_INPUT_PULLDOWN); |
1125 | omap_mux_init_gpio(86, OMAP_PIN_OUTPUT); | |
1126 | omap_mux_init_gpio(164, OMAP_PIN_OUTPUT); | |
1a48e157 TL |
1127 | |
1128 | gpmc_smc91x_init(&board_smc91x_data); | |
1129 | } | |
1130 | ||
1131 | #else | |
1132 | ||
1133 | static inline void board_smc91x_init(void) | |
1134 | { | |
1135 | } | |
1136 | ||
1137 | #endif | |
1138 | ||
a24e61a9 KV |
1139 | static void rx51_wl1251_set_power(bool enable) |
1140 | { | |
1141 | gpio_set_value(RX51_WL1251_POWER_GPIO, enable); | |
1142 | } | |
1143 | ||
bc593f5d IG |
1144 | static struct gpio rx51_wl1251_gpios[] __initdata = { |
1145 | { RX51_WL1251_POWER_GPIO, GPIOF_OUT_INIT_LOW, "wl1251 power" }, | |
1146 | { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" }, | |
1147 | }; | |
1148 | ||
a24e61a9 KV |
1149 | static void __init rx51_init_wl1251(void) |
1150 | { | |
1151 | int irq, ret; | |
1152 | ||
bc593f5d IG |
1153 | ret = gpio_request_array(rx51_wl1251_gpios, |
1154 | ARRAY_SIZE(rx51_wl1251_gpios)); | |
a24e61a9 KV |
1155 | if (ret < 0) |
1156 | goto error; | |
1157 | ||
a24e61a9 KV |
1158 | irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO); |
1159 | if (irq < 0) | |
1160 | goto err_irq; | |
1161 | ||
1162 | wl1251_pdata.set_power = rx51_wl1251_set_power; | |
1163 | rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq; | |
1164 | ||
1165 | return; | |
1166 | ||
1167 | err_irq: | |
1168 | gpio_free(RX51_WL1251_IRQ_GPIO); | |
a24e61a9 | 1169 | gpio_free(RX51_WL1251_POWER_GPIO); |
a24e61a9 KV |
1170 | error: |
1171 | printk(KERN_ERR "wl1251 board initialisation failed\n"); | |
1172 | wl1251_pdata.set_power = NULL; | |
1173 | ||
1174 | /* | |
1175 | * Now rx51_peripherals_spi_board_info[1].irq is zero and | |
1176 | * set_power is null, and wl1251_probe() will fail. | |
1177 | */ | |
1178 | } | |
1179 | ||
3dad5356 AK |
1180 | static struct tsc2005_platform_data tsc2005_pdata = { |
1181 | .ts_pressure_max = 2048, | |
1182 | .ts_pressure_fudge = 2, | |
1183 | .ts_x_max = 4096, | |
1184 | .ts_x_fudge = 4, | |
1185 | .ts_y_max = 4096, | |
1186 | .ts_y_fudge = 7, | |
1187 | .ts_x_plate_ohm = 280, | |
1188 | .esd_timeout_ms = 8000, | |
1189 | }; | |
1190 | ||
d4860ebe VZ |
1191 | static struct gpio rx51_tsc2005_gpios[] __initdata = { |
1192 | { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" }, | |
1193 | { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" }, | |
1194 | }; | |
1195 | ||
3dad5356 AK |
1196 | static void rx51_tsc2005_set_reset(bool enable) |
1197 | { | |
1198 | gpio_set_value(RX51_TSC2005_RESET_GPIO, enable); | |
1199 | } | |
1200 | ||
1201 | static void __init rx51_init_tsc2005(void) | |
1202 | { | |
1203 | int r; | |
1204 | ||
d4860ebe VZ |
1205 | omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT); |
1206 | omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP); | |
3dad5356 | 1207 | |
d4860ebe VZ |
1208 | r = gpio_request_array(rx51_tsc2005_gpios, |
1209 | ARRAY_SIZE(rx51_tsc2005_gpios)); | |
1210 | if (r < 0) { | |
1211 | printk(KERN_ERR "tsc2005 board initialization failed\n"); | |
3dad5356 | 1212 | tsc2005_pdata.esd_timeout_ms = 0; |
d4860ebe | 1213 | return; |
3dad5356 | 1214 | } |
d4860ebe VZ |
1215 | |
1216 | tsc2005_pdata.set_reset = rx51_tsc2005_set_reset; | |
2533c2cf TL |
1217 | rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq = |
1218 | gpio_to_irq(RX51_TSC2005_IRQ_GPIO); | |
3dad5356 AK |
1219 | } |
1220 | ||
ffe7f95b LL |
1221 | void __init rx51_peripherals_init(void) |
1222 | { | |
ffe7f95b | 1223 | rx51_i2c_init(); |
094fc559 | 1224 | regulator_has_full_constraints(); |
5403187f | 1225 | gpmc_onenand_init(board_onenand_data); |
1a48e157 | 1226 | board_smc91x_init(); |
f014ee32 | 1227 | rx51_add_gpio_keys(); |
a24e61a9 | 1228 | rx51_init_wl1251(); |
3dad5356 | 1229 | rx51_init_tsc2005(); |
589541c0 | 1230 | rx51_init_si4713(); |
a24e61a9 KV |
1231 | spi_register_board_info(rx51_peripherals_spi_board_info, |
1232 | ARRAY_SIZE(rx51_peripherals_spi_board_info)); | |
112485e9 BC |
1233 | |
1234 | partition = omap_mux_get("core"); | |
1235 | if (partition) | |
3b972bf0 | 1236 | omap_hsmmc_init(mmc); |
112485e9 | 1237 | |
10299e2e | 1238 | rx51_charger_init(); |
ffe7f95b LL |
1239 | } |
1240 |