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ARM: OMAP2+: Prepare to move GPMC to drivers by platform data header
[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-omap2 / board-rx51-peripherals.c
CommitLineData
ffe7f95b 1/*
9312fffb 2 * linux/arch/arm/mach-omap2/board-rx51-peripherals.c
ffe7f95b
LL		 3 *
4 * Copyright (C) 2008-2009 Nokia
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/input.h>
6135434a 15#include <linux/input/matrix_keypad.h>
ffe7f95b 16#include <linux/spi/spi.h>
c1f9a095 17#include <linux/wl12xx.h>
3dad5356 18#include <linux/spi/tsc2005.h>
ffe7f95b 19#include <linux/i2c.h>
ebeb53e1 20#include <linux/i2c/twl.h>
ffe7f95b
LL		 21#include <linux/clk.h>
22#include <linux/delay.h>
23#include <linux/regulator/machine.h>
24#include <linux/gpio.h>
f014ee32 25#include <linux/gpio_keys.h>
e639cd5b 26#include <linux/omap-gpmc.h>
5e763d29 27#include <linux/mmc/host.h>
10299e2e 28#include <linux/power/isp1704_charger.h>
2203747c
AB		 29#include <linux/platform_data/spi-omap2-mcspi.h>
30#include <linux/platform_data/mtd-onenand-omap2.h>
31
9f97da78 32#include <asm/system_info.h>
ffe7f95b 33
4e65331c 34#include "common.h"
45c3eb7d 35#include <linux/omap-dma.h>
ffe7f95b 36
0a6f98c9 37#include "board-rx51.h"
04aeae77 38
87581fd4 39#include <sound/tlv320aic3x.h>
64d06691 40#include <sound/tpa6130a2-plat.h>
589541c0
JN		 41#include <media/radio-si4713.h>
42#include <media/si4713.h>
df4094d2 43#include <linux/platform_data/leds-lp55xx.h>
87581fd4 44
9c2251dd 45#include <linux/platform_data/tsl2563.h>
3b511201 46#include <linux/lis3lv02d.h>
70b5d737 47
2320dc6f
TV		 48#include <video/omap-panel-data.h>
49
322c183c
TK		 50#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
51#include <media/ir-rx51.h>
52#endif
53
4896e394 54#include "mux.h"
1d5aef49 55#include "omap-pm.h"
d02a900b 56#include "hsmmc.h"
fbd8071c 57#include "common-board-devices.h"
d2065e2b
PR		 58#include "soc.h"
59#include "omap-secure.h"
ffe7f95b 60
f52eeee8
AH		 61#define SYSTEM_REV_B_USES_VAUX3 0x1699
62#define SYSTEM_REV_S_USES_VAUX3 0x8
63
a24e61a9
KV		 64#define RX51_WL1251_POWER_GPIO 87
65#define RX51_WL1251_IRQ_GPIO 42
589541c0
JN		 66#define RX51_FMTX_RESET_GPIO 163
67#define RX51_FMTX_IRQ 53
eeada9e8 68#define RX51_LP5523_CHIP_EN_GPIO 41
a24e61a9 69
10299e2e
KJ		 70#define RX51_USB_TRANSCEIVER_RST_GPIO 67
71
3dad5356
AK		 72#define RX51_TSC2005_RESET_GPIO 104
73#define RX51_TSC2005_IRQ_GPIO 100
74
3b511201
AP		 75#define LIS302_IRQ1_GPIO 181
76#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
77
e65f131a 78/* List all SPI devices here. Note that the list/probe order seems to matter! */
a24e61a9
KV		 79enum {
80 RX51_SPI_WL1251,
6996e7ff 81 RX51_SPI_TSC2005, /* Touch Controller */
e65f131a 82 RX51_SPI_MIPID, /* LCD panel */
a24e61a9
KV		 83};
84
946651cb 85static struct wl1251_platform_data wl1251_pdata;
3dad5356 86static struct tsc2005_platform_data tsc2005_pdata;
a24e61a9 87
3b511201
AP		 88#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
89static int lis302_setup(void)
90{
91 int err;
92 int irq1 = LIS302_IRQ1_GPIO;
93 int irq2 = LIS302_IRQ2_GPIO;
94
95 /* gpio for interrupt pin 1 */
96 err = gpio_request(irq1, "lis3lv02dl_irq1");
97 if (err) {
98 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
99 goto out;
100 }
101
102 /* gpio for interrupt pin 2 */
103 err = gpio_request(irq2, "lis3lv02dl_irq2");
104 if (err) {
105 gpio_free(irq1);
106 printk(KERN_ERR "lis3lv02dl: gpio request failed\n");
107 goto out;
108 }
109
110 gpio_direction_input(irq1);
111 gpio_direction_input(irq2);
112
113out:
114 return err;
115}
116
117static int lis302_release(void)
118{
119 gpio_free(LIS302_IRQ1_GPIO);
120 gpio_free(LIS302_IRQ2_GPIO);
121
122 return 0;
123}
124
125static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
126 .click_flags = LIS3_CLICK_SINGLE_X | LIS3_CLICK_SINGLE_Y |
127 LIS3_CLICK_SINGLE_Z,
128 /* Limits are 0.5g * value */
129 .click_thresh_x = 8,
130 .click_thresh_y = 8,
131 .click_thresh_z = 10,
132 /* Click must be longer than time limit */
133 .click_time_limit = 9,
134 /* Kind of debounce filter */
135 .click_latency = 50,
136
137 /* Limits for all axis. millig-value / 18 to get HW values */
138 .wakeup_flags = LIS3_WAKEUP_X_HI | LIS3_WAKEUP_Y_HI,
139 .wakeup_thresh = 800 / 18,
140 .wakeup_flags2 = LIS3_WAKEUP_Z_HI ,
141 .wakeup_thresh2 = 900 / 18,
142
143 .hipass_ctrl = LIS3_HIPASS1_DISABLE | LIS3_HIPASS2_DISABLE,
144
145 /* Interrupt line 2 for click detection, line 1 for thresholds */
146 .irq_cfg = LIS3_IRQ2_CLICK | LIS3_IRQ1_FF_WU_12,
147
148 .axis_x = LIS3_DEV_X,
149 .axis_y = LIS3_INV_DEV_Y,
150 .axis_z = LIS3_INV_DEV_Z,
151 .setup_resources = lis302_setup,
152 .release_resources = lis302_release,
153 .st_min_limits = {-32, 3, 3},
154 .st_max_limits = {-3, 32, 32},
3b511201
AP		 155};
156#endif
157
70b5d737
MN		 158#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
159static struct tsl2563_platform_data rx51_tsl2563_platform_data = {
160 .cover_comp_gain = 16,
161};
162#endif
163
eeada9e8 164#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
df4094d2 165static struct lp55xx_led_config rx51_lp5523_led_config[] = {
eeada9e8 166 {
1e7bf5e3 167 .name = "lp5523:kb1",
eeada9e8
AP		 168 .chan_nr = 0,
169 .led_current = 50,
d1f1ca36 170 .max_current = 100,
eeada9e8 171 }, {
1e7bf5e3 172 .name = "lp5523:kb2",
eeada9e8
AP		 173 .chan_nr = 1,
174 .led_current = 50,
d1f1ca36 175 .max_current = 100,
eeada9e8 176 }, {
1e7bf5e3 177 .name = "lp5523:kb3",
eeada9e8
AP		 178 .chan_nr = 2,
179 .led_current = 50,
d1f1ca36 180 .max_current = 100,
eeada9e8 181 }, {
1e7bf5e3 182 .name = "lp5523:kb4",
eeada9e8
AP		 183 .chan_nr = 3,
184 .led_current = 50,
d1f1ca36 185 .max_current = 100,
eeada9e8 186 }, {
1e7bf5e3 187 .name = "lp5523:b",
eeada9e8
AP		 188 .chan_nr = 4,
189 .led_current = 50,
d1f1ca36 190 .max_current = 100,
eeada9e8 191 }, {
1e7bf5e3 192 .name = "lp5523:g",
eeada9e8
AP		 193 .chan_nr = 5,
194 .led_current = 50,
d1f1ca36 195 .max_current = 100,
eeada9e8 196 }, {
1e7bf5e3 197 .name = "lp5523:r",
eeada9e8
AP		 198 .chan_nr = 6,
199 .led_current = 50,
d1f1ca36 200 .max_current = 100,
eeada9e8 201 }, {
1e7bf5e3 202 .name = "lp5523:kb5",
eeada9e8
AP		 203 .chan_nr = 7,
204 .led_current = 50,
d1f1ca36 205 .max_current = 100,
eeada9e8 206 }, {
1e7bf5e3 207 .name = "lp5523:kb6",
eeada9e8
AP		 208 .chan_nr = 8,
209 .led_current = 50,
d1f1ca36 210 .max_current = 100,
eeada9e8
AP		 211 }
212};
213
df4094d2 214static struct lp55xx_platform_data rx51_lp5523_platform_data = {
eeada9e8
AP		 215 .led_config = rx51_lp5523_led_config,
216 .num_channels = ARRAY_SIZE(rx51_lp5523_led_config),
df4094d2 217 .clock_mode = LP55XX_CLOCK_AUTO,
30dae2f9 218 .enable_gpio = RX51_LP5523_CHIP_EN_GPIO,
eeada9e8
AP		 219};
220#endif
221
2320dc6f
TV		 222#define RX51_LCD_RESET_GPIO 90
223
224static struct panel_acx565akm_platform_data acx_pdata = {
225 .name = "lcd",
226 .source = "sdi.0",
227 .reset_gpio = RX51_LCD_RESET_GPIO,
228 .datapairs = 2,
229};
230
a24e61a9
KV		 231static struct omap2_mcspi_device_config wl1251_mcspi_config = {
232 .turbo_mode = 0,
a24e61a9
KV		 233};
234
03e11104
RQ		 235static struct omap2_mcspi_device_config mipid_mcspi_config = {
236 .turbo_mode = 0,
03e11104
RQ		 237};
238
6996e7ff
RQ		 239static struct omap2_mcspi_device_config tsc2005_mcspi_config = {
240 .turbo_mode = 0,
6996e7ff
RQ		 241};
242
a24e61a9
KV		 243static struct spi_board_info rx51_peripherals_spi_board_info[] __initdata = {
244 [RX51_SPI_WL1251] = {
245 .modalias = "wl1251",
246 .bus_num = 4,
247 .chip_select = 0,
248 .max_speed_hz = 48000000,
860fc976 249 .mode = SPI_MODE_3,
a24e61a9
KV		 250 .controller_data = &wl1251_mcspi_config,
251 .platform_data = &wl1251_pdata,
252 },
03e11104
RQ		 253 [RX51_SPI_MIPID] = {
254 .modalias = "acx565akm",
255 .bus_num = 1,
256 .chip_select = 2,
257 .max_speed_hz = 6000000,
258 .controller_data = &mipid_mcspi_config,
2320dc6f 259 .platform_data = &acx_pdata,
03e11104 260 },
6996e7ff
RQ		 261 [RX51_SPI_TSC2005] = {
262 .modalias = "tsc2005",
263 .bus_num = 1,
264 .chip_select = 0,
6996e7ff
RQ		 265 .max_speed_hz = 6000000,
266 .controller_data = &tsc2005_mcspi_config,
3dad5356 267 .platform_data = &tsc2005_pdata,
6996e7ff 268 },
a24e61a9
KV		 269};
270
7605c0b0
PR		 271static struct platform_device rx51_battery_device = {
272 .name = "rx51-battery",
273 .id = -1,
274};
275
10299e2e
KJ		 276static void rx51_charger_set_power(bool on)
277{
278 gpio_set_value(RX51_USB_TRANSCEIVER_RST_GPIO, on);
279}
280
281static struct isp1704_charger_data rx51_charger_data = {
282 .set_power = rx51_charger_set_power,
283};
284
fd0964c5 285static struct platform_device rx51_charger_device = {
10299e2e
KJ		 286 .name = "isp1704_charger",
287 .dev = {
288 .platform_data = &rx51_charger_data,
289 },
fd0964c5
HK		 290};
291
10299e2e
KJ		 292static void __init rx51_charger_init(void)
293{
294 WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
e5fe29c7 295 GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
10299e2e 296
7605c0b0 297 platform_device_register(&rx51_battery_device);
10299e2e
KJ		 298 platform_device_register(&rx51_charger_device);
299}
300
f014ee32
JN		 301#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
302
303#define RX51_GPIO_CAMERA_LENS_COVER 110
304#define RX51_GPIO_CAMERA_FOCUS 68
305#define RX51_GPIO_CAMERA_CAPTURE 69
306#define RX51_GPIO_KEYPAD_SLIDE 71
307#define RX51_GPIO_LOCK_BUTTON 113
308#define RX51_GPIO_PROXIMITY 89
309
310#define RX51_GPIO_DEBOUNCE_TIMEOUT 10
311
312static struct gpio_keys_button rx51_gpio_keys[] = {
313 {
314 .desc = "Camera Lens Cover",
315 .type = EV_SW,
316 .code = SW_CAMERA_LENS_COVER,
317 .gpio = RX51_GPIO_CAMERA_LENS_COVER,
318 .active_low = 1,
319 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
320 }, {
321 .desc = "Camera Focus",
322 .type = EV_KEY,
323 .code = KEY_CAMERA_FOCUS,
324 .gpio = RX51_GPIO_CAMERA_FOCUS,
325 .active_low = 1,
326 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
327 }, {
328 .desc = "Camera Capture",
329 .type = EV_KEY,
330 .code = KEY_CAMERA,
331 .gpio = RX51_GPIO_CAMERA_CAPTURE,
332 .active_low = 1,
333 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
334 }, {
335 .desc = "Lock Button",
336 .type = EV_KEY,
337 .code = KEY_SCREENLOCK,
338 .gpio = RX51_GPIO_LOCK_BUTTON,
339 .active_low = 1,
340 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
341 }, {
342 .desc = "Keypad Slide",
343 .type = EV_SW,
344 .code = SW_KEYPAD_SLIDE,
345 .gpio = RX51_GPIO_KEYPAD_SLIDE,
346 .active_low = 1,
347 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
348 }, {
349 .desc = "Proximity Sensor",
350 .type = EV_SW,
351 .code = SW_FRONT_PROXIMITY,
352 .gpio = RX51_GPIO_PROXIMITY,
353 .active_low = 0,
354 .debounce_interval = RX51_GPIO_DEBOUNCE_TIMEOUT,
355 }
356};
357
358static struct gpio_keys_platform_data rx51_gpio_keys_data = {
359 .buttons = rx51_gpio_keys,
360 .nbuttons = ARRAY_SIZE(rx51_gpio_keys),
361};
362
363static struct platform_device rx51_gpio_keys_device = {
364 .name = "gpio-keys",
365 .id = -1,
366 .dev = {
367 .platform_data = &rx51_gpio_keys_data,
368 },
369};
370
371static void __init rx51_add_gpio_keys(void)
372{
373 platform_device_register(&rx51_gpio_keys_device);
374}
375#else
376static void __init rx51_add_gpio_keys(void)
377{
378}
379#endif /* CONFIG_KEYBOARD_GPIO || CONFIG_KEYBOARD_GPIO_MODULE */
380
bead4375 381static uint32_t board_keymap[] = {
3fea6026
DT		 382 /*
383 * Note that KEY(x, 8, KEY_XXX) entries represent "entrire row
384 * connected to the ground" matrix state.
385 */
ffe7f95b 386 KEY(0, 0, KEY_Q),
acf442dc
AK		 387 KEY(0, 1, KEY_O),
388 KEY(0, 2, KEY_P),
389 KEY(0, 3, KEY_COMMA),
390 KEY(0, 4, KEY_BACKSPACE),
391 KEY(0, 6, KEY_A),
392 KEY(0, 7, KEY_S),
3fea6026 393
acf442dc 394 KEY(1, 0, KEY_W),
ffe7f95b 395 KEY(1, 1, KEY_D),
acf442dc
AK		 396 KEY(1, 2, KEY_F),
397 KEY(1, 3, KEY_G),
398 KEY(1, 4, KEY_H),
399 KEY(1, 5, KEY_J),
400 KEY(1, 6, KEY_K),
401 KEY(1, 7, KEY_L),
3fea6026 402
acf442dc
AK		 403 KEY(2, 0, KEY_E),
404 KEY(2, 1, KEY_DOT),
ffe7f95b 405 KEY(2, 2, KEY_UP),
acf442dc
AK		 406 KEY(2, 3, KEY_ENTER),
407 KEY(2, 5, KEY_Z),
408 KEY(2, 6, KEY_X),
409 KEY(2, 7, KEY_C),
3fea6026
DT		 410 KEY(2, 8, KEY_F9),
411
acf442dc
AK		 412 KEY(3, 0, KEY_R),
413 KEY(3, 1, KEY_V),
414 KEY(3, 2, KEY_B),
ffe7f95b 415 KEY(3, 3, KEY_N),
acf442dc
AK		 416 KEY(3, 4, KEY_M),
417 KEY(3, 5, KEY_SPACE),
418 KEY(3, 6, KEY_SPACE),
419 KEY(3, 7, KEY_LEFT),
3fea6026 420
acf442dc
AK		 421 KEY(4, 0, KEY_T),
422 KEY(4, 1, KEY_DOWN),
423 KEY(4, 2, KEY_RIGHT),
ffe7f95b 424 KEY(4, 4, KEY_LEFTCTRL),
acf442dc
AK		 425 KEY(4, 5, KEY_RIGHTALT),
426 KEY(4, 6, KEY_LEFTSHIFT),
2e65a207 427 KEY(4, 8, KEY_F10),
3fea6026 428
acf442dc 429 KEY(5, 0, KEY_Y),
2e65a207 430 KEY(5, 8, KEY_F11),
3fea6026 431
acf442dc 432 KEY(6, 0, KEY_U),
3fea6026 433
acf442dc
AK		 434 KEY(7, 0, KEY_I),
435 KEY(7, 1, KEY_F7),
436 KEY(7, 2, KEY_F8),
ffe7f95b
LL		 437};
438
4f543332
TL		 439static struct matrix_keymap_data board_map_data = {
440 .keymap = board_keymap,
441 .keymap_size = ARRAY_SIZE(board_keymap),
442};
443
ffe7f95b 444static struct twl4030_keypad_data rx51_kp_data = {
4f543332 445 .keymap_data = &board_map_data,
ffe7f95b
LL		 446 .rows = 8,
447 .cols = 8,
ffe7f95b
LL		 448 .rep = 1,
449};
450
ce6f0016
AH		 451/* Enable input logic and pull all lines up when eMMC is on. */
452static struct omap_board_mux rx51_mmc2_on_mux[] = {
453 OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
454 OMAP3_MUX(SDMMC2_DAT0, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
455 OMAP3_MUX(SDMMC2_DAT1, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
456 OMAP3_MUX(SDMMC2_DAT2, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
457 OMAP3_MUX(SDMMC2_DAT3, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
458 OMAP3_MUX(SDMMC2_DAT4, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
459 OMAP3_MUX(SDMMC2_DAT5, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
460 OMAP3_MUX(SDMMC2_DAT6, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
461 OMAP3_MUX(SDMMC2_DAT7, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
462 { .reg_offset = OMAP_MUX_TERMINATOR },
463};
464
465/* Disable input logic and pull all lines down when eMMC is off. */
466static struct omap_board_mux rx51_mmc2_off_mux[] = {
467 OMAP3_MUX(SDMMC2_CMD, OMAP_PULL_ENA | OMAP_MUX_MODE0),
468 OMAP3_MUX(SDMMC2_DAT0, OMAP_PULL_ENA | OMAP_MUX_MODE0),
469 OMAP3_MUX(SDMMC2_DAT1, OMAP_PULL_ENA | OMAP_MUX_MODE0),
470 OMAP3_MUX(SDMMC2_DAT2, OMAP_PULL_ENA | OMAP_MUX_MODE0),
471 OMAP3_MUX(SDMMC2_DAT3, OMAP_PULL_ENA | OMAP_MUX_MODE0),
472 OMAP3_MUX(SDMMC2_DAT4, OMAP_PULL_ENA | OMAP_MUX_MODE0),
473 OMAP3_MUX(SDMMC2_DAT5, OMAP_PULL_ENA | OMAP_MUX_MODE0),
474 OMAP3_MUX(SDMMC2_DAT6, OMAP_PULL_ENA | OMAP_MUX_MODE0),
475 OMAP3_MUX(SDMMC2_DAT7, OMAP_PULL_ENA | OMAP_MUX_MODE0),
476 { .reg_offset = OMAP_MUX_TERMINATOR },
477};
478
112485e9
BC		 479static struct omap_mux_partition *partition;
480
ce6f0016
AH		 481/*
482 * Current flows to eMMC when eMMC is off and the data lines are pulled up,
483 * so pull them down. N.B. we pull 8 lines because we are using 8 lines.
484 */
485static void rx51_mmc2_remux(struct device *dev, int slot, int power_on)
486{
487 if (power_on)
112485e9 488 omap_mux_write_array(partition, rx51_mmc2_on_mux);
ce6f0016 489 else
112485e9 490 omap_mux_write_array(partition, rx51_mmc2_off_mux);
ce6f0016
AH		 491}
492
68ff0423 493static struct omap2_hsmmc_info mmc[] __initdata = {
ffe7f95b
LL		 494 {
495 .name = "external",
496 .mmc = 1,
3a63833e 497 .caps = MMC_CAP_4_BIT_DATA,
ffe7f95b
LL		 498 .cover_only = true,
499 .gpio_cd = 160,
500 .gpio_wp = -EINVAL,
5e763d29 501 .power_saving = true,
ffe7f95b
LL		 502 },
503 {
504 .name = "internal",
505 .mmc = 2,
3a63833e
SG		 506 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
507 /* See also rx51_mmc2_remux */
ffe7f95b
LL		 508 .gpio_cd = -EINVAL,
509 .gpio_wp = -EINVAL,
5e763d29
AH		 510 .nonremovable = true,
511 .power_saving = true,
ce6f0016 512 .remux = rx51_mmc2_remux,
ffe7f95b
LL		 513 },
514 {} /* Terminator */
515};
516
786b01a8
OD		 517static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
518 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
519};
ffe7f95b 520
664a41b8
LT		 521static struct regulator_consumer_supply rx51_vaux2_supply[] = {
522 REGULATOR_SUPPLY("vdds_csib", "omap3isp"),
523};
75ccf268 524
786b01a8
OD		 525static struct regulator_consumer_supply rx51_vaux3_supply[] = {
526 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
527};
ffe7f95b 528
786b01a8
OD		 529static struct regulator_consumer_supply rx51_vsim_supply[] = {
530 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
531};
ffe7f95b 532
4cfcaef1
JN		 533static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
534 /* tlv320aic3x analog supplies */
5c7d9bbe
JN		 535 REGULATOR_SUPPLY("AVDD", "2-0018"),
536 REGULATOR_SUPPLY("DRVDD", "2-0018"),
caeeb4aa
JN		 537 REGULATOR_SUPPLY("AVDD", "2-0019"),
538 REGULATOR_SUPPLY("DRVDD", "2-0019"),
64d06691
JN		 539 /* tpa6130a2 */
540 REGULATOR_SUPPLY("Vdd", "2-0060"),
4cfcaef1 541 /* Keep vmmc as last item. It is not iterated for newer boards */
0005ae73 542 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
4cfcaef1
JN		 543};
544
545static struct regulator_consumer_supply rx51_vio_supplies[] = {
546 /* tlv320aic3x digital supplies */
5c7d9bbe
JN		 547 REGULATOR_SUPPLY("IOVDD", "2-0018"),
548 REGULATOR_SUPPLY("DVDD", "2-0018"),
caeeb4aa
JN		 549 REGULATOR_SUPPLY("IOVDD", "2-0019"),
550 REGULATOR_SUPPLY("DVDD", "2-0019"),
589541c0
JN		 551 /* Si4713 IO supply */
552 REGULATOR_SUPPLY("vio", "2-0063"),
17fd8cdb
AK		 553 /* lis3lv02d */
554 REGULATOR_SUPPLY("Vdd_IO", "3-001d"),
4cfcaef1
JN		 555};
556
0581b52e 557static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
b5b9945b 558 REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
3d85f548 559 REGULATOR_SUPPLY("vdds_sdi", "omapdss_sdi.0"),
589541c0
JN		 560 /* Si4713 supply */
561 REGULATOR_SUPPLY("vdd", "2-0063"),
17fd8cdb
AK		 562 /* lis3lv02d */
563 REGULATOR_SUPPLY("Vdd", "3-001d"),
0581b52e
RQ		 564};
565
ffe7f95b
LL		 566static struct regulator_init_data rx51_vaux1 = {
567 .constraints = {
568 .name = "V28",
569 .min_uV = 2800000,
570 .max_uV = 2800000,
000d534e 571 .always_on = true, /* due battery cover sensor */
ffe7f95b
LL		 572 .valid_modes_mask = REGULATOR_MODE_NORMAL
573 | REGULATOR_MODE_STANDBY,
574 .valid_ops_mask = REGULATOR_CHANGE_MODE
575 | REGULATOR_CHANGE_STATUS,
576 },
0581b52e
RQ		 577 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux1_consumers),
578 .consumer_supplies = rx51_vaux1_consumers,
ffe7f95b
LL		 579};
580
581static struct regulator_init_data rx51_vaux2 = {
582 .constraints = {
583 .name = "VCSI",
584 .min_uV = 1800000,
585 .max_uV = 1800000,
586 .valid_modes_mask = REGULATOR_MODE_NORMAL
587 | REGULATOR_MODE_STANDBY,
588 .valid_ops_mask = REGULATOR_CHANGE_MODE
589 | REGULATOR_CHANGE_STATUS,
590 },
664a41b8
LT		 591 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux2_supply),
592 .consumer_supplies = rx51_vaux2_supply,
ffe7f95b
LL		 593};
594
595/* VAUX3 - adds more power to VIO_18 rail */
f52eeee8 596static struct regulator_init_data rx51_vaux3_cam = {
ffe7f95b
LL		 597 .constraints = {
598 .name = "VCAM_DIG_18",
599 .min_uV = 1800000,
600 .max_uV = 1800000,
601 .apply_uV = true,
602 .valid_modes_mask = REGULATOR_MODE_NORMAL
603 | REGULATOR_MODE_STANDBY,
604 .valid_ops_mask = REGULATOR_CHANGE_MODE
605 | REGULATOR_CHANGE_STATUS,
606 },
607};
608
f52eeee8
AH		 609static struct regulator_init_data rx51_vaux3_mmc = {
610 .constraints = {
611 .name = "VMMC2_30",
612 .min_uV = 2800000,
613 .max_uV = 3000000,
614 .apply_uV = true,
615 .valid_modes_mask = REGULATOR_MODE_NORMAL
616 | REGULATOR_MODE_STANDBY,
617 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
618 | REGULATOR_CHANGE_MODE
619 | REGULATOR_CHANGE_STATUS,
620 },
786b01a8
OD		 621 .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
622 .consumer_supplies = rx51_vaux3_supply,
f52eeee8
AH		 623};
624
ffe7f95b
LL		 625static struct regulator_init_data rx51_vaux4 = {
626 .constraints = {
627 .name = "VCAM_ANA_28",
628 .min_uV = 2800000,
629 .max_uV = 2800000,
630 .apply_uV = true,
631 .valid_modes_mask = REGULATOR_MODE_NORMAL
632 | REGULATOR_MODE_STANDBY,
633 .valid_ops_mask = REGULATOR_CHANGE_MODE
634 | REGULATOR_CHANGE_STATUS,
635 },
636};
637
638static struct regulator_init_data rx51_vmmc1 = {
639 .constraints = {
640 .min_uV = 1850000,
641 .max_uV = 3150000,
642 .valid_modes_mask = REGULATOR_MODE_NORMAL
643 | REGULATOR_MODE_STANDBY,
644 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
645 | REGULATOR_CHANGE_MODE
646 | REGULATOR_CHANGE_STATUS,
647 },
786b01a8
OD		 648 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
649 .consumer_supplies = rx51_vmmc1_supply,
ffe7f95b
LL		 650};
651
652static struct regulator_init_data rx51_vmmc2 = {
653 .constraints = {
f2add1de
JN		 654 .name = "V28_A",
655 .min_uV = 2800000,
656 .max_uV = 3000000,
2827411e 657 .always_on = true, /* due VIO leak to AIC34 VDDs */
ffe7f95b
LL		 658 .apply_uV = true,
659 .valid_modes_mask = REGULATOR_MODE_NORMAL
660 | REGULATOR_MODE_STANDBY,
661 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
662 | REGULATOR_CHANGE_MODE
663 | REGULATOR_CHANGE_STATUS,
664 },
4cfcaef1
JN		 665 .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc2_supplies),
666 .consumer_supplies = rx51_vmmc2_supplies,
ffe7f95b
LL		 667};
668
094fc559
KJ		 669static struct regulator_init_data rx51_vpll1 = {
670 .constraints = {
671 .name = "VPLL",
672 .min_uV = 1800000,
673 .max_uV = 1800000,
674 .apply_uV = true,
675 .always_on = true,
676 .valid_modes_mask = REGULATOR_MODE_NORMAL
677 | REGULATOR_MODE_STANDBY,
678 .valid_ops_mask = REGULATOR_CHANGE_MODE,
679 },
680};
681
682static struct regulator_init_data rx51_vpll2 = {
683 .constraints = {
684 .name = "VSDI_CSI",
685 .min_uV = 1800000,
686 .max_uV = 1800000,
687 .apply_uV = true,
688 .always_on = true,
689 .valid_modes_mask = REGULATOR_MODE_NORMAL
690 | REGULATOR_MODE_STANDBY,
691 .valid_ops_mask = REGULATOR_CHANGE_MODE,
692 },
693};
694
ffe7f95b
LL		 695static struct regulator_init_data rx51_vsim = {
696 .constraints = {
697 .name = "VMMC2_IO_18",
698 .min_uV = 1800000,
699 .max_uV = 1800000,
700 .apply_uV = true,
701 .valid_modes_mask = REGULATOR_MODE_NORMAL
702 | REGULATOR_MODE_STANDBY,
703 .valid_ops_mask = REGULATOR_CHANGE_MODE
704 | REGULATOR_CHANGE_STATUS,
705 },
786b01a8
OD		 706 .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
707 .consumer_supplies = rx51_vsim_supply,
ffe7f95b
LL		 708};
709
4cfcaef1
JN		 710static struct regulator_init_data rx51_vio = {
711 .constraints = {
712 .min_uV = 1800000,
713 .max_uV = 1800000,
714 .valid_modes_mask = REGULATOR_MODE_NORMAL
715 | REGULATOR_MODE_STANDBY,
716 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
717 | REGULATOR_CHANGE_MODE
718 | REGULATOR_CHANGE_STATUS,
719 },
720 .num_consumer_supplies = ARRAY_SIZE(rx51_vio_supplies),
721 .consumer_supplies = rx51_vio_supplies,
722};
723
094fc559
KJ		 724static struct regulator_init_data rx51_vintana1 = {
725 .constraints = {
726 .name = "VINTANA1",
727 .min_uV = 1500000,
728 .max_uV = 1500000,
729 .always_on = true,
730 .valid_modes_mask = REGULATOR_MODE_NORMAL
731 | REGULATOR_MODE_STANDBY,
732 .valid_ops_mask = REGULATOR_CHANGE_MODE,
733 },
734};
735
736static struct regulator_init_data rx51_vintana2 = {
737 .constraints = {
738 .name = "VINTANA2",
739 .min_uV = 2750000,
740 .max_uV = 2750000,
741 .apply_uV = true,
742 .always_on = true,
743 .valid_modes_mask = REGULATOR_MODE_NORMAL
744 | REGULATOR_MODE_STANDBY,
745 .valid_ops_mask = REGULATOR_CHANGE_MODE,
746 },
747};
748
749static struct regulator_init_data rx51_vintdig = {
750 .constraints = {
751 .name = "VINTDIG",
752 .min_uV = 1500000,
753 .max_uV = 1500000,
754 .always_on = true,
755 .valid_modes_mask = REGULATOR_MODE_NORMAL
756 | REGULATOR_MODE_STANDBY,
757 .valid_ops_mask = REGULATOR_CHANGE_MODE,
758 },
759};
760
cc6d618f
DR		 761static const char * const si4713_supply_names[] = {
762 "vio",
763 "vdd",
764};
765
589541c0 766static struct si4713_platform_data rx51_si4713_i2c_data __initdata_or_module = {
cc6d618f
DR		 767 .supplies = ARRAY_SIZE(si4713_supply_names),
768 .supply_names = si4713_supply_names,
589541c0
JN		 769 .gpio_reset = RX51_FMTX_RESET_GPIO,
770};
771
772static struct i2c_board_info rx51_si4713_board_info __initdata_or_module = {
773 I2C_BOARD_INFO("si4713", SI4713_I2C_ADDR_BUSEN_HIGH),
774 .platform_data = &rx51_si4713_i2c_data,
775};
776
777static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = {
778 .i2c_bus = 2,
779 .subdev_board_info = &rx51_si4713_board_info,
780};
781
12aee6c6 782static struct platform_device rx51_si4713_dev __initdata_or_module = {
589541c0
JN		 783 .name = "radio-si4713",
784 .id = -1,
785 .dev = {
786 .platform_data = &rx51_si4713_data,
787 },
788};
789
790static __init void rx51_init_si4713(void)
791{
792 int err;
793
794 err = gpio_request_one(RX51_FMTX_IRQ, GPIOF_DIR_IN, "si4713 irq");
795 if (err) {
796 printk(KERN_ERR "Cannot request si4713 irq gpio. %d\n", err);
797 return;
798 }
799 rx51_si4713_board_info.irq = gpio_to_irq(RX51_FMTX_IRQ);
800 platform_device_register(&rx51_si4713_dev);
801}
802
ffe7f95b
LL		 803static int rx51_twlgpio_setup(struct device *dev, unsigned gpio, unsigned n)
804{
805 /* FIXME this gpio setup is just a placeholder for now */
bc593f5d 806 gpio_request_one(gpio + 6, GPIOF_OUT_INIT_LOW, "backlight_pwm");
c0ad4fac 807 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "speaker_en");
ffe7f95b 808
ffe7f95b
LL		 809 return 0;
810}
811
812static struct twl4030_gpio_platform_data rx51_gpio_data = {
ffe7f95b
LL		 813 .pulldowns = BIT(0) | BIT(1) | BIT(2) | BIT(3)
814 | BIT(4) | BIT(5)
815 | BIT(8) | BIT(9) | BIT(10) | BIT(11)
816 | BIT(12) | BIT(13) | BIT(14) | BIT(15)
817 | BIT(16) | BIT(17) ,
818 .setup = rx51_twlgpio_setup,
819};
820
9312fffb
AK		 821static struct twl4030_ins sleep_on_seq[] __initdata = {
822/*
3c684e84 823 * Turn off everything
9312fffb 824 */
3c684e84 825 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_SLEEP), 2},
9312fffb
AK		 826};
827
828static struct twl4030_script sleep_on_script __initdata = {
829 .script = sleep_on_seq,
830 .size = ARRAY_SIZE(sleep_on_seq),
831 .flags = TWL4030_SLEEP_SCRIPT,
832};
833
834static struct twl4030_ins wakeup_seq[] __initdata = {
835/*
3c684e84 836 * Reenable everything
9312fffb 837 */
3c684e84 838 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 839};
840
841static struct twl4030_script wakeup_script __initdata = {
842 .script = wakeup_seq,
843 .size = ARRAY_SIZE(wakeup_seq),
844 .flags = TWL4030_WAKEUP12_SCRIPT,
845};
846
847static struct twl4030_ins wakeup_p3_seq[] __initdata = {
848/*
3c684e84 849 * Reenable everything
9312fffb 850 */
3c684e84 851 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 1, 0, RES_STATE_ACTIVE), 2},
9312fffb
AK		 852};
853
854static struct twl4030_script wakeup_p3_script __initdata = {
855 .script = wakeup_p3_seq,
856 .size = ARRAY_SIZE(wakeup_p3_seq),
857 .flags = TWL4030_WAKEUP3_SCRIPT,
858};
859
860static struct twl4030_ins wrst_seq[] __initdata = {
861/*
862 * Reset twl4030.
863 * Reset VDD1 regulator.
864 * Reset VDD2 regulator.
865 * Reset VPLL1 regulator.
866 * Enable sysclk output.
867 * Reenable twl4030.
868 */
869 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_OFF), 2},
870 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_ALL, 0, 1, RES_STATE_ACTIVE),
871 0x13},
9312fffb
AK		 872 {MSG_BROADCAST(DEV_GRP_NULL, RES_GRP_PP, 0, 3, RES_STATE_OFF), 0x13},
873 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD1, RES_STATE_WRST), 0x13},
874 {MSG_SINGULAR(DEV_GRP_NULL, RES_VDD2, RES_STATE_WRST), 0x13},
875 {MSG_SINGULAR(DEV_GRP_NULL, RES_VPLL1, RES_STATE_WRST), 0x35},
3c684e84 876 {MSG_SINGULAR(DEV_GRP_P3, RES_HFCLKOUT, RES_STATE_ACTIVE), 2},
9312fffb
AK		 877 {MSG_SINGULAR(DEV_GRP_NULL, RES_RESET, RES_STATE_ACTIVE), 2},
878};
879
880static struct twl4030_script wrst_script __initdata = {
881 .script = wrst_seq,
882 .size = ARRAY_SIZE(wrst_seq),
883 .flags = TWL4030_WRST_SCRIPT,
884};
885
886static struct twl4030_script *twl4030_scripts[] __initdata = {
887 /* wakeup12 script should be loaded before sleep script, otherwise a
888 board might hit retention before loading of wakeup script is
889 completed. This can cause boot failures depending on timing issues.
890 */
891 &wakeup_script,
892 &sleep_on_script,
893 &wakeup_p3_script,
894 &wrst_script,
895};
896
897static struct twl4030_resconfig twl4030_rconfig[] __initdata = {
3c684e84
AK		 898 { .resource = RES_VDD1, .devgroup = -1,
899 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
900 .remap_sleep = RES_STATE_OFF
901 },
902 { .resource = RES_VDD2, .devgroup = -1,
903 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
904 .remap_sleep = RES_STATE_OFF
905 },
906 { .resource = RES_VPLL1, .devgroup = -1,
907 .type = 1, .type2 = -1, .remap_off = RES_STATE_OFF,
908 .remap_sleep = RES_STATE_OFF
909 },
910 { .resource = RES_VPLL2, .devgroup = -1,
911 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
912 },
913 { .resource = RES_VAUX1, .devgroup = -1,
914 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
915 },
916 { .resource = RES_VAUX2, .devgroup = -1,
917 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
918 },
919 { .resource = RES_VAUX3, .devgroup = -1,
920 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
921 },
922 { .resource = RES_VAUX4, .devgroup = -1,
923 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
924 },
925 { .resource = RES_VMMC1, .devgroup = -1,
926 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
927 },
928 { .resource = RES_VMMC2, .devgroup = -1,
929 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
930 },
931 { .resource = RES_VDAC, .devgroup = -1,
932 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
933 },
934 { .resource = RES_VSIM, .devgroup = -1,
935 .type = -1, .type2 = 3, .remap_off = -1, .remap_sleep = -1
936 },
937 { .resource = RES_VINTANA1, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
938 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
939 },
940 { .resource = RES_VINTANA2, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
941 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
942 },
943 { .resource = RES_VINTDIG, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
944 .type = -1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
945 },
946 { .resource = RES_VIO, .devgroup = DEV_GRP_P3,
947 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
948 },
949 { .resource = RES_CLKEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
950 .type = 1, .type2 = -1 , .remap_off = -1, .remap_sleep = -1
951 },
952 { .resource = RES_REGEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
953 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
954 },
955 { .resource = RES_NRES_PWRON, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
956 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
957 },
958 { .resource = RES_SYSEN, .devgroup = DEV_GRP_P1 | DEV_GRP_P3,
959 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
960 },
961 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3,
962 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
963 },
964 { .resource = RES_32KCLKOUT, .devgroup = -1,
965 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
966 },
967 { .resource = RES_RESET, .devgroup = -1,
968 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
969 },
d7ac829f 970 { .resource = RES_MAIN_REF, .devgroup = -1,
3c684e84
AK		 971 .type = 1, .type2 = -1, .remap_off = -1, .remap_sleep = -1
972 },
9312fffb
AK		 973 { 0, 0},
974};
975
976static struct twl4030_power_data rx51_t2scripts_data __initdata = {
977 .scripts = twl4030_scripts,
978 .num = ARRAY_SIZE(twl4030_scripts),
979 .resource_config = twl4030_rconfig,
980};
981
8c3d4534 982static struct twl4030_vibra_data rx51_vibra_data __initdata = {
b7a834cc
IK		 983 .coexist = 0,
984};
985
8c3d4534 986static struct twl4030_audio_data rx51_audio_data __initdata = {
b7a834cc
IK		 987 .audio_mclk = 26000000,
988 .vibra = &rx51_vibra_data,
989};
9312fffb 990
9312fffb 991static struct twl4030_platform_data rx51_twldata __initdata = {
ffe7f95b
LL		 992 /* platform_data for children goes here */
993 .gpio = &rx51_gpio_data,
994 .keypad = &rx51_kp_data,
9312fffb 995 .power = &rx51_t2scripts_data,
4ae6df5e 996 .audio = &rx51_audio_data,
ffe7f95b
LL		 997
998 .vaux1 = &rx51_vaux1,
999 .vaux2 = &rx51_vaux2,
ffe7f95b
LL		 1000 .vaux4 = &rx51_vaux4,
1001 .vmmc1 = &rx51_vmmc1,
094fc559
KJ		 1002 .vpll1 = &rx51_vpll1,
1003 .vpll2 = &rx51_vpll2,
ffe7f95b 1004 .vsim = &rx51_vsim,
094fc559
KJ		 1005 .vintana1 = &rx51_vintana1,
1006 .vintana2 = &rx51_vintana2,
1007 .vintdig = &rx51_vintdig,
4cfcaef1 1008 .vio = &rx51_vio,
ffe7f95b
LL		 1009};
1010
f0c61d3d 1011static struct tpa6130a2_platform_data rx51_tpa6130a2_data __initdata_or_module = {
64d06691
JN		 1012 .power_gpio = 98,
1013};
1014
f0fba2ad
LG		 1015/* Audio setup data */
1016static struct aic3x_setup_data rx51_aic34_setup = {
1017 .gpio_func[0] = AIC3X_GPIO1_FUNC_DISABLED,
1018 .gpio_func[1] = AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT,
1019};
1020
e4862f2f 1021static struct aic3x_pdata rx51_aic3x_data = {
f0fba2ad
LG		 1022 .setup = &rx51_aic34_setup,
1023 .gpio_reset = 60,
1024};
1025
caeeb4aa
JN		 1026static struct aic3x_pdata rx51_aic3x_data2 = {
1027 .gpio_reset = 60,
1028};
1029
dabe929b
JN		 1030static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_2[] = {
1031 {
1032 I2C_BOARD_INFO("tlv320aic3x", 0x18),
87581fd4 1033 .platform_data = &rx51_aic3x_data,
dabe929b 1034 },
caeeb4aa
JN		 1035 {
1036 I2C_BOARD_INFO("tlv320aic3x", 0x19),
1037 .platform_data = &rx51_aic3x_data2,
1038 },
70b5d737
MN		 1039#if defined(CONFIG_SENSORS_TSL2563) || defined(CONFIG_SENSORS_TSL2563_MODULE)
1040 {
1041 I2C_BOARD_INFO("tsl2563", 0x29),
1042 .platform_data = &rx51_tsl2563_platform_data,
1043 },
eeada9e8
AP		 1044#endif
1045#if defined(CONFIG_LEDS_LP5523) || defined(CONFIG_LEDS_LP5523_MODULE)
1046 {
1047 I2C_BOARD_INFO("lp5523", 0x32),
1048 .platform_data = &rx51_lp5523_platform_data,
1049 },
70b5d737 1050#endif
d77711aa
PR		 1051 {
1052 I2C_BOARD_INFO("bq27200", 0x55),
1053 },
64d06691
JN		 1054 {
1055 I2C_BOARD_INFO("tpa6130a2", 0x60),
1056 .platform_data = &rx51_tpa6130a2_data,
1057 }
dabe929b
JN		 1058};
1059
3b511201
AP		 1060static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1061#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1062 {
1063 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1064 .platform_data = &rx51_lis3lv02d_data,
3b511201
AP		 1065 },
1066#endif
1067};
1068
ffe7f95b
LL		 1069static int __init rx51_i2c_init(void)
1070{
f52eeee8 1071 if ((system_rev >= SYSTEM_REV_S_USES_VAUX3 && system_rev < 0x100) ||
4cfcaef1 1072 system_rev >= SYSTEM_REV_B_USES_VAUX3) {
f52eeee8 1073 rx51_twldata.vaux3 = &rx51_vaux3_mmc;
4cfcaef1
JN		 1074 /* Only older boards use VMMC2 for internal MMC */
1075 rx51_vmmc2.num_consumer_supplies--;
1076 } else {
f52eeee8 1077 rx51_twldata.vaux3 = &rx51_vaux3_cam;
f52eeee8 1078 }
4cfcaef1 1079 rx51_twldata.vmmc2 = &rx51_vmmc2;
827ed9ae 1080 omap3_pmic_get_config(&rx51_twldata,
b252b0ef
PU		 1081 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
1082 TWL_COMMON_REGULATOR_VDAC);
1083
1084 rx51_twldata.vdac->constraints.apply_uV = true;
1085 rx51_twldata.vdac->constraints.name = "VDAC";
1086
7d7e1eba 1087 omap_pmic_init(1, 2200, "twl5030", 7 + OMAP_INTC_START, &rx51_twldata);
dabe929b
JN		 1088 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1089 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
4d04317f
TL		 1090#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1091 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1092 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1093#endif
3b511201
AP		 1094 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1095 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
ffe7f95b
LL		 1096 return 0;
1097}
1098
aa62e90f
JY		 1099#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
1100 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
1101
1102static struct mtd_partition onenand_partitions[] = {
1103 {
1104 .name = "bootloader",
1105 .offset = 0,
1106 .size = 0x20000,
1107 .mask_flags = MTD_WRITEABLE, /* Force read-only */
1108 },
1109 {
1110 .name = "config",
1111 .offset = MTDPART_OFS_APPEND,
1112 .size = 0x60000,
1113 },
1114 {
1115 .name = "log",
1116 .offset = MTDPART_OFS_APPEND,
1117 .size = 0x40000,
1118 },
1119 {
1120 .name = "kernel",
1121 .offset = MTDPART_OFS_APPEND,
1122 .size = 0x200000,
1123 },
1124 {
1125 .name = "initfs",
1126 .offset = MTDPART_OFS_APPEND,
1127 .size = 0x200000,
1128 },
1129 {
1130 .name = "rootfs",
1131 .offset = MTDPART_OFS_APPEND,
1132 .size = MTDPART_SIZ_FULL,
1133 },
1134};
1135
5403187f
AK		 1136static struct omap_onenand_platform_data board_onenand_data[] = {
1137 {
1138 .cs = 0,
1139 .gpio_irq = 65,
1140 .parts = onenand_partitions,
1141 .nr_parts = ARRAY_SIZE(onenand_partitions),
1142 .flags = ONENAND_SYNC_READWRITE,
1143 }
aa62e90f 1144};
aa62e90f 1145#endif
ffe7f95b 1146
bc593f5d 1147static struct gpio rx51_wl1251_gpios[] __initdata = {
bc593f5d
IG		 1148 { RX51_WL1251_IRQ_GPIO, GPIOF_IN, "wl1251 irq" },
1149};
1150
a24e61a9
KV		 1151static void __init rx51_init_wl1251(void)
1152{
1153 int irq, ret;
1154
bc593f5d
IG		 1155 ret = gpio_request_array(rx51_wl1251_gpios,
1156 ARRAY_SIZE(rx51_wl1251_gpios));
a24e61a9
KV		 1157 if (ret < 0)
1158 goto error;
1159
a24e61a9
KV		 1160 irq = gpio_to_irq(RX51_WL1251_IRQ_GPIO);
1161 if (irq < 0)
1162 goto err_irq;
1163
1d207cd3 1164 wl1251_pdata.power_gpio = RX51_WL1251_POWER_GPIO;
a24e61a9
KV		 1165 rx51_peripherals_spi_board_info[RX51_SPI_WL1251].irq = irq;
1166
1167 return;
1168
1169err_irq:
1170 gpio_free(RX51_WL1251_IRQ_GPIO);
a24e61a9
KV		 1171error:
1172 printk(KERN_ERR "wl1251 board initialisation failed\n");
1d207cd3 1173 wl1251_pdata.power_gpio = -1;
a24e61a9
KV		 1174
1175 /*
1176 * Now rx51_peripherals_spi_board_info[1].irq is zero and
1177 * set_power is null, and wl1251_probe() will fail.
1178 */
1179}
1180
3dad5356
AK		 1181static struct tsc2005_platform_data tsc2005_pdata = {
1182 .ts_pressure_max = 2048,
1183 .ts_pressure_fudge = 2,
1184 .ts_x_max = 4096,
1185 .ts_x_fudge = 4,
1186 .ts_y_max = 4096,
1187 .ts_y_fudge = 7,
1188 .ts_x_plate_ohm = 280,
1189 .esd_timeout_ms = 8000,
1190};
1191
d4860ebe
VZ		 1192static struct gpio rx51_tsc2005_gpios[] __initdata = {
1193 { RX51_TSC2005_IRQ_GPIO, GPIOF_IN, "tsc2005 IRQ" },
1194 { RX51_TSC2005_RESET_GPIO, GPIOF_OUT_INIT_HIGH, "tsc2005 reset" },
1195};
1196
3dad5356
AK		 1197static void rx51_tsc2005_set_reset(bool enable)
1198{
1199 gpio_set_value(RX51_TSC2005_RESET_GPIO, enable);
1200}
1201
1202static void __init rx51_init_tsc2005(void)
1203{
1204 int r;
1205
d4860ebe
VZ		 1206 omap_mux_init_gpio(RX51_TSC2005_RESET_GPIO, OMAP_PIN_OUTPUT);
1207 omap_mux_init_gpio(RX51_TSC2005_IRQ_GPIO, OMAP_PIN_INPUT_PULLUP);
3dad5356 1208
d4860ebe
VZ		 1209 r = gpio_request_array(rx51_tsc2005_gpios,
1210 ARRAY_SIZE(rx51_tsc2005_gpios));
1211 if (r < 0) {
1212 printk(KERN_ERR "tsc2005 board initialization failed\n");
3dad5356 1213 tsc2005_pdata.esd_timeout_ms = 0;
d4860ebe 1214 return;
3dad5356 1215 }
d4860ebe
VZ		 1216
1217 tsc2005_pdata.set_reset = rx51_tsc2005_set_reset;
2533c2cf
TL		 1218 rx51_peripherals_spi_board_info[RX51_SPI_TSC2005].irq =
1219 gpio_to_irq(RX51_TSC2005_IRQ_GPIO);
3dad5356
AK		 1220}
1221
322c183c
TK		 1222#if defined(CONFIG_IR_RX51) || defined(CONFIG_IR_RX51_MODULE)
1223static struct lirc_rx51_platform_data rx51_lirc_data = {
1224 .set_max_mpu_wakeup_lat = omap_pm_set_max_mpu_wakeup_lat,
1225 .pwm_timer = 9, /* Use GPT 9 for CIR */
1226};
1227
1228static struct platform_device rx51_lirc_device = {
1229 .name = "lirc_rx51",
1230 .id = -1,
1231 .dev = {
1232 .platform_data = &rx51_lirc_data,
1233 },
1234};
1235
1236static void __init rx51_init_lirc(void)
1237{
1238 platform_device_register(&rx51_lirc_device);
1239}
1240#else
1241static void __init rx51_init_lirc(void)
1242{
1243}
1244#endif
1245
749a34b3
PR		 1246static struct platform_device madc_hwmon = {
1247 .name = "twl4030_madc_hwmon",
1248 .id = -1,
1249};
1250
1251static void __init rx51_init_twl4030_hwmon(void)
1252{
1253 platform_device_register(&madc_hwmon);
1254}
1255
d2065e2b
PR		 1256static struct platform_device omap3_rom_rng_device = {
1257 .name = "omap3-rom-rng",
1258 .id = -1,
1259 .dev = {
1260 .platform_data = rx51_secure_rng_call,
1261 },
1262};
1263
1264static void __init rx51_init_omap3_rom_rng(void)
1265{
1266 if (omap_type() == OMAP2_DEVICE_TYPE_SEC) {
1267 pr_info("RX-51: Registring OMAP3 HWRNG device\n");
1268 platform_device_register(&omap3_rom_rng_device);
1269 }
1270}
1271
ffe7f95b
LL		 1272void __init rx51_peripherals_init(void)
1273{
ffe7f95b 1274 rx51_i2c_init();
094fc559 1275 regulator_has_full_constraints();
5403187f 1276 gpmc_onenand_init(board_onenand_data);
f014ee32 1277 rx51_add_gpio_keys();
a24e61a9 1278 rx51_init_wl1251();
3dad5356 1279 rx51_init_tsc2005();
589541c0 1280 rx51_init_si4713();
322c183c 1281 rx51_init_lirc();
a24e61a9
KV		 1282 spi_register_board_info(rx51_peripherals_spi_board_info,
1283 ARRAY_SIZE(rx51_peripherals_spi_board_info));
112485e9
BC		 1284
1285 partition = omap_mux_get("core");
1286 if (partition)
3b972bf0 1287 omap_hsmmc_init(mmc);
112485e9 1288
10299e2e 1289 rx51_charger_init();
749a34b3 1290 rx51_init_twl4030_hwmon();
d2065e2b 1291 rx51_init_omap3_rom_rng();
ffe7f95b
LL		 1292}
1293
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