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734f69a7 PW |
1 | /* |
2 | * OMAP2xxx DVFS virtual clock functions | |
3 | * | |
4 | * Copyright (C) 2005-2008 Texas Instruments, Inc. | |
5 | * Copyright (C) 2004-2010 Nokia Corporation | |
6 | * | |
7 | * Contacts: | |
8 | * Richard Woodruff <r-woodruff2@ti.com> | |
9 | * Paul Walmsley | |
10 | * | |
11 | * Based on earlier work by Tuukka Tikkanen, Tony Lindgren, | |
12 | * Gordon McNutt and RidgeRun, Inc. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License version 2 as | |
16 | * published by the Free Software Foundation. | |
17 | * | |
18 | * XXX Some of this code should be replaceable by the upcoming OPP layer | |
19 | * code. However, some notion of "rate set" is probably still necessary | |
20 | * for OMAP2xxx at least. Rate sets should be generalized so they can be | |
21 | * used for any OMAP chip, not just OMAP2xxx. In particular, Richard Woodruff | |
22 | * has in the past expressed a preference to use rate sets for OPP changes, | |
23 | * rather than dynamically recalculating the clock tree, so if someone wants | |
24 | * this badly enough to write the code to handle it, we should support it | |
25 | * as an option. | |
26 | */ | |
27 | #undef DEBUG | |
28 | ||
29 | #include <linux/kernel.h> | |
30 | #include <linux/errno.h> | |
31 | #include <linux/clk.h> | |
32 | #include <linux/io.h> | |
33 | #include <linux/cpufreq.h> | |
5a0e3ad6 | 34 | #include <linux/slab.h> |
734f69a7 PW |
35 | |
36 | #include <plat/clock.h> | |
37 | #include <plat/sram.h> | |
38 | #include <plat/sdrc.h> | |
39 | ||
40 | #include "clock.h" | |
41 | #include "clock2xxx.h" | |
42 | #include "opp2xxx.h" | |
43 | #include "cm.h" | |
44 | #include "cm-regbits-24xx.h" | |
45 | ||
46 | const struct prcm_config *curr_prcm_set; | |
47 | const struct prcm_config *rate_table; | |
48 | ||
49 | /** | |
50 | * omap2_table_mpu_recalc - just return the MPU speed | |
51 | * @clk: virt_prcm_set struct clk | |
52 | * | |
53 | * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. | |
54 | */ | |
55 | unsigned long omap2_table_mpu_recalc(struct clk *clk) | |
56 | { | |
57 | return curr_prcm_set->mpu_speed; | |
58 | } | |
59 | ||
60 | /* | |
61 | * Look for a rate equal or less than the target rate given a configuration set. | |
62 | * | |
63 | * What's not entirely clear is "which" field represents the key field. | |
64 | * Some might argue L3-DDR, others ARM, others IVA. This code is simple and | |
65 | * just uses the ARM rates. | |
66 | */ | |
67 | long omap2_round_to_table_rate(struct clk *clk, unsigned long rate) | |
68 | { | |
69 | const struct prcm_config *ptr; | |
70 | long highest_rate; | |
71 | long sys_ck_rate; | |
72 | ||
73 | sys_ck_rate = clk_get_rate(sclk); | |
74 | ||
75 | highest_rate = -EINVAL; | |
76 | ||
77 | for (ptr = rate_table; ptr->mpu_speed; ptr++) { | |
78 | if (!(ptr->flags & cpu_mask)) | |
79 | continue; | |
80 | if (ptr->xtal_speed != sys_ck_rate) | |
81 | continue; | |
82 | ||
83 | highest_rate = ptr->mpu_speed; | |
84 | ||
85 | /* Can check only after xtal frequency check */ | |
86 | if (ptr->mpu_speed <= rate) | |
87 | break; | |
88 | } | |
89 | return highest_rate; | |
90 | } | |
91 | ||
92 | /* Sets basic clocks based on the specified rate */ | |
93 | int omap2_select_table_rate(struct clk *clk, unsigned long rate) | |
94 | { | |
95 | u32 cur_rate, done_rate, bypass = 0, tmp; | |
96 | const struct prcm_config *prcm; | |
97 | unsigned long found_speed = 0; | |
98 | unsigned long flags; | |
99 | long sys_ck_rate; | |
100 | ||
101 | sys_ck_rate = clk_get_rate(sclk); | |
102 | ||
103 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | |
104 | if (!(prcm->flags & cpu_mask)) | |
105 | continue; | |
106 | ||
107 | if (prcm->xtal_speed != sys_ck_rate) | |
108 | continue; | |
109 | ||
110 | if (prcm->mpu_speed <= rate) { | |
111 | found_speed = prcm->mpu_speed; | |
112 | break; | |
113 | } | |
114 | } | |
115 | ||
116 | if (!found_speed) { | |
117 | printk(KERN_INFO "Could not set MPU rate to %luMHz\n", | |
118 | rate / 1000000); | |
119 | return -EINVAL; | |
120 | } | |
121 | ||
122 | curr_prcm_set = prcm; | |
123 | cur_rate = omap2xxx_clk_get_core_rate(dclk); | |
124 | ||
125 | if (prcm->dpll_speed == cur_rate / 2) { | |
126 | omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); | |
127 | } else if (prcm->dpll_speed == cur_rate * 2) { | |
128 | omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); | |
129 | } else if (prcm->dpll_speed != cur_rate) { | |
130 | local_irq_save(flags); | |
131 | ||
132 | if (prcm->dpll_speed == prcm->xtal_speed) | |
133 | bypass = 1; | |
134 | ||
135 | if ((prcm->cm_clksel2_pll & OMAP24XX_CORE_CLK_SRC_MASK) == | |
136 | CORE_CLK_SRC_DPLL_X2) | |
137 | done_rate = CORE_CLK_SRC_DPLL_X2; | |
138 | else | |
139 | done_rate = CORE_CLK_SRC_DPLL; | |
140 | ||
141 | /* MPU divider */ | |
142 | cm_write_mod_reg(prcm->cm_clksel_mpu, MPU_MOD, CM_CLKSEL); | |
143 | ||
144 | /* dsp + iva1 div(2420), iva2.1(2430) */ | |
145 | cm_write_mod_reg(prcm->cm_clksel_dsp, | |
146 | OMAP24XX_DSP_MOD, CM_CLKSEL); | |
147 | ||
148 | cm_write_mod_reg(prcm->cm_clksel_gfx, GFX_MOD, CM_CLKSEL); | |
149 | ||
150 | /* Major subsystem dividers */ | |
151 | tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK; | |
152 | cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD, | |
153 | CM_CLKSEL1); | |
154 | ||
155 | if (cpu_is_omap2430()) | |
156 | cm_write_mod_reg(prcm->cm_clksel_mdm, | |
157 | OMAP2430_MDM_MOD, CM_CLKSEL); | |
158 | ||
159 | /* x2 to enter omap2xxx_sdrc_init_params() */ | |
160 | omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); | |
161 | ||
162 | omap2_set_prcm(prcm->cm_clksel1_pll, prcm->base_sdrc_rfr, | |
163 | bypass); | |
164 | ||
165 | omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked()); | |
166 | omap2xxx_sdrc_reprogram(done_rate, 0); | |
167 | ||
168 | local_irq_restore(flags); | |
169 | } | |
170 | ||
171 | return 0; | |
172 | } | |
173 | ||
174 | #ifdef CONFIG_CPU_FREQ | |
175 | /* | |
176 | * Walk PRCM rate table and fillout cpufreq freq_table | |
177 | * XXX This should be replaced by an OPP layer in the near future | |
178 | */ | |
179 | static struct cpufreq_frequency_table *freq_table; | |
180 | ||
181 | void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) | |
182 | { | |
183 | const struct prcm_config *prcm; | |
184 | long sys_ck_rate; | |
185 | int i = 0; | |
186 | int tbl_sz = 0; | |
187 | ||
188 | if (!cpu_is_omap24xx()) | |
189 | return; | |
190 | ||
191 | sys_ck_rate = clk_get_rate(sclk); | |
192 | ||
193 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | |
194 | if (!(prcm->flags & cpu_mask)) | |
195 | continue; | |
196 | if (prcm->xtal_speed != sys_ck_rate) | |
197 | continue; | |
198 | ||
199 | /* don't put bypass rates in table */ | |
200 | if (prcm->dpll_speed == prcm->xtal_speed) | |
201 | continue; | |
202 | ||
203 | tbl_sz++; | |
204 | } | |
205 | ||
206 | /* | |
207 | * XXX Ensure that we're doing what CPUFreq expects for this error | |
208 | * case and the following one | |
209 | */ | |
210 | if (tbl_sz == 0) { | |
211 | pr_warning("%s: no matching entries in rate_table\n", | |
212 | __func__); | |
213 | return; | |
214 | } | |
215 | ||
216 | /* Include the CPUFREQ_TABLE_END terminator entry */ | |
217 | tbl_sz++; | |
218 | ||
219 | freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz, | |
220 | GFP_ATOMIC); | |
221 | if (!freq_table) { | |
222 | pr_err("%s: could not kzalloc frequency table\n", __func__); | |
223 | return; | |
224 | } | |
225 | ||
226 | for (prcm = rate_table; prcm->mpu_speed; prcm++) { | |
227 | if (!(prcm->flags & cpu_mask)) | |
228 | continue; | |
229 | if (prcm->xtal_speed != sys_ck_rate) | |
230 | continue; | |
231 | ||
232 | /* don't put bypass rates in table */ | |
233 | if (prcm->dpll_speed == prcm->xtal_speed) | |
234 | continue; | |
235 | ||
236 | freq_table[i].index = i; | |
237 | freq_table[i].frequency = prcm->mpu_speed / 1000; | |
238 | i++; | |
239 | } | |
240 | ||
241 | freq_table[i].index = i; | |
242 | freq_table[i].frequency = CPUFREQ_TABLE_END; | |
243 | ||
244 | *table = &freq_table[0]; | |
245 | } | |
246 | ||
247 | void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | |
248 | { | |
249 | if (!cpu_is_omap24xx()) | |
250 | return; | |
251 | ||
252 | kfree(freq_table); | |
253 | } | |
254 | ||
255 | #endif |