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d459bfe0 PW |
1 | /* |
2 | * OMAP2/3 clockdomain framework functions | |
3 | * | |
4 | * Copyright (C) 2008 Texas Instruments, Inc. | |
5 | * Copyright (C) 2008 Nokia Corporation | |
6 | * | |
7 | * Written by Paul Walmsley and Jouni Högander | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | #ifdef CONFIG_OMAP_DEBUG_CLOCKDOMAIN | |
14 | # define DEBUG | |
15 | #endif | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/device.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/delay.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/limits.h> | |
5b74c676 | 25 | #include <linux/err.h> |
d459bfe0 PW |
26 | |
27 | #include <linux/io.h> | |
28 | ||
29 | #include <linux/bitops.h> | |
30 | ||
ce491cf8 | 31 | #include <plat/clock.h> |
d459bfe0 PW |
32 | |
33 | #include "prm.h" | |
34 | #include "prm-regbits-24xx.h" | |
35 | #include "cm.h" | |
36 | ||
ce491cf8 TL |
37 | #include <plat/powerdomain.h> |
38 | #include <plat/clockdomain.h> | |
d459bfe0 PW |
39 | |
40 | /* clkdm_list contains all registered struct clockdomains */ | |
41 | static LIST_HEAD(clkdm_list); | |
42 | ||
43 | /* clkdm_mutex protects clkdm_list add and del ops */ | |
44 | static DEFINE_MUTEX(clkdm_mutex); | |
45 | ||
46 | /* array of powerdomain deps to be added/removed when clkdm in hwsup mode */ | |
47 | static struct clkdm_pwrdm_autodep *autodeps; | |
48 | ||
49 | ||
50 | /* Private functions */ | |
51 | ||
52 | /* | |
53 | * _autodep_lookup - resolve autodep pwrdm names to pwrdm pointers; store | |
54 | * @autodep: struct clkdm_pwrdm_autodep * to resolve | |
55 | * | |
56 | * Resolve autodep powerdomain names to powerdomain pointers via | |
57 | * pwrdm_lookup() and store the pointers in the autodep structure. An | |
58 | * "autodep" is a powerdomain sleep/wakeup dependency that is | |
59 | * automatically added and removed whenever clocks in the associated | |
60 | * clockdomain are enabled or disabled (respectively) when the | |
61 | * clockdomain is in hardware-supervised mode. Meant to be called | |
62 | * once at clockdomain layer initialization, since these should remain | |
63 | * fixed for a particular architecture. No return value. | |
64 | */ | |
65 | static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep) | |
66 | { | |
67 | struct powerdomain *pwrdm; | |
68 | ||
69 | if (!autodep) | |
70 | return; | |
71 | ||
72 | if (!omap_chip_is(autodep->omap_chip)) | |
73 | return; | |
74 | ||
5b74c676 | 75 | pwrdm = pwrdm_lookup(autodep->pwrdm.name); |
d459bfe0 | 76 | if (!pwrdm) { |
7aec53ac RK |
77 | pr_err("clockdomain: autodeps: powerdomain %s does not exist\n", |
78 | autodep->pwrdm.name); | |
5b74c676 | 79 | pwrdm = ERR_PTR(-ENOENT); |
d459bfe0 | 80 | } |
5b74c676 | 81 | autodep->pwrdm.ptr = pwrdm; |
d459bfe0 PW |
82 | } |
83 | ||
84 | /* | |
85 | * _clkdm_add_autodeps - add auto sleepdeps/wkdeps to clkdm upon clock enable | |
86 | * @clkdm: struct clockdomain * | |
87 | * | |
88 | * Add the "autodep" sleep & wakeup dependencies to clockdomain 'clkdm' | |
89 | * in hardware-supervised mode. Meant to be called from clock framework | |
90 | * when a clock inside clockdomain 'clkdm' is enabled. No return value. | |
91 | */ | |
92 | static void _clkdm_add_autodeps(struct clockdomain *clkdm) | |
93 | { | |
94 | struct clkdm_pwrdm_autodep *autodep; | |
95 | ||
5b74c676 PW |
96 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { |
97 | if (IS_ERR(autodep->pwrdm.ptr)) | |
d459bfe0 PW |
98 | continue; |
99 | ||
d96df00d PW |
100 | if (!omap_chip_is(autodep->omap_chip)) |
101 | continue; | |
102 | ||
d459bfe0 | 103 | pr_debug("clockdomain: adding %s sleepdep/wkdep for " |
5b74c676 PW |
104 | "pwrdm %s\n", autodep->pwrdm.ptr->name, |
105 | clkdm->pwrdm.ptr->name); | |
d459bfe0 | 106 | |
5b74c676 PW |
107 | pwrdm_add_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
108 | pwrdm_add_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); | |
d459bfe0 PW |
109 | } |
110 | } | |
111 | ||
112 | /* | |
113 | * _clkdm_add_autodeps - remove auto sleepdeps/wkdeps from clkdm | |
114 | * @clkdm: struct clockdomain * | |
115 | * | |
116 | * Remove the "autodep" sleep & wakeup dependencies from clockdomain 'clkdm' | |
117 | * in hardware-supervised mode. Meant to be called from clock framework | |
118 | * when a clock inside clockdomain 'clkdm' is disabled. No return value. | |
119 | */ | |
120 | static void _clkdm_del_autodeps(struct clockdomain *clkdm) | |
121 | { | |
122 | struct clkdm_pwrdm_autodep *autodep; | |
123 | ||
5b74c676 PW |
124 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { |
125 | if (IS_ERR(autodep->pwrdm.ptr)) | |
d459bfe0 PW |
126 | continue; |
127 | ||
d96df00d PW |
128 | if (!omap_chip_is(autodep->omap_chip)) |
129 | continue; | |
130 | ||
d459bfe0 | 131 | pr_debug("clockdomain: removing %s sleepdep/wkdep for " |
5b74c676 PW |
132 | "pwrdm %s\n", autodep->pwrdm.ptr->name, |
133 | clkdm->pwrdm.ptr->name); | |
d459bfe0 | 134 | |
5b74c676 PW |
135 | pwrdm_del_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); |
136 | pwrdm_del_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); | |
d459bfe0 PW |
137 | } |
138 | } | |
139 | ||
a0219fbd KJ |
140 | /* |
141 | * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit | |
142 | * @clkdm: struct clockdomain * | |
143 | * @enable: int 0 to disable, 1 to enable | |
144 | * | |
145 | * Internal helper for actually switching the bit that controls hwsup | |
146 | * idle transitions for clkdm. | |
147 | */ | |
148 | static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) | |
149 | { | |
150 | u32 v; | |
151 | ||
152 | if (cpu_is_omap24xx()) { | |
153 | if (enable) | |
154 | v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; | |
155 | else | |
156 | v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; | |
157 | } else if (cpu_is_omap34xx()) { | |
158 | if (enable) | |
159 | v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; | |
160 | else | |
161 | v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; | |
162 | } else { | |
163 | BUG(); | |
164 | } | |
165 | ||
166 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, | |
167 | v << __ffs(clkdm->clktrctrl_mask), | |
168 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); | |
169 | } | |
d459bfe0 PW |
170 | |
171 | static struct clockdomain *_clkdm_lookup(const char *name) | |
172 | { | |
173 | struct clockdomain *clkdm, *temp_clkdm; | |
174 | ||
175 | if (!name) | |
176 | return NULL; | |
177 | ||
178 | clkdm = NULL; | |
179 | ||
180 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { | |
181 | if (!strcmp(name, temp_clkdm->name)) { | |
182 | clkdm = temp_clkdm; | |
183 | break; | |
184 | } | |
185 | } | |
186 | ||
187 | return clkdm; | |
188 | } | |
189 | ||
190 | ||
191 | /* Public functions */ | |
192 | ||
193 | /** | |
194 | * clkdm_init - set up the clockdomain layer | |
195 | * @clkdms: optional pointer to an array of clockdomains to register | |
196 | * @init_autodeps: optional pointer to an array of autodeps to register | |
197 | * | |
198 | * Set up internal state. If a pointer to an array of clockdomains | |
199 | * was supplied, loop through the list of clockdomains, register all | |
200 | * that are available on the current platform. Similarly, if a | |
201 | * pointer to an array of clockdomain-powerdomain autodependencies was | |
202 | * provided, register those. No return value. | |
203 | */ | |
204 | void clkdm_init(struct clockdomain **clkdms, | |
205 | struct clkdm_pwrdm_autodep *init_autodeps) | |
206 | { | |
207 | struct clockdomain **c = NULL; | |
208 | struct clkdm_pwrdm_autodep *autodep = NULL; | |
209 | ||
210 | if (clkdms) | |
211 | for (c = clkdms; *c; c++) | |
212 | clkdm_register(*c); | |
213 | ||
214 | autodeps = init_autodeps; | |
215 | if (autodeps) | |
5b74c676 | 216 | for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) |
d459bfe0 PW |
217 | _autodep_lookup(autodep); |
218 | } | |
219 | ||
220 | /** | |
221 | * clkdm_register - register a clockdomain | |
222 | * @clkdm: struct clockdomain * to register | |
223 | * | |
224 | * Adds a clockdomain to the internal clockdomain list. | |
225 | * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is | |
226 | * already registered by the provided name, or 0 upon success. | |
227 | */ | |
228 | int clkdm_register(struct clockdomain *clkdm) | |
229 | { | |
230 | int ret = -EINVAL; | |
231 | struct powerdomain *pwrdm; | |
232 | ||
233 | if (!clkdm || !clkdm->name) | |
234 | return -EINVAL; | |
235 | ||
236 | if (!omap_chip_is(clkdm->omap_chip)) | |
237 | return -EINVAL; | |
238 | ||
5b74c676 | 239 | pwrdm = pwrdm_lookup(clkdm->pwrdm.name); |
d459bfe0 | 240 | if (!pwrdm) { |
7aec53ac RK |
241 | pr_err("clockdomain: %s: powerdomain %s does not exist\n", |
242 | clkdm->name, clkdm->pwrdm.name); | |
d459bfe0 PW |
243 | return -EINVAL; |
244 | } | |
5b74c676 | 245 | clkdm->pwrdm.ptr = pwrdm; |
d459bfe0 PW |
246 | |
247 | mutex_lock(&clkdm_mutex); | |
248 | /* Verify that the clockdomain is not already registered */ | |
249 | if (_clkdm_lookup(clkdm->name)) { | |
250 | ret = -EEXIST; | |
251 | goto cr_unlock; | |
7aec53ac | 252 | } |
d459bfe0 PW |
253 | |
254 | list_add(&clkdm->node, &clkdm_list); | |
255 | ||
8420bb13 PW |
256 | pwrdm_add_clkdm(pwrdm, clkdm); |
257 | ||
d459bfe0 PW |
258 | pr_debug("clockdomain: registered %s\n", clkdm->name); |
259 | ret = 0; | |
260 | ||
261 | cr_unlock: | |
262 | mutex_unlock(&clkdm_mutex); | |
263 | ||
264 | return ret; | |
265 | } | |
266 | ||
267 | /** | |
268 | * clkdm_unregister - unregister a clockdomain | |
269 | * @clkdm: struct clockdomain * to unregister | |
270 | * | |
271 | * Removes a clockdomain from the internal clockdomain list. Returns | |
272 | * -EINVAL if clkdm argument is NULL. | |
273 | */ | |
274 | int clkdm_unregister(struct clockdomain *clkdm) | |
275 | { | |
276 | if (!clkdm) | |
277 | return -EINVAL; | |
278 | ||
5b74c676 | 279 | pwrdm_del_clkdm(clkdm->pwrdm.ptr, clkdm); |
8420bb13 | 280 | |
d459bfe0 PW |
281 | mutex_lock(&clkdm_mutex); |
282 | list_del(&clkdm->node); | |
283 | mutex_unlock(&clkdm_mutex); | |
284 | ||
285 | pr_debug("clockdomain: unregistered %s\n", clkdm->name); | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | /** | |
291 | * clkdm_lookup - look up a clockdomain by name, return a pointer | |
292 | * @name: name of clockdomain | |
293 | * | |
294 | * Find a registered clockdomain by its name. Returns a pointer to the | |
295 | * struct clockdomain if found, or NULL otherwise. | |
296 | */ | |
297 | struct clockdomain *clkdm_lookup(const char *name) | |
298 | { | |
299 | struct clockdomain *clkdm, *temp_clkdm; | |
300 | ||
301 | if (!name) | |
302 | return NULL; | |
303 | ||
304 | clkdm = NULL; | |
305 | ||
306 | mutex_lock(&clkdm_mutex); | |
307 | list_for_each_entry(temp_clkdm, &clkdm_list, node) { | |
308 | if (!strcmp(name, temp_clkdm->name)) { | |
309 | clkdm = temp_clkdm; | |
310 | break; | |
311 | } | |
312 | } | |
313 | mutex_unlock(&clkdm_mutex); | |
314 | ||
315 | return clkdm; | |
316 | } | |
317 | ||
318 | /** | |
319 | * clkdm_for_each - call function on each registered clockdomain | |
320 | * @fn: callback function * | |
321 | * | |
322 | * Call the supplied function for each registered clockdomain. | |
323 | * The callback function can return anything but 0 to bail | |
324 | * out early from the iterator. The callback function is called with | |
325 | * the clkdm_mutex held, so no clockdomain structure manipulation | |
326 | * functions should be called from the callback, although hardware | |
327 | * clockdomain control functions are fine. Returns the last return | |
328 | * value of the callback function, which should be 0 for success or | |
329 | * anything else to indicate failure; or -EINVAL if the function pointer | |
330 | * is null. | |
331 | */ | |
a23456e9 PDS |
332 | int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user), |
333 | void *user) | |
d459bfe0 PW |
334 | { |
335 | struct clockdomain *clkdm; | |
336 | int ret = 0; | |
337 | ||
338 | if (!fn) | |
339 | return -EINVAL; | |
340 | ||
341 | mutex_lock(&clkdm_mutex); | |
342 | list_for_each_entry(clkdm, &clkdm_list, node) { | |
a23456e9 | 343 | ret = (*fn)(clkdm, user); |
d459bfe0 PW |
344 | if (ret) |
345 | break; | |
346 | } | |
347 | mutex_unlock(&clkdm_mutex); | |
348 | ||
349 | return ret; | |
350 | } | |
351 | ||
352 | ||
e89087c9 PW |
353 | /** |
354 | * clkdm_get_pwrdm - return a ptr to the pwrdm that this clkdm resides in | |
355 | * @clkdm: struct clockdomain * | |
356 | * | |
357 | * Return a pointer to the struct powerdomain that the specified clockdomain | |
358 | * 'clkdm' exists in, or returns NULL if clkdm argument is NULL. | |
359 | */ | |
360 | struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) | |
361 | { | |
362 | if (!clkdm) | |
363 | return NULL; | |
364 | ||
5b74c676 | 365 | return clkdm->pwrdm.ptr; |
e89087c9 PW |
366 | } |
367 | ||
368 | ||
d459bfe0 PW |
369 | /* Hardware clockdomain control */ |
370 | ||
371 | /** | |
372 | * omap2_clkdm_clktrctrl_read - read the clkdm's current state transition mode | |
373 | * @clk: struct clk * of a clockdomain | |
374 | * | |
375 | * Return the clockdomain's current state transition mode from the | |
376 | * corresponding domain CM_CLKSTCTRL register. Returns -EINVAL if clk | |
377 | * is NULL or the current mode upon success. | |
378 | */ | |
379 | static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) | |
380 | { | |
381 | u32 v; | |
382 | ||
383 | if (!clkdm) | |
384 | return -EINVAL; | |
385 | ||
5b74c676 | 386 | v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
d459bfe0 PW |
387 | v &= clkdm->clktrctrl_mask; |
388 | v >>= __ffs(clkdm->clktrctrl_mask); | |
389 | ||
390 | return v; | |
391 | } | |
392 | ||
393 | /** | |
394 | * omap2_clkdm_sleep - force clockdomain sleep transition | |
395 | * @clkdm: struct clockdomain * | |
396 | * | |
397 | * Instruct the CM to force a sleep transition on the specified | |
398 | * clockdomain 'clkdm'. Returns -EINVAL if clk is NULL or if | |
399 | * clockdomain does not support software-initiated sleep; 0 upon | |
400 | * success. | |
401 | */ | |
402 | int omap2_clkdm_sleep(struct clockdomain *clkdm) | |
403 | { | |
404 | if (!clkdm) | |
405 | return -EINVAL; | |
406 | ||
407 | if (!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) { | |
408 | pr_debug("clockdomain: %s does not support forcing " | |
409 | "sleep via software\n", clkdm->name); | |
410 | return -EINVAL; | |
411 | } | |
412 | ||
413 | pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); | |
414 | ||
415 | if (cpu_is_omap24xx()) { | |
416 | ||
417 | cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, | |
5b74c676 | 418 | clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); |
d459bfe0 PW |
419 | |
420 | } else if (cpu_is_omap34xx()) { | |
421 | ||
422 | u32 v = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP << | |
423 | __ffs(clkdm->clktrctrl_mask)); | |
424 | ||
425 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | |
5b74c676 | 426 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
d459bfe0 PW |
427 | |
428 | } else { | |
429 | BUG(); | |
430 | }; | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | /** | |
436 | * omap2_clkdm_wakeup - force clockdomain wakeup transition | |
437 | * @clkdm: struct clockdomain * | |
438 | * | |
439 | * Instruct the CM to force a wakeup transition on the specified | |
440 | * clockdomain 'clkdm'. Returns -EINVAL if clkdm is NULL or if the | |
441 | * clockdomain does not support software-controlled wakeup; 0 upon | |
442 | * success. | |
443 | */ | |
444 | int omap2_clkdm_wakeup(struct clockdomain *clkdm) | |
445 | { | |
446 | if (!clkdm) | |
447 | return -EINVAL; | |
448 | ||
449 | if (!(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) { | |
450 | pr_debug("clockdomain: %s does not support forcing " | |
451 | "wakeup via software\n", clkdm->name); | |
452 | return -EINVAL; | |
453 | } | |
454 | ||
455 | pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); | |
456 | ||
457 | if (cpu_is_omap24xx()) { | |
458 | ||
459 | cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, | |
5b74c676 | 460 | clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); |
d459bfe0 PW |
461 | |
462 | } else if (cpu_is_omap34xx()) { | |
463 | ||
464 | u32 v = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP << | |
465 | __ffs(clkdm->clktrctrl_mask)); | |
466 | ||
467 | cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, | |
5b74c676 | 468 | clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); |
d459bfe0 PW |
469 | |
470 | } else { | |
471 | BUG(); | |
472 | }; | |
473 | ||
474 | return 0; | |
475 | } | |
476 | ||
477 | /** | |
478 | * omap2_clkdm_allow_idle - enable hwsup idle transitions for clkdm | |
479 | * @clkdm: struct clockdomain * | |
480 | * | |
481 | * Allow the hardware to automatically switch the clockdomain into | |
482 | * active or idle states, as needed by downstream clocks. If the | |
483 | * clockdomain has any downstream clocks enabled in the clock | |
484 | * framework, wkdep/sleepdep autodependencies are added; this is so | |
485 | * device drivers can read and write to the device. No return value. | |
486 | */ | |
487 | void omap2_clkdm_allow_idle(struct clockdomain *clkdm) | |
488 | { | |
d459bfe0 PW |
489 | if (!clkdm) |
490 | return; | |
491 | ||
492 | if (!(clkdm->flags & CLKDM_CAN_ENABLE_AUTO)) { | |
493 | pr_debug("clock: automatic idle transitions cannot be enabled " | |
494 | "on clockdomain %s\n", clkdm->name); | |
495 | return; | |
496 | } | |
497 | ||
498 | pr_debug("clockdomain: enabling automatic idle transitions for %s\n", | |
499 | clkdm->name); | |
500 | ||
501 | if (atomic_read(&clkdm->usecount) > 0) | |
502 | _clkdm_add_autodeps(clkdm); | |
503 | ||
a0219fbd | 504 | _omap2_clkdm_set_hwsup(clkdm, 1); |
ba20bb12 PDS |
505 | |
506 | pwrdm_clkdm_state_switch(clkdm); | |
d459bfe0 PW |
507 | } |
508 | ||
509 | /** | |
510 | * omap2_clkdm_deny_idle - disable hwsup idle transitions for clkdm | |
511 | * @clkdm: struct clockdomain * | |
512 | * | |
513 | * Prevent the hardware from automatically switching the clockdomain | |
514 | * into inactive or idle states. If the clockdomain has downstream | |
515 | * clocks enabled in the clock framework, wkdep/sleepdep | |
516 | * autodependencies are removed. No return value. | |
517 | */ | |
518 | void omap2_clkdm_deny_idle(struct clockdomain *clkdm) | |
519 | { | |
d459bfe0 PW |
520 | if (!clkdm) |
521 | return; | |
522 | ||
523 | if (!(clkdm->flags & CLKDM_CAN_DISABLE_AUTO)) { | |
524 | pr_debug("clockdomain: automatic idle transitions cannot be " | |
525 | "disabled on %s\n", clkdm->name); | |
526 | return; | |
527 | } | |
528 | ||
529 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | |
530 | clkdm->name); | |
531 | ||
a0219fbd | 532 | _omap2_clkdm_set_hwsup(clkdm, 0); |
d459bfe0 PW |
533 | |
534 | if (atomic_read(&clkdm->usecount) > 0) | |
535 | _clkdm_del_autodeps(clkdm); | |
536 | } | |
537 | ||
538 | ||
539 | /* Clockdomain-to-clock framework interface code */ | |
540 | ||
541 | /** | |
542 | * omap2_clkdm_clk_enable - add an enabled downstream clock to this clkdm | |
543 | * @clkdm: struct clockdomain * | |
544 | * @clk: struct clk * of the enabled downstream clock | |
545 | * | |
546 | * Increment the usecount of this clockdomain 'clkdm' and ensure that | |
547 | * it is awake. Intended to be called by clk_enable() code. If the | |
548 | * clockdomain is in software-supervised idle mode, force the | |
549 | * clockdomain to wake. If the clockdomain is in hardware-supervised | |
550 | * idle mode, add clkdm-pwrdm autodependencies, to ensure that devices | |
551 | * in the clockdomain can be read from/written to by on-chip processors. | |
552 | * Returns -EINVAL if passed null pointers; returns 0 upon success or | |
553 | * if the clockdomain is in hwsup idle mode. | |
554 | */ | |
555 | int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | |
556 | { | |
557 | int v; | |
558 | ||
559 | /* | |
560 | * XXX Rewrite this code to maintain a list of enabled | |
561 | * downstream clocks for debugging purposes? | |
562 | */ | |
563 | ||
564 | if (!clkdm || !clk) | |
565 | return -EINVAL; | |
566 | ||
567 | if (atomic_inc_return(&clkdm->usecount) > 1) | |
568 | return 0; | |
569 | ||
570 | /* Clockdomain now has one enabled downstream clock */ | |
571 | ||
572 | pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, | |
573 | clk->name); | |
574 | ||
575 | v = omap2_clkdm_clktrctrl_read(clkdm); | |
576 | ||
577 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | |
a0219fbd KJ |
578 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
579 | /* Disable HW transitions when we are changing deps */ | |
580 | _omap2_clkdm_set_hwsup(clkdm, 0); | |
d459bfe0 | 581 | _clkdm_add_autodeps(clkdm); |
a0219fbd KJ |
582 | _omap2_clkdm_set_hwsup(clkdm, 1); |
583 | } else { | |
d459bfe0 | 584 | omap2_clkdm_wakeup(clkdm); |
a0219fbd | 585 | } |
d459bfe0 | 586 | |
054ce503 | 587 | pwrdm_wait_transition(clkdm->pwrdm.ptr); |
fe617af7 | 588 | pwrdm_clkdm_state_switch(clkdm); |
054ce503 | 589 | |
d459bfe0 PW |
590 | return 0; |
591 | } | |
592 | ||
593 | /** | |
594 | * omap2_clkdm_clk_disable - remove an enabled downstream clock from this clkdm | |
595 | * @clkdm: struct clockdomain * | |
596 | * @clk: struct clk * of the disabled downstream clock | |
597 | * | |
598 | * Decrement the usecount of this clockdomain 'clkdm'. Intended to be | |
599 | * called by clk_disable() code. If the usecount goes to 0, put the | |
600 | * clockdomain to sleep (software-supervised mode) or remove the | |
601 | * clkdm-pwrdm autodependencies (hardware-supervised mode). Returns | |
602 | * -EINVAL if passed null pointers; -ERANGE if the clkdm usecount | |
603 | * underflows and debugging is enabled; or returns 0 upon success or | |
604 | * if the clockdomain is in hwsup idle mode. | |
605 | */ | |
606 | int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | |
607 | { | |
608 | int v; | |
609 | ||
610 | /* | |
611 | * XXX Rewrite this code to maintain a list of enabled | |
612 | * downstream clocks for debugging purposes? | |
613 | */ | |
614 | ||
615 | if (!clkdm || !clk) | |
616 | return -EINVAL; | |
617 | ||
618 | #ifdef DEBUG | |
619 | if (atomic_read(&clkdm->usecount) == 0) { | |
620 | WARN_ON(1); /* underflow */ | |
621 | return -ERANGE; | |
622 | } | |
623 | #endif | |
624 | ||
625 | if (atomic_dec_return(&clkdm->usecount) > 0) | |
626 | return 0; | |
627 | ||
628 | /* All downstream clocks of this clockdomain are now disabled */ | |
629 | ||
630 | pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, | |
631 | clk->name); | |
632 | ||
633 | v = omap2_clkdm_clktrctrl_read(clkdm); | |
634 | ||
635 | if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || | |
a0219fbd KJ |
636 | (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { |
637 | /* Disable HW transitions when we are changing deps */ | |
638 | _omap2_clkdm_set_hwsup(clkdm, 0); | |
d459bfe0 | 639 | _clkdm_del_autodeps(clkdm); |
a0219fbd KJ |
640 | _omap2_clkdm_set_hwsup(clkdm, 1); |
641 | } else { | |
d459bfe0 | 642 | omap2_clkdm_sleep(clkdm); |
a0219fbd | 643 | } |
d459bfe0 | 644 | |
fe617af7 PDS |
645 | pwrdm_clkdm_state_switch(clkdm); |
646 | ||
d459bfe0 PW |
647 | return 0; |
648 | } | |
649 |