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b2441318 1// SPDX-License-Identifier: GPL-2.0
801954d3 2/*
a5ffef6a 3 * OMAP2/3 clockdomain common data
801954d3 4 *
a5ffef6a 5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
98fa3d8a 6 * Copyright (C) 2008-2010 Nokia Corporation
801954d3 7 *
dc0b3a70 8 * Paul Walmsley, Jouni Högander
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9 *
10 * This file contains clockdomains and clockdomain wakeup/sleep
11 * dependencies for the OMAP2/3 chips. Some notes:
12 *
13 * A useful validation rule for struct clockdomain: Any clockdomain
14 * referenced by a wkdep_srcs or sleepdep_srcs array must have a
15 * dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really just
16 * software-controllable dependencies. Non-software-controllable
17 * dependencies do exist, but they are not encoded below (yet).
18 *
19 * 24xx does not support programmable sleep dependencies (SLEEPDEP)
20 *
21 * The overly-specific dep_bit names are due to a bit name collision
22 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
23 * value are the same for all powerdomains: 2
24 *
25 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
26 * sanity check?
27 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
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28 */
29
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30/*
31 * To-Do List
32 * -> Port the Sleep/Wakeup dependencies for the domains
33 * from the Power domain framework
34 */
35
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36#include <linux/kernel.h>
37#include <linux/io.h>
801954d3 38
1540f214 39#include "clockdomain.h"
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40#include "prm2xxx_3xxx.h"
41#include "cm2xxx_3xxx.h"
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42#include "cm-regbits-24xx.h"
43#include "cm-regbits-34xx.h"
44#include "cm-regbits-44xx.h"
45#include "prm-regbits-24xx.h"
46#include "prm-regbits-34xx.h"
801954d3 47
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48/*
49 * Clockdomain dependencies for wkdeps/sleepdeps
50 *
51 * XXX Hardware dependencies (e.g., dependencies that cannot be
52 * changed in software) are not included here yet, but should be.
53 */
54
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55/* Wakeup dependency source arrays */
56
a5ffef6a 57/* 2xxx-specific possible dependencies */
3d309cde 58
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59/* 2xxx PM_WKDEP_GFX: CORE, MPU, WKUP */
60struct clkdm_dep gfx_24xx_wkdeps[] = {
61 { .clkdm_name = "core_l3_clkdm" },
62 { .clkdm_name = "core_l4_clkdm" },
63 { .clkdm_name = "mpu_clkdm" },
64 { .clkdm_name = "wkup_clkdm" },
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65 { NULL },
66};
67
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68/* 2xxx PM_WKDEP_DSP: CORE, MPU, WKUP */
69struct clkdm_dep dsp_24xx_wkdeps[] = {
70 { .clkdm_name = "core_l3_clkdm" },
71 { .clkdm_name = "core_l4_clkdm" },
72 { .clkdm_name = "mpu_clkdm" },
73 { .clkdm_name = "wkup_clkdm" },
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74 { NULL },
75};
76
55ed9694 77
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78/*
79 * OMAP2/3-common clockdomains
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80 *
81 * Even though the 2420 has a single PRCM module from the
82 * interconnect's perspective, internally it does appear to have
83 * separate PRM and CM clockdomains. The usual test case is
84 * sys_clkout/sys_clkout2.
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85 */
86
87/* This is an implicit clockdomain - it is never defined as such in TRM */
a5ffef6a 88struct clockdomain wkup_common_clkdm = {
801954d3 89 .name = "wkup_clkdm",
5b74c676 90 .pwrdm = { .name = "wkup_pwrdm" },
55ed9694 91 .dep_bit = OMAP_EN_WKUP_SHIFT,
006c7f18 92 .flags = CLKDM_ACTIVE_WITH_MPU,
801954d3 93};