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Commit | Line | Data |
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b7ee79ab SS |
1 | /* |
2 | * OMAP2plus display device setup / initialization. | |
3 | * | |
4 | * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * Senthilvadivu Guruswamy | |
6 | * Sumit Semwal | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
13 | * kind, whether express or implied; without even the implied warranty | |
14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | */ | |
17 | ||
d44b28c4 | 18 | #include <linux/string.h> |
b7ee79ab SS |
19 | #include <linux/kernel.h> |
20 | #include <linux/init.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/io.h> | |
23 | #include <linux/clk.h> | |
24 | #include <linux/err.h> | |
25 | ||
a0b38cc4 | 26 | #include <video/omapdss.h> |
cf07f531 SG |
27 | #include <plat/omap_hwmod.h> |
28 | #include <plat/omap_device.h> | |
700dee78 | 29 | #include <plat/omap-pm.h> |
b7ee79ab | 30 | |
dc35835c TV |
31 | #include "control.h" |
32 | ||
b7ee79ab SS |
33 | static struct platform_device omap_display_device = { |
34 | .name = "omapdss", | |
35 | .id = -1, | |
36 | .dev = { | |
37 | .platform_data = NULL, | |
38 | }, | |
39 | }; | |
40 | ||
179e0453 AT |
41 | struct omap_dss_hwmod_data { |
42 | const char *oh_name; | |
43 | const char *dev_name; | |
44 | const int id; | |
45 | }; | |
46 | ||
47 | static const struct omap_dss_hwmod_data omap2_dss_hwmod_data[] __initdata = { | |
48 | { "dss_core", "omapdss_dss", -1 }, | |
49 | { "dss_dispc", "omapdss_dispc", -1 }, | |
50 | { "dss_rfbi", "omapdss_rfbi", -1 }, | |
51 | { "dss_venc", "omapdss_venc", -1 }, | |
52 | }; | |
53 | ||
54 | static const struct omap_dss_hwmod_data omap3_dss_hwmod_data[] __initdata = { | |
55 | { "dss_core", "omapdss_dss", -1 }, | |
56 | { "dss_dispc", "omapdss_dispc", -1 }, | |
57 | { "dss_rfbi", "omapdss_rfbi", -1 }, | |
58 | { "dss_venc", "omapdss_venc", -1 }, | |
7c68dd96 | 59 | { "dss_dsi1", "omapdss_dsi", 0 }, |
179e0453 AT |
60 | }; |
61 | ||
62 | static const struct omap_dss_hwmod_data omap4_dss_hwmod_data[] __initdata = { | |
63 | { "dss_core", "omapdss_dss", -1 }, | |
64 | { "dss_dispc", "omapdss_dispc", -1 }, | |
65 | { "dss_rfbi", "omapdss_rfbi", -1 }, | |
66 | { "dss_venc", "omapdss_venc", -1 }, | |
7c68dd96 TV |
67 | { "dss_dsi1", "omapdss_dsi", 0 }, |
68 | { "dss_dsi2", "omapdss_dsi", 1 }, | |
179e0453 AT |
69 | { "dss_hdmi", "omapdss_hdmi", -1 }, |
70 | }; | |
71 | ||
dc35835c TV |
72 | static int omap4_dsi_mux_pads(int dsi_id, unsigned lanes) |
73 | { | |
74 | u32 enable_mask, enable_shift; | |
75 | u32 pipd_mask, pipd_shift; | |
76 | u32 reg; | |
77 | ||
78 | if (dsi_id == 0) { | |
79 | enable_mask = OMAP4_DSI1_LANEENABLE_MASK; | |
80 | enable_shift = OMAP4_DSI1_LANEENABLE_SHIFT; | |
81 | pipd_mask = OMAP4_DSI1_PIPD_MASK; | |
82 | pipd_shift = OMAP4_DSI1_PIPD_SHIFT; | |
83 | } else if (dsi_id == 1) { | |
84 | enable_mask = OMAP4_DSI2_LANEENABLE_MASK; | |
85 | enable_shift = OMAP4_DSI2_LANEENABLE_SHIFT; | |
86 | pipd_mask = OMAP4_DSI2_PIPD_MASK; | |
87 | pipd_shift = OMAP4_DSI2_PIPD_SHIFT; | |
88 | } else { | |
89 | return -ENODEV; | |
90 | } | |
91 | ||
92 | reg = omap4_ctrl_pad_readl(OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); | |
93 | ||
94 | reg &= ~enable_mask; | |
95 | reg &= ~pipd_mask; | |
96 | ||
97 | reg |= (lanes << enable_shift) & enable_mask; | |
98 | reg |= (lanes << pipd_shift) & pipd_mask; | |
99 | ||
100 | omap4_ctrl_pad_writel(reg, OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY); | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
5bc416cb TV |
105 | static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) |
106 | { | |
dc35835c TV |
107 | if (cpu_is_omap44xx()) |
108 | return omap4_dsi_mux_pads(dsi_id, lane_mask); | |
109 | ||
5bc416cb TV |
110 | return 0; |
111 | } | |
112 | ||
113 | static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) | |
114 | { | |
dc35835c TV |
115 | if (cpu_is_omap44xx()) |
116 | omap4_dsi_mux_pads(dsi_id, 0); | |
5bc416cb TV |
117 | } |
118 | ||
b7ee79ab SS |
119 | int __init omap_display_init(struct omap_dss_board_info *board_data) |
120 | { | |
121 | int r = 0; | |
cf07f531 | 122 | struct omap_hwmod *oh; |
3528c58e | 123 | struct platform_device *pdev; |
179e0453 | 124 | int i, oh_count; |
cf07f531 | 125 | struct omap_display_platform_data pdata; |
179e0453 | 126 | const struct omap_dss_hwmod_data *curr_dss_hwmod; |
cf07f531 SG |
127 | |
128 | memset(&pdata, 0, sizeof(pdata)); | |
129 | ||
179e0453 AT |
130 | if (cpu_is_omap24xx()) { |
131 | curr_dss_hwmod = omap2_dss_hwmod_data; | |
132 | oh_count = ARRAY_SIZE(omap2_dss_hwmod_data); | |
133 | } else if (cpu_is_omap34xx()) { | |
134 | curr_dss_hwmod = omap3_dss_hwmod_data; | |
135 | oh_count = ARRAY_SIZE(omap3_dss_hwmod_data); | |
136 | } else { | |
137 | curr_dss_hwmod = omap4_dss_hwmod_data; | |
138 | oh_count = ARRAY_SIZE(omap4_dss_hwmod_data); | |
139 | } | |
545376e7 | 140 | |
5bc416cb TV |
141 | if (board_data->dsi_enable_pads == NULL) |
142 | board_data->dsi_enable_pads = omap_dsi_enable_pads; | |
143 | if (board_data->dsi_disable_pads == NULL) | |
144 | board_data->dsi_disable_pads = omap_dsi_disable_pads; | |
145 | ||
cf07f531 | 146 | pdata.board_data = board_data; |
700dee78 TV |
147 | pdata.board_data->get_context_loss_count = |
148 | omap_pm_get_dev_context_loss_count; | |
cf07f531 SG |
149 | |
150 | for (i = 0; i < oh_count; i++) { | |
179e0453 | 151 | oh = omap_hwmod_lookup(curr_dss_hwmod[i].oh_name); |
cf07f531 | 152 | if (!oh) { |
179e0453 AT |
153 | pr_err("Could not look up %s\n", |
154 | curr_dss_hwmod[i].oh_name); | |
cf07f531 SG |
155 | return -ENODEV; |
156 | } | |
fd4b34f6 | 157 | |
3528c58e | 158 | pdev = omap_device_build(curr_dss_hwmod[i].dev_name, |
179e0453 | 159 | curr_dss_hwmod[i].id, oh, &pdata, |
cf07f531 | 160 | sizeof(struct omap_display_platform_data), |
f718e2c0 | 161 | NULL, 0, 0); |
cf07f531 | 162 | |
3528c58e | 163 | if (WARN((IS_ERR(pdev)), "Could not build omap_device for %s\n", |
179e0453 | 164 | curr_dss_hwmod[i].oh_name)) |
cf07f531 SG |
165 | return -ENODEV; |
166 | } | |
b7ee79ab SS |
167 | omap_display_device.dev.platform_data = board_data; |
168 | ||
169 | r = platform_device_register(&omap_display_device); | |
170 | if (r < 0) | |
171 | printk(KERN_ERR "Unable to register OMAP-Display device\n"); | |
172 | ||
173 | return r; | |
174 | } |