[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-omap2 / i2c.c

/*
 * Helper module for board specific I2C bus registration
 *
 * Copyright (C) 2009 Nokia Corporation.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
 * 02110-1301 USA
 *
 */

#include "soc.h"
#include "omap_hwmod.h"
#include "omap_device.h"
#include "omap-pm.h"

#include "prm.h"
#include "common.h"
#include "i2c.h"

/* In register I2C_CON, Bit 15 is the I2C enable bit */
#define I2C_EN					BIT(15)
#define OMAP2_I2C_CON_OFFSET			0x24
#define OMAP4_I2C_CON_OFFSET			0xA4

#define MAX_OMAP_I2C_HWMOD_NAME_LEN	16

/**
 * omap_i2c_reset - reset the omap i2c module.
 * @oh: struct omap_hwmod *
 *
 * The i2c moudle in omap2, omap3 had a special sequence to reset. The
 * sequence is:
 * - Disable the I2C.
 * - Write to SOFTRESET bit.
 * - Enable the I2C.
 * - Poll on the RESETDONE bit.
 * The sequence is implemented in below function. This is called for 2420,
 * 2430 and omap3.
 */
int omap_i2c_reset(struct omap_hwmod *oh)
{
	u32 v;
	u16 i2c_con;
	int c = 0;

	if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
		i2c_con = OMAP4_I2C_CON_OFFSET;
	} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
		i2c_con = OMAP2_I2C_CON_OFFSET;
	} else {
		WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
		     oh->name);
		return -EINVAL;
	}

	/* Disable I2C */
	v = omap_hwmod_read(oh, i2c_con);
	v &= ~I2C_EN;
	omap_hwmod_write(v, oh, i2c_con);

	/* Write to the SOFTRESET bit */
	omap_hwmod_softreset(oh);

	/* Enable I2C */
	v = omap_hwmod_read(oh, i2c_con);
	v |= I2C_EN;
	omap_hwmod_write(v, oh, i2c_con);

	/* Poll on RESETDONE bit */
	omap_test_timeout((omap_hwmod_read(oh,
				oh->class->sysc->syss_offs)
				& SYSS_RESETDONE_MASK),
				MAX_MODULE_SOFTRESET_WAIT, c);

	if (c == MAX_MODULE_SOFTRESET_WAIT)
		pr_warn("%s: %s: softreset failed (waited %d usec)\n",
			__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
	else
		pr_debug("%s: %s: softreset in %d usec\n", __func__,
			oh->name, c);

	return 0;
}
Commit	Line	Data
b63128e8 TL	1	/*
	2	* Helper module for board specific I2C bus registration
	3	*
	4	* Copyright (C) 2009 Nokia Corporation.
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
	18	* 02110-1301 USA
	19	*
	20	*/
	21
e4c060db	22	#include "soc.h"
2a296c8f	23	#include "omap_hwmod.h"
25c7d49e	24	#include "omap_device.h"
18000985	25	#include "omap-pm.h"
b63128e8	26
b13159af PW	27	#include "prm.h"
b13159af PW	28	#include "common.h"
3a8761c0	29	#include "i2c.h"
b63128e8	30
6d3c55fd A	31	/* In register I2C_CON, Bit 15 is the I2C enable bit */
	32	#define I2C_EN BIT(15)
	33	#define OMAP2_I2C_CON_OFFSET 0x24
	34	#define OMAP4_I2C_CON_OFFSET 0xA4
	35
3a8761c0 TL	36	#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
3a8761c0 TL	37
6d3c55fd A	38	/**
	39	* omap_i2c_reset - reset the omap i2c module.
	40	* @oh: struct omap_hwmod *
	41	*
	42	* The i2c moudle in omap2, omap3 had a special sequence to reset. The
	43	* sequence is:
	44	* - Disable the I2C.
	45	* - Write to SOFTRESET bit.
	46	* - Enable the I2C.
	47	* - Poll on the RESETDONE bit.
	48	* The sequence is implemented in below function. This is called for 2420,
	49	* 2430 and omap3.
	50	*/
	51	int omap_i2c_reset(struct omap_hwmod *oh)
	52	{
	53	u32 v;
	54	u16 i2c_con;
	55	int c = 0;
	56
	57	if (oh->class->rev == OMAP_I2C_IP_VERSION_2) {
	58	i2c_con = OMAP4_I2C_CON_OFFSET;
	59	} else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) {
	60	i2c_con = OMAP2_I2C_CON_OFFSET;
	61	} else {
	62	WARN(1, "Cannot reset I2C block %s: unsupported revision\n",
	63	oh->name);
	64	return -EINVAL;
	65	}
	66
	67	/* Disable I2C */
	68	v = omap_hwmod_read(oh, i2c_con);
	69	v &= ~I2C_EN;
	70	omap_hwmod_write(v, oh, i2c_con);
	71
	72	/* Write to the SOFTRESET bit */
	73	omap_hwmod_softreset(oh);
	74
	75	/* Enable I2C */
	76	v = omap_hwmod_read(oh, i2c_con);
	77	v \|= I2C_EN;
	78	omap_hwmod_write(v, oh, i2c_con);
	79
	80	/* Poll on RESETDONE bit */
	81	omap_test_timeout((omap_hwmod_read(oh,
	82	oh->class->sysc->syss_offs)
	83	& SYSS_RESETDONE_MASK),
	84	MAX_MODULE_SOFTRESET_WAIT, c);
	85
	86	if (c == MAX_MODULE_SOFTRESET_WAIT)
3d0cb73e	87	pr_warn("%s: %s: softreset failed (waited %d usec)\n",
6d3c55fd A	88	__func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
	89	else
	90	pr_debug("%s: %s: softreset in %d usec\n", __func__,
	91	oh->name, c);
	92
	93	return 0;
	94	}