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0c0a5d61 TG |
1 | /* |
2 | * OMAP3/OMAP4 smartreflex device file | |
3 | * | |
4 | * Author: Thara Gopinath <thara@ti.com> | |
5 | * | |
6 | * Based originally on code from smartreflex.c | |
7 | * Copyright (C) 2010 Texas Instruments, Inc. | |
8 | * Thara Gopinath <thara@ti.com> | |
9 | * | |
10 | * Copyright (C) 2008 Nokia Corporation | |
11 | * Kalle Jokiniemi | |
12 | * | |
13 | * Copyright (C) 2007 Texas Instruments, Inc. | |
14 | * Lesly A M <x0080970@ti.com> | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License version 2 as | |
18 | * published by the Free Software Foundation. | |
19 | */ | |
b86aeafc | 20 | #include <linux/power/smartreflex.h> |
0c0a5d61 TG |
21 | |
22 | #include <linux/err.h> | |
23 | #include <linux/slab.h> | |
b35cecf9 | 24 | #include <linux/io.h> |
0c0a5d61 | 25 | |
e4c060db | 26 | #include "soc.h" |
25c7d49e | 27 | #include "omap_device.h" |
e1d6f472 | 28 | #include "voltage.h" |
0c0a5d61 | 29 | #include "control.h" |
d0eadf6d | 30 | #include "pm.h" |
0c0a5d61 TG |
31 | |
32 | static bool sr_enable_on_init; | |
33 | ||
0c0a5d61 TG |
34 | /* Read EFUSE values from control registers for OMAP3430 */ |
35 | static void __init sr_set_nvalues(struct omap_volt_data *volt_data, | |
36 | struct omap_sr_data *sr_data) | |
37 | { | |
38 | struct omap_sr_nvalue_table *nvalue_table; | |
5e7f2e12 JP |
39 | int i, j, count = 0; |
40 | ||
41 | sr_data->nvalue_count = 0; | |
42 | sr_data->nvalue_table = NULL; | |
0c0a5d61 TG |
43 | |
44 | while (volt_data[count].volt_nominal) | |
45 | count++; | |
46 | ||
6b72de4d | 47 | nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL); |
c76e4d2e | 48 | if (!nvalue_table) |
5e7f2e12 | 49 | return; |
5e7f2e12 JP |
50 | |
51 | for (i = 0, j = 0; i < count; i++) { | |
b35cecf9 | 52 | u32 v; |
5e7f2e12 | 53 | |
b35cecf9 TG |
54 | /* |
55 | * In OMAP4 the efuse registers are 24 bit aligned. | |
edfaf05c | 56 | * A readl_relaxed will fail for non-32 bit aligned address |
b35cecf9 TG |
57 | * and hence the 8-bit read and shift. |
58 | */ | |
59 | if (cpu_is_omap44xx()) { | |
60 | u16 offset = volt_data[i].sr_efuse_offs; | |
61 | ||
62 | v = omap_ctrl_readb(offset) | | |
63 | omap_ctrl_readb(offset + 1) << 8 | | |
64 | omap_ctrl_readb(offset + 2) << 16; | |
65 | } else { | |
5e7f2e12 | 66 | v = omap_ctrl_readl(volt_data[i].sr_efuse_offs); |
b35cecf9 | 67 | } |
0c0a5d61 | 68 | |
5e7f2e12 JP |
69 | /* |
70 | * Many OMAP SoCs don't have the eFuse values set. | |
71 | * For example, pretty much all OMAP3xxx before | |
72 | * ES3.something. | |
73 | * | |
74 | * XXX There needs to be some way for board files or | |
75 | * userspace to add these in. | |
76 | */ | |
77 | if (v == 0) | |
78 | continue; | |
79 | ||
80 | nvalue_table[j].nvalue = v; | |
81 | nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs; | |
82 | nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit; | |
83 | nvalue_table[j].volt_nominal = volt_data[i].volt_nominal; | |
84 | ||
85 | j++; | |
0c0a5d61 TG |
86 | } |
87 | ||
88 | sr_data->nvalue_table = nvalue_table; | |
5e7f2e12 | 89 | sr_data->nvalue_count = j; |
0c0a5d61 TG |
90 | } |
91 | ||
d060b405 TL |
92 | extern struct omap_sr_data omap_sr_pdata[]; |
93 | ||
9cf793f9 | 94 | static int __init sr_dev_init(struct omap_hwmod *oh, void *user) |
0c0a5d61 | 95 | { |
695eea3d | 96 | struct omap_sr_data *sr_data = NULL; |
0c0a5d61 | 97 | struct omap_volt_data *volt_data; |
cea6b942 | 98 | struct omap_smartreflex_dev_attr *sr_dev_attr; |
0c0a5d61 TG |
99 | static int i; |
100 | ||
695eea3d TL |
101 | if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) || |
102 | !strncmp(oh->name, "smartreflex_mpu", 16)) | |
103 | sr_data = &omap_sr_pdata[OMAP_SR_MPU]; | |
104 | else if (!strncmp(oh->name, "smartreflex_core", 17)) | |
105 | sr_data = &omap_sr_pdata[OMAP_SR_CORE]; | |
106 | else if (!strncmp(oh->name, "smartreflex_iva", 16)) | |
107 | sr_data = &omap_sr_pdata[OMAP_SR_IVA]; | |
108 | ||
109 | if (!sr_data) { | |
110 | pr_err("%s: Unknown instance %s\n", __func__, oh->name); | |
111 | return -EINVAL; | |
112 | } | |
0c0a5d61 | 113 | |
cea6b942 SG |
114 | sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr; |
115 | if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) { | |
7852ec05 PW |
116 | pr_err("%s: No voltage domain specified for %s. Cannot initialize\n", |
117 | __func__, oh->name); | |
0c0a5d61 TG |
118 | goto exit; |
119 | } | |
120 | ||
8b765d72 | 121 | sr_data->name = oh->name; |
70451127 TL |
122 | if (cpu_is_omap343x()) |
123 | sr_data->ip_type = 1; | |
124 | else | |
125 | sr_data->ip_type = 2; | |
0c0a5d61 TG |
126 | sr_data->senn_mod = 0x1; |
127 | sr_data->senp_mod = 0x1; | |
128 | ||
98aed08e JP |
129 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { |
130 | sr_data->err_weight = OMAP3430_SR_ERRWEIGHT; | |
131 | sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | |
132 | sr_data->accum_data = OMAP3430_SR_ACCUMDATA; | |
133 | if (!(strcmp(sr_data->name, "smartreflex_mpu"))) { | |
134 | sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | |
135 | sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | |
136 | } else { | |
137 | sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | |
138 | sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | |
139 | } | |
140 | } | |
141 | ||
cea6b942 | 142 | sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); |
07684c1b | 143 | if (!sr_data->voltdm) { |
0c0a5d61 | 144 | pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", |
cea6b942 | 145 | __func__, sr_dev_attr->sensor_voltdm_name); |
0c0a5d61 TG |
146 | goto exit; |
147 | } | |
148 | ||
149 | omap_voltage_get_volttable(sr_data->voltdm, &volt_data); | |
150 | if (!volt_data) { | |
7852ec05 PW |
151 | pr_err("%s: No Voltage table registered for VDD%d\n", |
152 | __func__, i + 1); | |
0c0a5d61 TG |
153 | goto exit; |
154 | } | |
155 | ||
156 | sr_set_nvalues(volt_data, sr_data); | |
157 | ||
158 | sr_data->enable_on_init = sr_enable_on_init; | |
159 | ||
0c0a5d61 TG |
160 | exit: |
161 | i++; | |
695eea3d | 162 | |
0c0a5d61 TG |
163 | return 0; |
164 | } | |
165 | ||
166 | /* | |
167 | * API to be called from board files to enable smartreflex | |
168 | * autocompensation at init. | |
169 | */ | |
170 | void __init omap_enable_smartreflex_on_init(void) | |
171 | { | |
172 | sr_enable_on_init = true; | |
173 | } | |
174 | ||
175 | int __init omap_devinit_smartreflex(void) | |
176 | { | |
177 | return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL); | |
178 | } |