[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-omap2 / vp.c

#include <linux/kernel.h>
#include <linux/init.h>

#include "common.h"

#include "voltage.h"
#include "vp.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"
#include "prm44xx.h"

static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	char vsel;

	vsel = voltdm->pmic->uv_to_vsel(volt);

	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask |
		      vp->common->vpconfig_forceupdate |
		      vp->common->vpconfig_initvdd);
	vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
	voltdm->write(vpconfig, vp->vpconfig);

	/* Trigger initVDD value copy to voltage processor */
	voltdm->write((vpconfig | vp->common->vpconfig_initvdd),
		       vp->vpconfig);

	/* Clear initVDD copy trigger bit */
	voltdm->write(vpconfig, vp->vpconfig);

	return vpconfig;
}

/* Generic voltage init functions */
void __init omap_vp_init(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 val, sys_clk_rate, timeout, waittime;
	u32 vddmin, vddmax, vstepmin, vstepmax;

	if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) {
		pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
		return;
	}

	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	vp->enabled = false;

	/* Divide to avoid overflow */
	sys_clk_rate = voltdm->sys_clk.rate / 1000;

	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
	vddmin = voltdm->pmic->vp_vddmin;
	vddmax = voltdm->pmic->vp_vddmax;

	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
		    sys_clk_rate) / 1000;
	vstepmin = voltdm->pmic->vp_vstepmin;
	vstepmax = voltdm->pmic->vp_vstepmax;

	/*
	 * VP_CONFIG: error gain is not set here, it will be updated
	 * on each scale, based on OPP.
	 */
	val = (voltdm->pmic->vp_erroroffset <<
	       __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) |
		vp->common->vpconfig_timeouten;
	voltdm->write(val, vp->vpconfig);

	/* VSTEPMIN */
	val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) |
		(vstepmin <<  vp->common->vstepmin_stepmin_shift);
	voltdm->write(val, vp->vstepmin);

	/* VSTEPMAX */
	val = (vstepmax << vp->common->vstepmax_stepmax_shift) |
		(waittime << vp->common->vstepmax_smpswaittimemax_shift);
	voltdm->write(val, vp->vstepmax);

	/* VLIMITTO */
	val = (vddmax << vp->common->vlimitto_vddmax_shift) |
		(vddmin << vp->common->vlimitto_vddmin_shift) |
		(timeout <<  vp->common->vlimitto_timeout_shift);
	voltdm->write(val, vp->vlimitto);
}

int omap_vp_update_errorgain(struct voltagedomain *voltdm,
			     unsigned long target_volt)
{
	struct omap_volt_data *volt_data;

	if (!voltdm->vp)
		return -EINVAL;

	/* Get volt_data corresponding to target_volt */
	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	if (IS_ERR(volt_data))
		return -EINVAL;

	/* Setting vp errorgain based on the voltage */
	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
		    volt_data->vp_errgain <<
		    __ffs(voltdm->vp->common->vpconfig_errorgain_mask),
		    voltdm->vp->vpconfig);

	return 0;
}

/* VP force update method of voltage scaling */
int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
			      unsigned long target_volt)
{
	struct omap_vp_instance *vp = voltdm->vp;
	u32 vpconfig;
	u8 target_vsel, current_vsel;
	int ret, timeout = 0;

	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	if (ret)
		return ret;

	/*
	 * Clear all pending TransactionDone interrupt/status. Typical latency
	 * is <3us
	 */
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}
	if (timeout >= VP_TRANXDONE_TIMEOUT) {
		pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
			"Voltage change aborted", __func__, voltdm->name);
		return -ETIMEDOUT;
	}

	vpconfig = _vp_set_init_voltage(voltdm, target_volt);

	/* Force update of voltage */
	voltdm->write(vpconfig | vp->common->vpconfig_forceupdate,
		      voltdm->vp->vpconfig);

	/*
	 * Wait for TransactionDone. Typical latency is <200us.
	 * Depends on SMPSWAITTIMEMIN/MAX and voltage change
	 */
	timeout = 0;
	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
			  VP_TRANXDONE_TIMEOUT, timeout);
	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
			"TRANXDONE never got set after the voltage update\n",
			__func__, voltdm->name);

	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);

	/*
	 * Disable TransactionDone interrupt , clear all status, clear
	 * control registers
	 */
	timeout = 0;
	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
		vp->common->ops->clear_txdone(vp->id);
		if (!vp->common->ops->check_txdone(vp->id))
			break;
		udelay(1);
	}

	if (timeout >= VP_TRANXDONE_TIMEOUT)
		pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
			"to clear the TRANXDONE status\n",
			__func__, voltdm->name);

	/* Clear force bit */
	voltdm->write(vpconfig, vp->vpconfig);

	return 0;
}

/**
 * omap_vp_enable() - API to enable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be enabled.
 *
 * This API enables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_enable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig, volt;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warning("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already enabled, do nothing. Return */
	if (vp->enabled)
		return;

	volt = voltdm_get_voltage(voltdm);
	if (!volt) {
		pr_warning("%s: unable to find current voltage for %s\n",
			   __func__, voltdm->name);
		return;
	}

	vpconfig = _vp_set_init_voltage(voltdm, volt);

	/* Enable VP */
	vpconfig |= vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);

	vp->enabled = true;
}

/**
 * omap_vp_disable() - API to disable a particular VP
 * @voltdm:	pointer to the VDD whose VP is to be disabled.
 *
 * This API disables a particular voltage processor. Needed by the smartreflex
 * class drivers.
 */
void omap_vp_disable(struct voltagedomain *voltdm)
{
	struct omap_vp_instance *vp;
	u32 vpconfig;
	int timeout;

	if (!voltdm || IS_ERR(voltdm)) {
		pr_warning("%s: VDD specified does not exist!\n", __func__);
		return;
	}

	vp = voltdm->vp;
	if (!voltdm->read || !voltdm->write) {
		pr_err("%s: No read/write API for accessing vdd_%s regs\n",
			__func__, voltdm->name);
		return;
	}

	/* If VP is already disabled, do nothing. Return */
	if (!vp->enabled) {
		pr_warning("%s: Trying to disable VP for vdd_%s when"
			"it is already disabled\n", __func__, voltdm->name);
		return;
	}

	/* Disable VP */
	vpconfig = voltdm->read(vp->vpconfig);
	vpconfig &= ~vp->common->vpconfig_vpenable;
	voltdm->write(vpconfig, vp->vpconfig);

	/*
	 * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	 */
	omap_test_timeout((voltdm->read(vp->vstatus)),
			  VP_IDLE_TIMEOUT, timeout);

	if (timeout >= VP_IDLE_TIMEOUT)
		pr_warning("%s: vdd_%s idle timedout\n",
			__func__, voltdm->name);

	vp->enabled = false;

	return;
}
Commit	Line	Data
01f48d30 KH	1	#include <linux/kernel.h>
01f48d30 KH	2	#include <linux/init.h>
01f48d30	3
4e65331c	4	#include "common.h"
01f48d30 KH	5
	6	#include "voltage.h"
	7	#include "vp.h"
	8	#include "prm-regbits-34xx.h"
	9	#include "prm-regbits-44xx.h"
	10	#include "prm44xx.h"
	11
b666b476	12	static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt)
01f48d30	13	{
b7ea803e	14	struct omap_vp_instance *vp = voltdm->vp;
01f48d30	15	u32 vpconfig;
01f48d30	16	char vsel;
01f48d30	17
b666b476	18	vsel = voltdm->pmic->uv_to_vsel(volt);
01f48d30	19
4bcc475e	20	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	21	vpconfig &= ~(vp->common->vpconfig_initvoltage_mask \|
b666b476 KH	22	vp->common->vpconfig_forceupdate \|
b666b476 KH	23	vp->common->vpconfig_initvdd);
0ec3041e	24	vpconfig \|= vsel << __ffs(vp->common->vpconfig_initvoltage_mask);
4bcc475e	25	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	26
01f48d30 KH	27	/* Trigger initVDD value copy to voltage processor */
b7ea803e	28	voltdm->write((vpconfig \| vp->common->vpconfig_initvdd),
4bcc475e	29	vp->vpconfig);
01f48d30 KH	30
01f48d30 KH	31	/* Clear initVDD copy trigger bit */
4bcc475e	32	voltdm->write(vpconfig, vp->vpconfig);
b666b476 KH	33
b666b476 KH	34	return vpconfig;
01f48d30 KH	35	}
	36
	37	/* Generic voltage init functions */
	38	void __init omap_vp_init(struct voltagedomain *voltdm)
	39	{
b7ea803e	40	struct omap_vp_instance *vp = voltdm->vp;
667216d6 KH	41	u32 val, sys_clk_rate, timeout, waittime;
667216d6 KH	42	u32 vddmin, vddmax, vstepmin, vstepmax;
01f48d30	43
d980e0f8 RK	44	if (!voltdm->pmic \|\| !voltdm->pmic->uv_to_vsel) {
	45	pr_err("%s: No PMIC info for vdd_%s\n", __func__, voltdm->name);
	46	return;
	47	}
	48
4bcc475e	49	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	50	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	51	__func__, voltdm->name);
	52	return;
	53	}
	54
6f567273 KH	55	vp->enabled = false;
	56
	57	/* Divide to avoid overflow */
	58	sys_clk_rate = voltdm->sys_clk.rate / 1000;
	59
667216d6 KH	60	timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000;
	61	vddmin = voltdm->pmic->vp_vddmin;
	62	vddmax = voltdm->pmic->vp_vddmax;
6f567273 KH	63
	64	waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) *
	65	sys_clk_rate) / 1000;
667216d6 KH	66	vstepmin = voltdm->pmic->vp_vstepmin;
	67	vstepmax = voltdm->pmic->vp_vstepmax;
	68
	69	/*
	70	* VP_CONFIG: error gain is not set here, it will be updated
	71	* on each scale, based on OPP.
	72	*/
	73	val = (voltdm->pmic->vp_erroroffset <<
	74	__ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) \|
b7ea803e	75	vp->common->vpconfig_timeouten;
667216d6 KH	76	voltdm->write(val, vp->vpconfig);
	77
	78	/* VSTEPMIN */
	79	val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) \|
	80	(vstepmin << vp->common->vstepmin_stepmin_shift);
	81	voltdm->write(val, vp->vstepmin);
	82
	83	/* VSTEPMAX */
	84	val = (vstepmax << vp->common->vstepmax_stepmax_shift) \|
	85	(waittime << vp->common->vstepmax_smpswaittimemax_shift);
	86	voltdm->write(val, vp->vstepmax);
	87
	88	/* VLIMITTO */
	89	val = (vddmax << vp->common->vlimitto_vddmax_shift) \|
	90	(vddmin << vp->common->vlimitto_vddmin_shift) \|
	91	(timeout << vp->common->vlimitto_timeout_shift);
	92	voltdm->write(val, vp->vlimitto);
01f48d30 KH	93	}
01f48d30 KH	94
76ea7424 KH	95	int omap_vp_update_errorgain(struct voltagedomain *voltdm,
	96	unsigned long target_volt)
	97	{
	98	struct omap_volt_data *volt_data;
	99
8798c4ab KH	100	if (!voltdm->vp)
	101	return -EINVAL;
	102
76ea7424 KH	103	/* Get volt_data corresponding to target_volt */
	104	volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
	105	if (IS_ERR(volt_data))
	106	return -EINVAL;
	107
	108	/* Setting vp errorgain based on the voltage */
	109	voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask,
	110	volt_data->vp_errgain <<
	111	__ffs(voltdm->vp->common->vpconfig_errorgain_mask),
	112	voltdm->vp->vpconfig);
	113
	114	return 0;
	115	}
	116
01f48d30 KH	117	/* VP force update method of voltage scaling */
	118	int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
	119	unsigned long target_volt)
	120	{
b7ea803e	121	struct omap_vp_instance *vp = voltdm->vp;
01f48d30 KH	122	u32 vpconfig;
	123	u8 target_vsel, current_vsel;
	124	int ret, timeout = 0;
	125
	126	ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
	127	if (ret)
	128	return ret;
	129
	130	/*
	131	* Clear all pending TransactionDone interrupt/status. Typical latency
	132	* is <3us
	133	*/
	134	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	135	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	136	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	137	break;
	138	udelay(1);
	139	}
	140	if (timeout >= VP_TRANXDONE_TIMEOUT) {
	141	pr_warning("%s: vdd_%s TRANXDONE timeout exceeded."
	142	"Voltage change aborted", __func__, voltdm->name);
	143	return -ETIMEDOUT;
	144	}
	145
b666b476	146	vpconfig = _vp_set_init_voltage(voltdm, target_volt);
01f48d30 KH	147
01f48d30 KH	148	/* Force update of voltage */
b666b476 KH	149	voltdm->write(vpconfig \| vp->common->vpconfig_forceupdate,
b666b476 KH	150	voltdm->vp->vpconfig);
01f48d30 KH	151
	152	/*
	153	* Wait for TransactionDone. Typical latency is <200us.
	154	* Depends on SMPSWAITTIMEMIN/MAX and voltage change
	155	*/
	156	timeout = 0;
b7ea803e	157	omap_test_timeout(vp->common->ops->check_txdone(vp->id),
01f48d30 KH	158	VP_TRANXDONE_TIMEOUT, timeout);
	159	if (timeout >= VP_TRANXDONE_TIMEOUT)
	160	pr_err("%s: vdd_%s TRANXDONE timeout exceeded."
	161	"TRANXDONE never got set after the voltage update\n",
	162	__func__, voltdm->name);
	163
	164	omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
	165
	166	/*
	167	* Disable TransactionDone interrupt , clear all status, clear
	168	* control registers
	169	*/
	170	timeout = 0;
	171	while (timeout++ < VP_TRANXDONE_TIMEOUT) {
b7ea803e KH	172	vp->common->ops->clear_txdone(vp->id);
b7ea803e KH	173	if (!vp->common->ops->check_txdone(vp->id))
01f48d30 KH	174	break;
	175	udelay(1);
	176	}
	177
	178	if (timeout >= VP_TRANXDONE_TIMEOUT)
	179	pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying"
	180	"to clear the TRANXDONE status\n",
	181	__func__, voltdm->name);
	182
01f48d30	183	/* Clear force bit */
4bcc475e	184	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	185
	186	return 0;
	187	}
	188
01f48d30 KH	189	/**
	190	* omap_vp_enable() - API to enable a particular VP
	191	* @voltdm: pointer to the VDD whose VP is to be enabled.
	192	*
	193	* This API enables a particular voltage processor. Needed by the smartreflex
	194	* class drivers.
	195	*/
	196	void omap_vp_enable(struct voltagedomain *voltdm)
	197	{
b7ea803e	198	struct omap_vp_instance *vp;
b666b476	199	u32 vpconfig, volt;
01f48d30 KH	200
	201	if (!voltdm \|\| IS_ERR(voltdm)) {
	202	pr_warning("%s: VDD specified does not exist!\n", __func__);
	203	return;
	204	}
	205
b7ea803e	206	vp = voltdm->vp;
4bcc475e	207	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	208	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	209	__func__, voltdm->name);
	210	return;
	211	}
	212
	213	/* If VP is already enabled, do nothing. Return */
b7ea803e	214	if (vp->enabled)
01f48d30 KH	215	return;
01f48d30 KH	216
b666b476 KH	217	volt = voltdm_get_voltage(voltdm);
	218	if (!volt) {
	219	pr_warning("%s: unable to find current voltage for %s\n",
	220	__func__, voltdm->name);
	221	return;
	222	}
	223
	224	vpconfig = _vp_set_init_voltage(voltdm, volt);
01f48d30 KH	225
01f48d30 KH	226	/* Enable VP */
b7ea803e	227	vpconfig \|= vp->common->vpconfig_vpenable;
4bcc475e	228	voltdm->write(vpconfig, vp->vpconfig);
b666b476	229
b7ea803e	230	vp->enabled = true;
01f48d30 KH	231	}
	232
	233	/**
	234	* omap_vp_disable() - API to disable a particular VP
	235	* @voltdm: pointer to the VDD whose VP is to be disabled.
	236	*
	237	* This API disables a particular voltage processor. Needed by the smartreflex
	238	* class drivers.
	239	*/
	240	void omap_vp_disable(struct voltagedomain *voltdm)
	241	{
b7ea803e	242	struct omap_vp_instance *vp;
01f48d30 KH	243	u32 vpconfig;
	244	int timeout;
	245
	246	if (!voltdm \|\| IS_ERR(voltdm)) {
	247	pr_warning("%s: VDD specified does not exist!\n", __func__);
	248	return;
	249	}
	250
b7ea803e	251	vp = voltdm->vp;
4bcc475e	252	if (!voltdm->read \|\| !voltdm->write) {
01f48d30 KH	253	pr_err("%s: No read/write API for accessing vdd_%s regs\n",
	254	__func__, voltdm->name);
	255	return;
	256	}
	257
	258	/* If VP is already disabled, do nothing. Return */
b7ea803e	259	if (!vp->enabled) {
01f48d30 KH	260	pr_warning("%s: Trying to disable VP for vdd_%s when"
	261	"it is already disabled\n", __func__, voltdm->name);
	262	return;
	263	}
	264
	265	/* Disable VP */
4bcc475e	266	vpconfig = voltdm->read(vp->vpconfig);
b7ea803e	267	vpconfig &= ~vp->common->vpconfig_vpenable;
4bcc475e	268	voltdm->write(vpconfig, vp->vpconfig);
01f48d30 KH	269
	270	/*
	271	* Wait for VP idle Typical latency is <2us. Maximum latency is ~100us
	272	*/
4bcc475e KH	273	omap_test_timeout((voltdm->read(vp->vstatus)),
4bcc475e KH	274	VP_IDLE_TIMEOUT, timeout);
01f48d30 KH	275
	276	if (timeout >= VP_IDLE_TIMEOUT)
	277	pr_warning("%s: vdd_%s idle timedout\n",
	278	__func__, voltdm->name);
	279
b7ea803e	280	vp->enabled = false;
01f48d30 KH	281
	282	return;
	283	}