]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - arch/arm/mach-orion/common.c
ehci-orion: mbus decode window support
[mirror_ubuntu-jammy-kernel.git] / arch / arm / mach-orion / common.c
CommitLineData
585cf175
TP
1/*
2 * arch/arm/mach-orion/common.c
3 *
4 * Core functions for Marvell Orion System On Chip
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
ca26f7d3
TP
15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
83b6d822 17#include <linux/mbus.h>
e07c9d85 18#include <linux/mv643xx_eth.h>
144aa3db 19#include <linux/mv643xx_i2c.h>
585cf175 20#include <asm/page.h>
be73a347 21#include <asm/setup.h>
c67de5b3 22#include <asm/timex.h>
be73a347 23#include <asm/mach/arch.h>
585cf175 24#include <asm/mach/map.h>
f244baa3 25#include <asm/arch/hardware.h>
92aecfa9 26#include <asm/arch/platform.h>
585cf175
TP
27#include "common.h"
28
29/*****************************************************************************
30 * I/O Address Mapping
31 ****************************************************************************/
32static struct map_desc orion_io_desc[] __initdata = {
33 {
7f74c2c7
LB
34 .virtual = ORION_REGS_VIRT_BASE,
35 .pfn = __phys_to_pfn(ORION_REGS_PHYS_BASE),
585cf175
TP
36 .length = ORION_REGS_SIZE,
37 .type = MT_DEVICE
38 },
39 {
7f74c2c7
LB
40 .virtual = ORION_PCIE_IO_VIRT_BASE,
41 .pfn = __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
585cf175
TP
42 .length = ORION_PCIE_IO_SIZE,
43 .type = MT_DEVICE
44 },
45 {
7f74c2c7
LB
46 .virtual = ORION_PCI_IO_VIRT_BASE,
47 .pfn = __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
585cf175
TP
48 .length = ORION_PCI_IO_SIZE,
49 .type = MT_DEVICE
50 },
51 {
7f74c2c7
LB
52 .virtual = ORION_PCIE_WA_VIRT_BASE,
53 .pfn = __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
585cf175
TP
54 .length = ORION_PCIE_WA_SIZE,
55 .type = MT_DEVICE
56 },
57};
58
59void __init orion_map_io(void)
60{
61 iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
62}
c67de5b3 63
ca26f7d3
TP
64/*****************************************************************************
65 * UART
66 ****************************************************************************/
67
68static struct resource orion_uart_resources[] = {
69 {
7f74c2c7
LB
70 .start = UART0_PHYS_BASE,
71 .end = UART0_PHYS_BASE + 0xff,
ca26f7d3
TP
72 .flags = IORESOURCE_MEM,
73 },
74 {
75 .start = IRQ_ORION_UART0,
76 .end = IRQ_ORION_UART0,
77 .flags = IORESOURCE_IRQ,
78 },
79 {
7f74c2c7
LB
80 .start = UART1_PHYS_BASE,
81 .end = UART1_PHYS_BASE + 0xff,
ca26f7d3
TP
82 .flags = IORESOURCE_MEM,
83 },
84 {
85 .start = IRQ_ORION_UART1,
86 .end = IRQ_ORION_UART1,
87 .flags = IORESOURCE_IRQ,
88 },
89};
90
91static struct plat_serial8250_port orion_uart_data[] = {
92 {
7f74c2c7
LB
93 .mapbase = UART0_PHYS_BASE,
94 .membase = (char *)UART0_VIRT_BASE,
ca26f7d3
TP
95 .irq = IRQ_ORION_UART0,
96 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
97 .iotype = UPIO_MEM,
98 .regshift = 2,
99 .uartclk = ORION_TCLK,
100 },
101 {
7f74c2c7
LB
102 .mapbase = UART1_PHYS_BASE,
103 .membase = (char *)UART1_VIRT_BASE,
ca26f7d3
TP
104 .irq = IRQ_ORION_UART1,
105 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
106 .iotype = UPIO_MEM,
107 .regshift = 2,
108 .uartclk = ORION_TCLK,
109 },
110 { },
111};
112
113static struct platform_device orion_uart = {
114 .name = "serial8250",
115 .id = PLAT8250_DEV_PLATFORM,
116 .dev = {
117 .platform_data = orion_uart_data,
118 },
119 .resource = orion_uart_resources,
120 .num_resources = ARRAY_SIZE(orion_uart_resources),
121};
122
123/*******************************************************************************
124 * USB Controller - 2 interfaces
125 ******************************************************************************/
126
127static struct resource orion_ehci0_resources[] = {
128 {
7f74c2c7
LB
129 .start = ORION_USB0_PHYS_BASE,
130 .end = ORION_USB0_PHYS_BASE + SZ_4K,
ca26f7d3
TP
131 .flags = IORESOURCE_MEM,
132 },
133 {
134 .start = IRQ_ORION_USB0_CTRL,
135 .end = IRQ_ORION_USB0_CTRL,
136 .flags = IORESOURCE_IRQ,
137 },
138};
139
140static struct resource orion_ehci1_resources[] = {
141 {
7f74c2c7
LB
142 .start = ORION_USB1_PHYS_BASE,
143 .end = ORION_USB1_PHYS_BASE + SZ_4K,
ca26f7d3
TP
144 .flags = IORESOURCE_MEM,
145 },
146 {
147 .start = IRQ_ORION_USB1_CTRL,
148 .end = IRQ_ORION_USB1_CTRL,
149 .flags = IORESOURCE_IRQ,
150 },
151};
152
92aecfa9
LB
153static struct orion_ehci_data orion_ehci_data = {
154 .dram = &orion_mbus_dram_info,
155};
156
ca26f7d3
TP
157static u64 ehci_dmamask = 0xffffffffUL;
158
159static struct platform_device orion_ehci0 = {
160 .name = "orion-ehci",
161 .id = 0,
162 .dev = {
163 .dma_mask = &ehci_dmamask,
164 .coherent_dma_mask = 0xffffffff,
92aecfa9 165 .platform_data = &orion_ehci_data,
ca26f7d3
TP
166 },
167 .resource = orion_ehci0_resources,
168 .num_resources = ARRAY_SIZE(orion_ehci0_resources),
169};
170
171static struct platform_device orion_ehci1 = {
172 .name = "orion-ehci",
173 .id = 1,
174 .dev = {
175 .dma_mask = &ehci_dmamask,
176 .coherent_dma_mask = 0xffffffff,
92aecfa9 177 .platform_data = &orion_ehci_data,
ca26f7d3
TP
178 },
179 .resource = orion_ehci1_resources,
180 .num_resources = ARRAY_SIZE(orion_ehci1_resources),
181};
182
e07c9d85
TP
183/*****************************************************************************
184 * Gigabit Ethernet port
185 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
186 ****************************************************************************/
187
188static struct resource orion_eth_shared_resources[] = {
189 {
88603f1d
LB
190 .start = ORION_ETH_PHYS_BASE + 0x2000,
191 .end = ORION_ETH_PHYS_BASE + 0x3fff,
e07c9d85
TP
192 .flags = IORESOURCE_MEM,
193 },
194};
195
196static struct platform_device orion_eth_shared = {
197 .name = MV643XX_ETH_SHARED_NAME,
198 .id = 0,
199 .num_resources = 1,
200 .resource = orion_eth_shared_resources,
201};
202
203static struct resource orion_eth_resources[] = {
204 {
205 .name = "eth irq",
206 .start = IRQ_ORION_ETH_SUM,
207 .end = IRQ_ORION_ETH_SUM,
208 .flags = IORESOURCE_IRQ,
209 }
210};
211
212static struct platform_device orion_eth = {
213 .name = MV643XX_ETH_NAME,
214 .id = 0,
215 .num_resources = 1,
216 .resource = orion_eth_resources,
217};
218
219void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
220{
221 orion_eth.dev.platform_data = eth_data;
222 platform_device_register(&orion_eth_shared);
223 platform_device_register(&orion_eth);
224}
225
144aa3db
HVR
226/*****************************************************************************
227 * I2C controller
228 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
229 ****************************************************************************/
230
231static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
232 .freq_m = 8, /* assumes 166 MHz TCLK */
233 .freq_n = 3,
234 .timeout = 1000, /* Default timeout of 1 second */
235};
236
237static struct resource orion_i2c_resources[] = {
238 {
239 .name = "i2c base",
7f74c2c7
LB
240 .start = I2C_PHYS_BASE,
241 .end = I2C_PHYS_BASE + 0x20 -1,
144aa3db
HVR
242 .flags = IORESOURCE_MEM,
243 },
244 {
245 .name = "i2c irq",
246 .start = IRQ_ORION_I2C,
247 .end = IRQ_ORION_I2C,
248 .flags = IORESOURCE_IRQ,
249 },
250};
251
252static struct platform_device orion_i2c = {
253 .name = MV64XXX_I2C_CTLR_NAME,
254 .id = 0,
255 .num_resources = ARRAY_SIZE(orion_i2c_resources),
256 .resource = orion_i2c_resources,
257 .dev = {
258 .platform_data = &orion_i2c_pdata,
259 },
260};
261
f244baa3
SB
262/*****************************************************************************
263 * Sata port
264 ****************************************************************************/
265static struct resource orion_sata_resources[] = {
266 {
267 .name = "sata base",
7f74c2c7
LB
268 .start = ORION_SATA_PHYS_BASE,
269 .end = ORION_SATA_PHYS_BASE + 0x5000 - 1,
f244baa3
SB
270 .flags = IORESOURCE_MEM,
271 },
272 {
273 .name = "sata irq",
274 .start = IRQ_ORION_SATA,
275 .end = IRQ_ORION_SATA,
276 .flags = IORESOURCE_IRQ,
277 },
278};
279
280static struct platform_device orion_sata = {
281 .name = "sata_mv",
282 .id = 0,
283 .dev = {
284 .coherent_dma_mask = 0xffffffff,
285 },
286 .num_resources = ARRAY_SIZE(orion_sata_resources),
287 .resource = orion_sata_resources,
288};
289
290void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
291{
292 orion_sata.dev.platform_data = sata_data;
293 platform_device_register(&orion_sata);
294}
295
c67de5b3
TP
296/*****************************************************************************
297 * General
298 ****************************************************************************/
299
300/*
301 * Identify device ID and rev from PCIE configuration header space '0'.
302 */
303static void orion_id(u32 *dev, u32 *rev, char **dev_name)
304{
305 orion_pcie_id(dev, rev);
306
307 if (*dev == MV88F5281_DEV_ID) {
308 if (*rev == MV88F5281_REV_D2) {
309 *dev_name = "MV88F5281-D2";
310 } else if (*rev == MV88F5281_REV_D1) {
311 *dev_name = "MV88F5281-D1";
312 } else {
313 *dev_name = "MV88F5281-Rev-Unsupported";
314 }
315 } else if (*dev == MV88F5182_DEV_ID) {
316 if (*rev == MV88F5182_REV_A2) {
317 *dev_name = "MV88F5182-A2";
318 } else {
319 *dev_name = "MV88F5182-Rev-Unsupported";
320 }
c9e3de94
HVR
321 } else if (*dev == MV88F5181_DEV_ID) {
322 if (*rev == MV88F5181_REV_B1) {
323 *dev_name = "MV88F5181-Rev-B1";
324 } else {
325 *dev_name = "MV88F5181-Rev-Unsupported";
326 }
c67de5b3
TP
327 } else {
328 *dev_name = "Device-Unknown";
329 }
330}
331
332void __init orion_init(void)
333{
334 char *dev_name;
335 u32 dev, rev;
336
337 orion_id(&dev, &rev, &dev_name);
338 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
339
340 /*
341 * Setup Orion address map
342 */
343 orion_setup_cpu_wins();
c67de5b3 344 orion_setup_eth_wins();
c67de5b3
TP
345 if (dev == MV88F5182_DEV_ID)
346 orion_setup_sata_wins();
ca26f7d3
TP
347
348 /*
349 * REgister devices
350 */
351 platform_device_register(&orion_uart);
352 platform_device_register(&orion_ehci0);
353 if (dev == MV88F5182_DEV_ID)
354 platform_device_register(&orion_ehci1);
144aa3db 355 platform_device_register(&orion_i2c);
c67de5b3 356}
be73a347
GL
357
358/*
359 * Many orion-based systems have buggy bootloader implementations.
360 * This is a common fixup for bogus memory tags.
361 */
362void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
363 char **from, struct meminfo *meminfo)
364{
365 for (; t->hdr.size; t = tag_next(t))
366 if (t->hdr.tag == ATAG_MEM &&
367 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
368 t->u.mem.start & ~PAGE_MASK)) {
369 printk(KERN_WARNING
370 "Clearing invalid memory bank %dKB@0x%08x\n",
371 t->u.mem.size / 1024, t->u.mem.start);
372 t->hdr.tag = 0;
373 }
374}