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introduce mbus DRAM target info abstraction
[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-orion / common.c
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585cf175
TP		 1/*
2 * arch/arm/mach-orion/common.c
3 *
4 * Core functions for Marvell Orion System On Chip
5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
ca26f7d3
TP		 15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
e07c9d85 17#include <linux/mv643xx_eth.h>
144aa3db 18#include <linux/mv643xx_i2c.h>
585cf175 19#include <asm/page.h>
be73a347 20#include <asm/setup.h>
c67de5b3 21#include <asm/timex.h>
be73a347 22#include <asm/mach/arch.h>
585cf175 23#include <asm/mach/map.h>
f244baa3 24#include <asm/arch/hardware.h>
585cf175
TP		 25#include "common.h"
26
27/*****************************************************************************
28 * I/O Address Mapping
29 ****************************************************************************/
30static struct map_desc orion_io_desc[] __initdata = {
31 {
7f74c2c7
LB		 32 .virtual = ORION_REGS_VIRT_BASE,
33 .pfn = __phys_to_pfn(ORION_REGS_PHYS_BASE),
585cf175
TP		 34 .length = ORION_REGS_SIZE,
35 .type = MT_DEVICE
36 },
37 {
7f74c2c7
LB		 38 .virtual = ORION_PCIE_IO_VIRT_BASE,
39 .pfn = __phys_to_pfn(ORION_PCIE_IO_PHYS_BASE),
585cf175
TP		 40 .length = ORION_PCIE_IO_SIZE,
41 .type = MT_DEVICE
42 },
43 {
7f74c2c7
LB		 44 .virtual = ORION_PCI_IO_VIRT_BASE,
45 .pfn = __phys_to_pfn(ORION_PCI_IO_PHYS_BASE),
585cf175
TP		 46 .length = ORION_PCI_IO_SIZE,
47 .type = MT_DEVICE
48 },
49 {
7f74c2c7
LB		 50 .virtual = ORION_PCIE_WA_VIRT_BASE,
51 .pfn = __phys_to_pfn(ORION_PCIE_WA_PHYS_BASE),
585cf175
TP		 52 .length = ORION_PCIE_WA_SIZE,
53 .type = MT_DEVICE
54 },
55};
56
57void __init orion_map_io(void)
58{
59 iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc));
60}
c67de5b3 61
ca26f7d3
TP		 62/*****************************************************************************
63 * UART
64 ****************************************************************************/
65
66static struct resource orion_uart_resources[] = {
67 {
7f74c2c7
LB		 68 .start = UART0_PHYS_BASE,
69 .end = UART0_PHYS_BASE + 0xff,
ca26f7d3
TP		 70 .flags = IORESOURCE_MEM,
71 },
72 {
73 .start = IRQ_ORION_UART0,
74 .end = IRQ_ORION_UART0,
75 .flags = IORESOURCE_IRQ,
76 },
77 {
7f74c2c7
LB		 78 .start = UART1_PHYS_BASE,
79 .end = UART1_PHYS_BASE + 0xff,
ca26f7d3
TP		 80 .flags = IORESOURCE_MEM,
81 },
82 {
83 .start = IRQ_ORION_UART1,
84 .end = IRQ_ORION_UART1,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89static struct plat_serial8250_port orion_uart_data[] = {
90 {
7f74c2c7
LB		 91 .mapbase = UART0_PHYS_BASE,
92 .membase = (char *)UART0_VIRT_BASE,
ca26f7d3
TP		 93 .irq = IRQ_ORION_UART0,
94 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
95 .iotype = UPIO_MEM,
96 .regshift = 2,
97 .uartclk = ORION_TCLK,
98 },
99 {
7f74c2c7
LB		 100 .mapbase = UART1_PHYS_BASE,
101 .membase = (char *)UART1_VIRT_BASE,
ca26f7d3
TP		 102 .irq = IRQ_ORION_UART1,
103 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
104 .iotype = UPIO_MEM,
105 .regshift = 2,
106 .uartclk = ORION_TCLK,
107 },
108 { },
109};
110
111static struct platform_device orion_uart = {
112 .name = "serial8250",
113 .id = PLAT8250_DEV_PLATFORM,
114 .dev = {
115 .platform_data = orion_uart_data,
116 },
117 .resource = orion_uart_resources,
118 .num_resources = ARRAY_SIZE(orion_uart_resources),
119};
120
121/*******************************************************************************
122 * USB Controller - 2 interfaces
123 ******************************************************************************/
124
125static struct resource orion_ehci0_resources[] = {
126 {
7f74c2c7
LB		 127 .start = ORION_USB0_PHYS_BASE,
128 .end = ORION_USB0_PHYS_BASE + SZ_4K,
ca26f7d3
TP		 129 .flags = IORESOURCE_MEM,
130 },
131 {
132 .start = IRQ_ORION_USB0_CTRL,
133 .end = IRQ_ORION_USB0_CTRL,
134 .flags = IORESOURCE_IRQ,
135 },
136};
137
138static struct resource orion_ehci1_resources[] = {
139 {
7f74c2c7
LB		 140 .start = ORION_USB1_PHYS_BASE,
141 .end = ORION_USB1_PHYS_BASE + SZ_4K,
ca26f7d3
TP		 142 .flags = IORESOURCE_MEM,
143 },
144 {
145 .start = IRQ_ORION_USB1_CTRL,
146 .end = IRQ_ORION_USB1_CTRL,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151static u64 ehci_dmamask = 0xffffffffUL;
152
153static struct platform_device orion_ehci0 = {
154 .name = "orion-ehci",
155 .id = 0,
156 .dev = {
157 .dma_mask = &ehci_dmamask,
158 .coherent_dma_mask = 0xffffffff,
159 },
160 .resource = orion_ehci0_resources,
161 .num_resources = ARRAY_SIZE(orion_ehci0_resources),
162};
163
164static struct platform_device orion_ehci1 = {
165 .name = "orion-ehci",
166 .id = 1,
167 .dev = {
168 .dma_mask = &ehci_dmamask,
169 .coherent_dma_mask = 0xffffffff,
170 },
171 .resource = orion_ehci1_resources,
172 .num_resources = ARRAY_SIZE(orion_ehci1_resources),
173};
174
e07c9d85
TP		 175/*****************************************************************************
176 * Gigabit Ethernet port
177 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
178 ****************************************************************************/
179
180static struct resource orion_eth_shared_resources[] = {
181 {
88603f1d
LB		 182 .start = ORION_ETH_PHYS_BASE + 0x2000,
183 .end = ORION_ETH_PHYS_BASE + 0x3fff,
e07c9d85
TP		 184 .flags = IORESOURCE_MEM,
185 },
186};
187
188static struct platform_device orion_eth_shared = {
189 .name = MV643XX_ETH_SHARED_NAME,
190 .id = 0,
191 .num_resources = 1,
192 .resource = orion_eth_shared_resources,
193};
194
195static struct resource orion_eth_resources[] = {
196 {
197 .name = "eth irq",
198 .start = IRQ_ORION_ETH_SUM,
199 .end = IRQ_ORION_ETH_SUM,
200 .flags = IORESOURCE_IRQ,
201 }
202};
203
204static struct platform_device orion_eth = {
205 .name = MV643XX_ETH_NAME,
206 .id = 0,
207 .num_resources = 1,
208 .resource = orion_eth_resources,
209};
210
211void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data)
212{
213 orion_eth.dev.platform_data = eth_data;
214 platform_device_register(&orion_eth_shared);
215 platform_device_register(&orion_eth);
216}
217
144aa3db
HVR		 218/*****************************************************************************
219 * I2C controller
220 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
221 ****************************************************************************/
222
223static struct mv64xxx_i2c_pdata orion_i2c_pdata = {
224 .freq_m = 8, /* assumes 166 MHz TCLK */
225 .freq_n = 3,
226 .timeout = 1000, /* Default timeout of 1 second */
227};
228
229static struct resource orion_i2c_resources[] = {
230 {
231 .name = "i2c base",
7f74c2c7
LB		 232 .start = I2C_PHYS_BASE,
233 .end = I2C_PHYS_BASE + 0x20 -1,
144aa3db
HVR		 234 .flags = IORESOURCE_MEM,
235 },
236 {
237 .name = "i2c irq",
238 .start = IRQ_ORION_I2C,
239 .end = IRQ_ORION_I2C,
240 .flags = IORESOURCE_IRQ,
241 },
242};
243
244static struct platform_device orion_i2c = {
245 .name = MV64XXX_I2C_CTLR_NAME,
246 .id = 0,
247 .num_resources = ARRAY_SIZE(orion_i2c_resources),
248 .resource = orion_i2c_resources,
249 .dev = {
250 .platform_data = &orion_i2c_pdata,
251 },
252};
253
f244baa3
SB		 254/*****************************************************************************
255 * Sata port
256 ****************************************************************************/
257static struct resource orion_sata_resources[] = {
258 {
259 .name = "sata base",
7f74c2c7
LB		 260 .start = ORION_SATA_PHYS_BASE,
261 .end = ORION_SATA_PHYS_BASE + 0x5000 - 1,
f244baa3
SB		 262 .flags = IORESOURCE_MEM,
263 },
264 {
265 .name = "sata irq",
266 .start = IRQ_ORION_SATA,
267 .end = IRQ_ORION_SATA,
268 .flags = IORESOURCE_IRQ,
269 },
270};
271
272static struct platform_device orion_sata = {
273 .name = "sata_mv",
274 .id = 0,
275 .dev = {
276 .coherent_dma_mask = 0xffffffff,
277 },
278 .num_resources = ARRAY_SIZE(orion_sata_resources),
279 .resource = orion_sata_resources,
280};
281
282void __init orion_sata_init(struct mv_sata_platform_data *sata_data)
283{
284 orion_sata.dev.platform_data = sata_data;
285 platform_device_register(&orion_sata);
286}
287
c67de5b3
TP		 288/*****************************************************************************
289 * General
290 ****************************************************************************/
291
292/*
293 * Identify device ID and rev from PCIE configuration header space '0'.
294 */
295static void orion_id(u32 *dev, u32 *rev, char **dev_name)
296{
297 orion_pcie_id(dev, rev);
298
299 if (*dev == MV88F5281_DEV_ID) {
300 if (*rev == MV88F5281_REV_D2) {
301 *dev_name = "MV88F5281-D2";
302 } else if (*rev == MV88F5281_REV_D1) {
303 *dev_name = "MV88F5281-D1";
304 } else {
305 *dev_name = "MV88F5281-Rev-Unsupported";
306 }
307 } else if (*dev == MV88F5182_DEV_ID) {
308 if (*rev == MV88F5182_REV_A2) {
309 *dev_name = "MV88F5182-A2";
310 } else {
311 *dev_name = "MV88F5182-Rev-Unsupported";
312 }
c9e3de94
HVR		 313 } else if (*dev == MV88F5181_DEV_ID) {
314 if (*rev == MV88F5181_REV_B1) {
315 *dev_name = "MV88F5181-Rev-B1";
316 } else {
317 *dev_name = "MV88F5181-Rev-Unsupported";
318 }
c67de5b3
TP		 319 } else {
320 *dev_name = "Device-Unknown";
321 }
322}
323
324void __init orion_init(void)
325{
326 char *dev_name;
327 u32 dev, rev;
328
329 orion_id(&dev, &rev, &dev_name);
330 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK);
331
332 /*
333 * Setup Orion address map
334 */
335 orion_setup_cpu_wins();
336 orion_setup_usb_wins();
337 orion_setup_eth_wins();
338 orion_setup_pci_wins();
339 orion_setup_pcie_wins();
340 if (dev == MV88F5182_DEV_ID)
341 orion_setup_sata_wins();
ca26f7d3
TP		 342
343 /*
344 * REgister devices
345 */
346 platform_device_register(&orion_uart);
347 platform_device_register(&orion_ehci0);
348 if (dev == MV88F5182_DEV_ID)
349 platform_device_register(&orion_ehci1);
144aa3db 350 platform_device_register(&orion_i2c);
c67de5b3 351}
be73a347
GL		 352
353/*
354 * Many orion-based systems have buggy bootloader implementations.
355 * This is a common fixup for bogus memory tags.
356 */
357void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
358 char **from, struct meminfo *meminfo)
359{
360 for (; t->hdr.size; t = tag_next(t))
361 if (t->hdr.tag == ATAG_MEM &&
362 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
363 t->u.mem.start & ~PAGE_MASK)) {
364 printk(KERN_WARNING
365 "Clearing invalid memory bank %dKB@0x%08x\n",
366 t->u.mem.size / 1024, t->u.mem.start);
367 t->hdr.tag = 0;
368 }
369}
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