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585cf175 1/*
9dd0b194 2 * arch/arm/mach-orion5x/common.c
585cf175 3 *
9dd0b194 4 * Core functions for Marvell Orion 5x SoCs
585cf175
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5 *
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
7 *
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8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
585cf175
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10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
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15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
83b6d822 17#include <linux/mbus.h>
e07c9d85 18#include <linux/mv643xx_eth.h>
144aa3db 19#include <linux/mv643xx_i2c.h>
15a32632 20#include <linux/ata_platform.h>
585cf175 21#include <asm/page.h>
be73a347 22#include <asm/setup.h>
c67de5b3 23#include <asm/timex.h>
be73a347 24#include <asm/mach/arch.h>
585cf175 25#include <asm/mach/map.h>
2bac1de2 26#include <asm/mach/time.h>
f244baa3 27#include <asm/arch/hardware.h>
9dd0b194 28#include <asm/arch/orion5x.h>
705a7521 29#include <asm/plat-orion/ehci-orion.h>
5d4294c5 30#include <asm/plat-orion/orion_nand.h>
2bac1de2 31#include <asm/plat-orion/time.h>
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32#include "common.h"
33
34/*****************************************************************************
35 * I/O Address Mapping
36 ****************************************************************************/
9dd0b194 37static struct map_desc orion5x_io_desc[] __initdata = {
585cf175 38 {
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39 .virtual = ORION5X_REGS_VIRT_BASE,
40 .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
41 .length = ORION5X_REGS_SIZE,
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42 .type = MT_DEVICE
43 },
44 {
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45 .virtual = ORION5X_PCIE_IO_VIRT_BASE,
46 .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
47 .length = ORION5X_PCIE_IO_SIZE,
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48 .type = MT_DEVICE
49 },
50 {
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51 .virtual = ORION5X_PCI_IO_VIRT_BASE,
52 .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
53 .length = ORION5X_PCI_IO_SIZE,
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54 .type = MT_DEVICE
55 },
56 {
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57 .virtual = ORION5X_PCIE_WA_VIRT_BASE,
58 .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
59 .length = ORION5X_PCIE_WA_SIZE,
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60 .type = MT_DEVICE
61 },
62};
63
9dd0b194 64void __init orion5x_map_io(void)
585cf175 65{
9dd0b194 66 iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
585cf175 67}
c67de5b3 68
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69/*****************************************************************************
70 * UART
71 ****************************************************************************/
72
9dd0b194 73static struct resource orion5x_uart_resources[] = {
ca26f7d3 74 {
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75 .start = UART0_PHYS_BASE,
76 .end = UART0_PHYS_BASE + 0xff,
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77 .flags = IORESOURCE_MEM,
78 },
79 {
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80 .start = IRQ_ORION5X_UART0,
81 .end = IRQ_ORION5X_UART0,
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82 .flags = IORESOURCE_IRQ,
83 },
84 {
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85 .start = UART1_PHYS_BASE,
86 .end = UART1_PHYS_BASE + 0xff,
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87 .flags = IORESOURCE_MEM,
88 },
89 {
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90 .start = IRQ_ORION5X_UART1,
91 .end = IRQ_ORION5X_UART1,
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92 .flags = IORESOURCE_IRQ,
93 },
94};
95
9dd0b194 96static struct plat_serial8250_port orion5x_uart_data[] = {
ca26f7d3 97 {
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98 .mapbase = UART0_PHYS_BASE,
99 .membase = (char *)UART0_VIRT_BASE,
9dd0b194 100 .irq = IRQ_ORION5X_UART0,
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101 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
102 .iotype = UPIO_MEM,
103 .regshift = 2,
9dd0b194 104 .uartclk = ORION5X_TCLK,
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105 },
106 {
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107 .mapbase = UART1_PHYS_BASE,
108 .membase = (char *)UART1_VIRT_BASE,
9dd0b194 109 .irq = IRQ_ORION5X_UART1,
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110 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
111 .iotype = UPIO_MEM,
112 .regshift = 2,
9dd0b194 113 .uartclk = ORION5X_TCLK,
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114 },
115 { },
116};
117
9dd0b194 118static struct platform_device orion5x_uart = {
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119 .name = "serial8250",
120 .id = PLAT8250_DEV_PLATFORM,
121 .dev = {
9dd0b194 122 .platform_data = orion5x_uart_data,
ca26f7d3 123 },
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124 .resource = orion5x_uart_resources,
125 .num_resources = ARRAY_SIZE(orion5x_uart_resources),
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126};
127
128/*******************************************************************************
129 * USB Controller - 2 interfaces
130 ******************************************************************************/
131
9dd0b194 132static struct resource orion5x_ehci0_resources[] = {
ca26f7d3 133 {
9dd0b194 134 .start = ORION5X_USB0_PHYS_BASE,
994cab84 135 .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
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136 .flags = IORESOURCE_MEM,
137 },
138 {
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139 .start = IRQ_ORION5X_USB0_CTRL,
140 .end = IRQ_ORION5X_USB0_CTRL,
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141 .flags = IORESOURCE_IRQ,
142 },
143};
144
9dd0b194 145static struct resource orion5x_ehci1_resources[] = {
ca26f7d3 146 {
9dd0b194 147 .start = ORION5X_USB1_PHYS_BASE,
994cab84 148 .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
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149 .flags = IORESOURCE_MEM,
150 },
151 {
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152 .start = IRQ_ORION5X_USB1_CTRL,
153 .end = IRQ_ORION5X_USB1_CTRL,
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154 .flags = IORESOURCE_IRQ,
155 },
156};
157
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158static struct orion_ehci_data orion5x_ehci_data = {
159 .dram = &orion5x_mbus_dram_info,
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160};
161
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162static u64 ehci_dmamask = 0xffffffffUL;
163
9dd0b194 164static struct platform_device orion5x_ehci0 = {
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165 .name = "orion-ehci",
166 .id = 0,
167 .dev = {
168 .dma_mask = &ehci_dmamask,
169 .coherent_dma_mask = 0xffffffff,
9dd0b194 170 .platform_data = &orion5x_ehci_data,
ca26f7d3 171 },
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172 .resource = orion5x_ehci0_resources,
173 .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
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174};
175
9dd0b194 176static struct platform_device orion5x_ehci1 = {
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177 .name = "orion-ehci",
178 .id = 1,
179 .dev = {
180 .dma_mask = &ehci_dmamask,
181 .coherent_dma_mask = 0xffffffff,
9dd0b194 182 .platform_data = &orion5x_ehci_data,
ca26f7d3 183 },
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184 .resource = orion5x_ehci1_resources,
185 .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
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186};
187
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188/*****************************************************************************
189 * Gigabit Ethernet port
190 * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
191 ****************************************************************************/
192
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193struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
194 .dram = &orion5x_mbus_dram_info,
b8c15a60 195 .t_clk = ORION5X_TCLK,
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196};
197
9dd0b194 198static struct resource orion5x_eth_shared_resources[] = {
e07c9d85 199 {
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200 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
201 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
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202 .flags = IORESOURCE_MEM,
203 },
204};
205
9dd0b194 206static struct platform_device orion5x_eth_shared = {
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207 .name = MV643XX_ETH_SHARED_NAME,
208 .id = 0,
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209 .dev = {
210 .platform_data = &orion5x_eth_shared_data,
211 },
e07c9d85 212 .num_resources = 1,
9dd0b194 213 .resource = orion5x_eth_shared_resources,
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214};
215
9dd0b194 216static struct resource orion5x_eth_resources[] = {
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217 {
218 .name = "eth irq",
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219 .start = IRQ_ORION5X_ETH_SUM,
220 .end = IRQ_ORION5X_ETH_SUM,
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221 .flags = IORESOURCE_IRQ,
222 }
223};
224
9dd0b194 225static struct platform_device orion5x_eth = {
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226 .name = MV643XX_ETH_NAME,
227 .id = 0,
228 .num_resources = 1,
9dd0b194 229 .resource = orion5x_eth_resources,
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230};
231
9dd0b194 232void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
e07c9d85 233{
fa3959f4 234 eth_data->shared = &orion5x_eth_shared;
9dd0b194 235 orion5x_eth.dev.platform_data = eth_data;
fa3959f4 236
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237 platform_device_register(&orion5x_eth_shared);
238 platform_device_register(&orion5x_eth);
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239}
240
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241/*****************************************************************************
242 * I2C controller
243 * (The Orion and Discovery (MV643xx) families share the same I2C controller)
244 ****************************************************************************/
245
9dd0b194 246static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
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247 .freq_m = 8, /* assumes 166 MHz TCLK */
248 .freq_n = 3,
249 .timeout = 1000, /* Default timeout of 1 second */
250};
251
9dd0b194 252static struct resource orion5x_i2c_resources[] = {
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253 {
254 .name = "i2c base",
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255 .start = I2C_PHYS_BASE,
256 .end = I2C_PHYS_BASE + 0x20 -1,
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257 .flags = IORESOURCE_MEM,
258 },
259 {
260 .name = "i2c irq",
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261 .start = IRQ_ORION5X_I2C,
262 .end = IRQ_ORION5X_I2C,
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263 .flags = IORESOURCE_IRQ,
264 },
265};
266
9dd0b194 267static struct platform_device orion5x_i2c = {
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268 .name = MV64XXX_I2C_CTLR_NAME,
269 .id = 0,
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270 .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
271 .resource = orion5x_i2c_resources,
144aa3db 272 .dev = {
9dd0b194 273 .platform_data = &orion5x_i2c_pdata,
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HVR
274 },
275};
276
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277/*****************************************************************************
278 * Sata port
279 ****************************************************************************/
9dd0b194 280static struct resource orion5x_sata_resources[] = {
f244baa3
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281 {
282 .name = "sata base",
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283 .start = ORION5X_SATA_PHYS_BASE,
284 .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
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285 .flags = IORESOURCE_MEM,
286 },
287 {
288 .name = "sata irq",
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289 .start = IRQ_ORION5X_SATA,
290 .end = IRQ_ORION5X_SATA,
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291 .flags = IORESOURCE_IRQ,
292 },
293};
294
9dd0b194 295static struct platform_device orion5x_sata = {
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296 .name = "sata_mv",
297 .id = 0,
298 .dev = {
299 .coherent_dma_mask = 0xffffffff,
300 },
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301 .num_resources = ARRAY_SIZE(orion5x_sata_resources),
302 .resource = orion5x_sata_resources,
f244baa3
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303};
304
9dd0b194 305void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
f244baa3 306{
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307 sata_data->dram = &orion5x_mbus_dram_info;
308 orion5x_sata.dev.platform_data = sata_data;
309 platform_device_register(&orion5x_sata);
f244baa3
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310}
311
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312/*****************************************************************************
313 * Time handling
314 ****************************************************************************/
315
9dd0b194 316static void orion5x_timer_init(void)
2bac1de2 317{
9dd0b194 318 orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
2bac1de2
LB
319}
320
9dd0b194
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321struct sys_timer orion5x_timer = {
322 .init = orion5x_timer_init,
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323};
324
c67de5b3
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325/*****************************************************************************
326 * General
327 ****************************************************************************/
328
329/*
b46926bb 330 * Identify device ID and rev from PCIe configuration header space '0'.
c67de5b3 331 */
9dd0b194 332static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
c67de5b3 333{
9dd0b194 334 orion5x_pcie_id(dev, rev);
c67de5b3
TP
335
336 if (*dev == MV88F5281_DEV_ID) {
337 if (*rev == MV88F5281_REV_D2) {
338 *dev_name = "MV88F5281-D2";
339 } else if (*rev == MV88F5281_REV_D1) {
340 *dev_name = "MV88F5281-D1";
341 } else {
342 *dev_name = "MV88F5281-Rev-Unsupported";
343 }
344 } else if (*dev == MV88F5182_DEV_ID) {
345 if (*rev == MV88F5182_REV_A2) {
346 *dev_name = "MV88F5182-A2";
347 } else {
348 *dev_name = "MV88F5182-Rev-Unsupported";
349 }
c9e3de94
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350 } else if (*dev == MV88F5181_DEV_ID) {
351 if (*rev == MV88F5181_REV_B1) {
352 *dev_name = "MV88F5181-Rev-B1";
353 } else {
354 *dev_name = "MV88F5181-Rev-Unsupported";
355 }
c67de5b3
TP
356 } else {
357 *dev_name = "Device-Unknown";
358 }
359}
360
9dd0b194 361void __init orion5x_init(void)
c67de5b3
TP
362{
363 char *dev_name;
364 u32 dev, rev;
365
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LB
366 orion5x_id(&dev, &rev, &dev_name);
367 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
c67de5b3
TP
368
369 /*
370 * Setup Orion address map
371 */
9dd0b194 372 orion5x_setup_cpu_mbus_bridge();
ca26f7d3
TP
373
374 /*
159ffb3a 375 * Register devices.
ca26f7d3 376 */
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377 platform_device_register(&orion5x_uart);
378 platform_device_register(&orion5x_ehci0);
ca26f7d3 379 if (dev == MV88F5182_DEV_ID)
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380 platform_device_register(&orion5x_ehci1);
381 platform_device_register(&orion5x_i2c);
c67de5b3 382}
be73a347
GL
383
384/*
385 * Many orion-based systems have buggy bootloader implementations.
386 * This is a common fixup for bogus memory tags.
387 */
388void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
389 char **from, struct meminfo *meminfo)
390{
391 for (; t->hdr.size; t = tag_next(t))
392 if (t->hdr.tag == ATAG_MEM &&
393 (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
394 t->u.mem.start & ~PAGE_MASK)) {
395 printk(KERN_WARNING
396 "Clearing invalid memory bank %dKB@0x%08x\n",
397 t->u.mem.size / 1024, t->u.mem.start);
398 t->hdr.tag = 0;
399 }
400}