[mirror_ubuntu-artful-kernel.git] / arch / arm / mach-orion5x / common.h

#ifndef __ARCH_ORION5X_COMMON_H
#define __ARCH_ORION5X_COMMON_H

#include <linux/reboot.h>

struct dsa_platform_data;
struct mv643xx_eth_platform_data;
struct mv_sata_platform_data;

#define ORION_MBUS_PCIE_MEM_TARGET    0x04
#define ORION_MBUS_PCIE_MEM_ATTR      0x59
#define ORION_MBUS_PCIE_IO_TARGET     0x04
#define ORION_MBUS_PCIE_IO_ATTR       0x51
#define ORION_MBUS_PCIE_WA_TARGET     0x04
#define ORION_MBUS_PCIE_WA_ATTR       0x79
#define ORION_MBUS_PCI_MEM_TARGET     0x03
#define ORION_MBUS_PCI_MEM_ATTR       0x59
#define ORION_MBUS_PCI_IO_TARGET      0x03
#define ORION_MBUS_PCI_IO_ATTR        0x51
#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
#define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
#define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
#define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
#define ORION_MBUS_SRAM_TARGET        0x09
#define ORION_MBUS_SRAM_ATTR          0x00

/*
 * Basic Orion init functions used early by machine-setup.
 */
void orion5x_map_io(void);
void orion5x_init_early(void);
void orion5x_init_irq(void);
void orion5x_init(void);
void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
void clk_init(void);
extern int orion5x_tclk;
extern void orion5x_timer_init(void);

void orion5x_setup_wins(void);

void orion5x_ehci0_init(void);
void orion5x_ehci1_init(void);
void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
void orion5x_eth_switch_init(struct dsa_platform_data *d, int irq);
void orion5x_i2c_init(void);
void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
void orion5x_spi_init(void);
void orion5x_uart0_init(void);
void orion5x_uart1_init(void);
void orion5x_xor_init(void);
void orion5x_restart(enum reboot_mode, const char *);

/*
 * PCIe/PCI functions.
 */
struct pci_bus;
struct pci_sys_data;
struct pci_dev;

void orion5x_pcie_id(u32 *dev, u32 *rev);
void orion5x_pci_disable(void);
void orion5x_pci_set_cardbus_mode(void);
int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);

struct tag;
extern void __init tag_fixup_mem32(struct tag *, char **);

#ifdef CONFIG_MACH_MSS2_DT
extern void mss2_init(void);
#else
static inline void mss2_init(void) {}
#endif

/*****************************************************************************
 * Helpers to access Orion registers
 ****************************************************************************/
/*
 * These are not preempt-safe.  Locks, if needed, must be taken
 * care of by the caller.
 */
#define orion5x_setbits(r, mask)	writel(readl(r) | (mask), (r))
#define orion5x_clrbits(r, mask)	writel(readl(r) & ~(mask), (r))

#endif
Commit	Line	Data
9dd0b194 LB	1	#ifndef __ARCH_ORION5X_COMMON_H
	2	#define __ARCH_ORION5X_COMMON_H
	3
7b6d864b RH	4	#include <linux/reboot.h>
7b6d864b RH	5
dcf1cece	6	struct dsa_platform_data;
044f6c7c LB	7	struct mv643xx_eth_platform_data;
	8	struct mv_sata_platform_data;
	9
4ca2c040 TP	10	#define ORION_MBUS_PCIE_MEM_TARGET 0x04
	11	#define ORION_MBUS_PCIE_MEM_ATTR 0x59
	12	#define ORION_MBUS_PCIE_IO_TARGET 0x04
	13	#define ORION_MBUS_PCIE_IO_ATTR 0x51
	14	#define ORION_MBUS_PCIE_WA_TARGET 0x04
	15	#define ORION_MBUS_PCIE_WA_ATTR 0x79
	16	#define ORION_MBUS_PCI_MEM_TARGET 0x03
	17	#define ORION_MBUS_PCI_MEM_ATTR 0x59
	18	#define ORION_MBUS_PCI_IO_TARGET 0x03
	19	#define ORION_MBUS_PCI_IO_ATTR 0x51
	20	#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
	21	#define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f
	22	#define ORION_MBUS_DEVBUS_TARGET(cs) 0x01
	23	#define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs))
1cc9d481	24	#define ORION_MBUS_SRAM_TARGET 0x09
4ca2c040 TP	25	#define ORION_MBUS_SRAM_ATTR 0x00
4ca2c040 TP	26
9dd0b194 LB	27	/*
	28	* Basic Orion init functions used early by machine-setup.
	29	*/
9dd0b194	30	void orion5x_map_io(void);
4ee1f6b5	31	void orion5x_init_early(void);
9dd0b194 LB	32	void orion5x_init_irq(void);
9dd0b194 LB	33	void orion5x_init(void);
1bffb4a8 TP	34	void orion5x_id(u32 dev, u32 rev, char **dev_name);
1bffb4a8 TP	35	void clk_init(void);
ebe35aff	36	extern int orion5x_tclk;
6bb27d73	37	extern void orion5x_timer_init(void);
9dd0b194	38
5d1190ea	39	void orion5x_setup_wins(void);
9dd0b194	40
044f6c7c LB	41	void orion5x_ehci0_init(void);
	42	void orion5x_ehci1_init(void);
	43	void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
dcf1cece	44	void orion5x_eth_switch_init(struct dsa_platform_data *d, int irq);
044f6c7c LB	45	void orion5x_i2c_init(void);
044f6c7c LB	46	void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
d323ade1	47	void orion5x_spi_init(void);
044f6c7c LB	48	void orion5x_uart0_init(void);
044f6c7c LB	49	void orion5x_uart1_init(void);
1d5a1a6e	50	void orion5x_xor_init(void);
7b6d864b	51	void orion5x_restart(enum reboot_mode, const char *);
044f6c7c	52
9dd0b194	53	/*
044f6c7c	54	* PCIe/PCI functions.
9dd0b194	55	*/
9dd0b194	56	struct pci_bus;
044f6c7c	57	struct pci_sys_data;
6ed272f2	58	struct pci_dev;
9dd0b194 LB	59
9dd0b194 LB	60	void orion5x_pcie_id(u32 dev, u32 rev);
7a6bb262	61	void orion5x_pci_disable(void);
da01bba3	62	void orion5x_pci_set_cardbus_mode(void);
9dd0b194 LB	63	int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
9dd0b194 LB	64	struct pci_bus orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data sys);
d5341942	65	int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
9dd0b194	66
9dd0b194	67	struct tag;
1c2f87c2	68	extern void __init tag_fixup_mem32(struct tag , char *);
9dd0b194	69
fbf04d81 TP	70	#ifdef CONFIG_MACH_MSS2_DT
	71	extern void mss2_init(void);
	72	#else
	73	static inline void mss2_init(void) {}
	74	#endif
	75
8a52dd4f RH	76	/*****************************************************************************
	77	* Helpers to access Orion registers
	78	****************************************************************************/
	79	/*
	80	* These are not preempt-safe. Locks, if needed, must be taken
	81	* care of by the caller.
	82	*/
	83	#define orion5x_setbits(r, mask) writel(readl(r) \| (mask), (r))
	84	#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r))
9dd0b194 LB	85
9dd0b194 LB	86	#endif