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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
af76e806 NA |
2 | /* |
3 | * Copyright (C) 2013 Ma Haijun <mahaijuns@gmail.com> | |
4 | * Copyright (c) 2003 ARM Limited | |
5 | * All Rights Reserved | |
af76e806 NA |
6 | */ |
7 | #include <linux/linkage.h> | |
8 | #include <linux/init.h> | |
9 | ||
10 | __INIT | |
11 | ||
12 | /* | |
13 | * OX820 specific entry point for secondary CPUs. | |
14 | */ | |
15 | ENTRY(ox820_secondary_startup) | |
16 | mov r4, #0 | |
17 | /* invalidate both caches and branch target cache */ | |
18 | mcr p15, 0, r4, c7, c7, 0 | |
19 | /* | |
20 | * we've been released from the holding pen: secondary_stack | |
21 | * should now contain the SVC stack for this core | |
22 | */ | |
23 | b secondary_startup |