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ARM: prima2: remove redundant select CPU_V7
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CommitLineData
21278aea 1menuconfig ARCH_SIRF
e3246542
MY
2 bool "CSR SiRF"
3 depends on ARCH_MULTI_V7
e7eda91f 4 select ARCH_HAS_RESET_CONTROLLER
ef2b1d77 5 select RESET_CONTROLLER
cf82e0e4 6 select GENERIC_IRQ_CHIP
5c34a4e8 7 select GPIOLIB
ce816fa8 8 select NO_IOPORT_MAP
b1999477 9 select REGMAP
cf82e0e4
AB
10 select PINCTRL
11 select PINCTRL_SIRF
12 help
13 Support for CSR SiRFprimaII/Marco/Polo platforms
14
156a0997
BS
15if ARCH_SIRF
16
4cba0585 17comment "CSR SiRF atlas6/primaII/Atlas7 Specific Features"
d4fe49e5
BS
18
19config ARCH_ATLAS6
20 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
21 default y
d4fe49e5
BS
22 select SIRF_IRQ
23 help
24 Support for CSR SiRFSoC ARM Cortex A9 Platform
156a0997 25
4cba0585
ZS
26config ARCH_ATLAS7
27 bool "CSR SiRFSoC ATLAS7 ARM Cortex A7 Platform"
28 default y
29 select ARM_GIC
b56d5d21 30 select ATLAS7_TIMER
4cba0585
ZS
31 select HAVE_ARM_SCU if SMP
32 select HAVE_SMP
4cba0585
ZS
33 help
34 Support for CSR SiRFSoC ARM Cortex A7 Platform
35
156a0997
BS
36config ARCH_PRIMA2
37 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
38 default y
c1e3c119 39 select SIRF_IRQ
b1b3f49c 40 select ZONE_DMA
f3550d49 41 select PRIMA2_TIMER
156a0997
BS
42 help
43 Support for CSR SiRFSoC ARM Cortex A9 Platform
44
c1e3c119
BS
45config SIRF_IRQ
46 bool
47
156a0997 48endif