[mirror_ubuntu-bionic-kernel.git] / arch / arm / mach-pxa / cm-x255.c

/*
 * linux/arch/arm/mach-pxa/cm-x255.c
 *
 * Copyright (C) 2007, 2008 CompuLab, Ltd.
 * Mike Rapoport <mike@compulab.co.il>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/platform_device.h>
#include <linux/irq.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/nand-gpio.h>
#include <linux/gpio/machine.h>
#include <linux/spi/spi.h>
#include <linux/spi/pxa2xx_spi.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include "pxa25x.h"

#include "generic.h"

#define GPIO_NAND_CS	(5)
#define GPIO_NAND_ALE	(4)
#define GPIO_NAND_CLE	(3)
#define GPIO_NAND_RB	(10)

static unsigned long cmx255_pin_config[] = {
	/* AC'97 */
	GPIO28_AC97_BITCLK,
	GPIO29_AC97_SDATA_IN_0,
	GPIO30_AC97_SDATA_OUT,
	GPIO31_AC97_SYNC,

	/* BTUART */
	GPIO42_BTUART_RXD,
	GPIO43_BTUART_TXD,
	GPIO44_BTUART_CTS,
	GPIO45_BTUART_RTS,

	/* STUART */
	GPIO46_STUART_RXD,
	GPIO47_STUART_TXD,

	/* LCD */
	GPIOxx_LCD_TFT_16BPP,

	/* SSP1 */
	GPIO23_SSP1_SCLK,
	GPIO24_SSP1_SFRM,
	GPIO25_SSP1_TXD,
	GPIO26_SSP1_RXD,

	/* SSP2 */
	GPIO81_SSP2_CLK_OUT,
	GPIO82_SSP2_FRM_OUT,
	GPIO83_SSP2_TXD,
	GPIO84_SSP2_RXD,

	/* PC Card */
	GPIO48_nPOE,
	GPIO49_nPWE,
	GPIO50_nPIOR,
	GPIO51_nPIOW,
	GPIO52_nPCE_1,
	GPIO53_nPCE_2,
	GPIO54_nPSKTSEL,
	GPIO55_nPREG,
	GPIO56_nPWAIT,
	GPIO57_nIOIS16,

	/* SDRAM and local bus */
	GPIO15_nCS_1,
	GPIO78_nCS_2,
	GPIO79_nCS_3,
	GPIO80_nCS_4,
	GPIO33_nCS_5,
	GPIO18_RDY,

	/* GPIO */
	GPIO0_GPIO	| WAKEUP_ON_EDGE_BOTH,
	GPIO9_GPIO,				/* PC card reset */

	/* NAND controls */
	GPIO5_GPIO	| MFP_LPM_DRIVE_HIGH,	/* NAND CE# */
	GPIO4_GPIO	| MFP_LPM_DRIVE_LOW,	/* NAND ALE */
	GPIO3_GPIO	| MFP_LPM_DRIVE_LOW,	/* NAND CLE */
	GPIO10_GPIO,				/* NAND Ready/Busy */

	/* interrupts */
	GPIO22_GPIO,	/* DM9000 interrupt */
};

#if defined(CONFIG_SPI_PXA2XX)
static struct pxa2xx_spi_master pxa_ssp_master_info = {
	.num_chipselect	= 1,
};

static struct spi_board_info spi_board_info[] __initdata = {
	[0] = {
		.modalias	= "rtc-max6902",
		.max_speed_hz	= 1000000,
		.bus_num	= 1,
		.chip_select	= 0,
	},
};

static void __init cmx255_init_rtc(void)
{
	pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
	spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
}
#else
static inline void cmx255_init_rtc(void) {}
#endif

#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
static struct mtd_partition cmx255_nor_partitions[] = {
	{
		.name		= "ARMmon",
		.size		= 0x00030000,
		.offset		= 0,
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	} , {
		.name		= "ARMmon setup block",
		.size		= 0x00010000,
		.offset		= MTDPART_OFS_APPEND,
		.mask_flags	= MTD_WRITEABLE  /* force read-only */
	} , {
		.name		= "kernel",
		.size		= 0x00160000,
		.offset		= MTDPART_OFS_APPEND,
	} , {
		.name		= "ramdisk",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND
	}
};

static struct physmap_flash_data cmx255_nor_flash_data[] = {
	{
		.width		= 2,	/* bankwidth in bytes */
		.parts		= cmx255_nor_partitions,
		.nr_parts	= ARRAY_SIZE(cmx255_nor_partitions)
	}
};

static struct resource cmx255_nor_resource = {
	.start	= PXA_CS0_PHYS,
	.end	= PXA_CS0_PHYS + SZ_8M - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device cmx255_nor = {
	.name	= "physmap-flash",
	.id	= -1,
	.dev	= {
		.platform_data = cmx255_nor_flash_data,
	},
	.resource = &cmx255_nor_resource,
	.num_resources = 1,
};

static void __init cmx255_init_nor(void)
{
	platform_device_register(&cmx255_nor);
}
#else
static inline void cmx255_init_nor(void) {}
#endif

#if defined(CONFIG_MTD_NAND_GPIO) || defined(CONFIG_MTD_NAND_GPIO_MODULE)

static struct gpiod_lookup_table cmx255_nand_gpiod_table = {
	.dev_id         = "gpio-nand",
	.table          = {
		GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH),
	},
};

static struct resource cmx255_nand_resource[] = {
	[0] = {
		.start = PXA_CS1_PHYS,
		.end   = PXA_CS1_PHYS + 11,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = PXA_CS5_PHYS,
		.end   = PXA_CS5_PHYS + 3,
		.flags = IORESOURCE_MEM,
	},
};

static struct mtd_partition cmx255_nand_parts[] = {
	[0] = {
		.name	= "cmx255-nand",
		.size	= MTDPART_SIZ_FULL,
		.offset	= 0,
	},
};

static struct gpio_nand_platdata cmx255_nand_platdata = {
	.parts = cmx255_nand_parts,
	.num_parts = ARRAY_SIZE(cmx255_nand_parts),
	.chip_delay = 25,
};

static struct platform_device cmx255_nand = {
	.name		= "gpio-nand",
	.num_resources	= ARRAY_SIZE(cmx255_nand_resource),
	.resource	= cmx255_nand_resource,
	.id		= -1,
	.dev		= {
		.platform_data = &cmx255_nand_platdata,
	}
};

static void __init cmx255_init_nand(void)
{
	gpiod_add_lookup_table(&cmx255_nand_gpiod_table);
	platform_device_register(&cmx255_nand);
}
#else
static inline void cmx255_init_nand(void) {}
#endif

void __init cmx255_init(void)
{
	pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));

	cmx255_init_rtc();
	cmx255_init_nor();
	cmx255_init_nand();
}
Commit	Line	Data
a7f3f030 MR	1	/*
	2	* linux/arch/arm/mach-pxa/cm-x255.c
	3	*
	4	* Copyright (C) 2007, 2008 CompuLab, Ltd.
	5	* Mike Rapoport <mike@compulab.co.il>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#include <linux/platform_device.h>
	13	#include <linux/irq.h>
49a7061d MR	14	#include <linux/mtd/partitions.h>
	15	#include <linux/mtd/physmap.h>
	16	#include <linux/mtd/nand-gpio.h>
f3d0d8d9	17	#include <linux/gpio/machine.h>
a7f3f030	18	#include <linux/spi/spi.h>
8348c259	19	#include <linux/spi/pxa2xx_spi.h>
a7f3f030 MR	20
	21	#include <asm/mach/arch.h>
	22	#include <asm/mach-types.h>
	23	#include <asm/mach/map.h>
	24
4c25c5d2	25	#include "pxa25x.h"
a7f3f030 MR	26
	27	#include "generic.h"
	28
49a7061d MR	29	#define GPIO_NAND_CS (5)
	30	#define GPIO_NAND_ALE (4)
	31	#define GPIO_NAND_CLE (3)
	32	#define GPIO_NAND_RB (10)
	33
a7f3f030 MR	34	static unsigned long cmx255_pin_config[] = {
	35	/* AC'97 */
	36	GPIO28_AC97_BITCLK,
	37	GPIO29_AC97_SDATA_IN_0,
	38	GPIO30_AC97_SDATA_OUT,
	39	GPIO31_AC97_SYNC,
	40
	41	/* BTUART */
	42	GPIO42_BTUART_RXD,
	43	GPIO43_BTUART_TXD,
	44	GPIO44_BTUART_CTS,
	45	GPIO45_BTUART_RTS,
	46
	47	/* STUART */
	48	GPIO46_STUART_RXD,
	49	GPIO47_STUART_TXD,
	50
	51	/* LCD */
07bae6c3	52	GPIOxx_LCD_TFT_16BPP,
a7f3f030 MR	53
	54	/* SSP1 */
	55	GPIO23_SSP1_SCLK,
	56	GPIO24_SSP1_SFRM,
	57	GPIO25_SSP1_TXD,
	58	GPIO26_SSP1_RXD,
	59
	60	/* SSP2 */
	61	GPIO81_SSP2_CLK_OUT,
	62	GPIO82_SSP2_FRM_OUT,
	63	GPIO83_SSP2_TXD,
	64	GPIO84_SSP2_RXD,
	65
	66	/* PC Card */
	67	GPIO48_nPOE,
	68	GPIO49_nPWE,
	69	GPIO50_nPIOR,
	70	GPIO51_nPIOW,
	71	GPIO52_nPCE_1,
	72	GPIO53_nPCE_2,
	73	GPIO54_nPSKTSEL,
	74	GPIO55_nPREG,
	75	GPIO56_nPWAIT,
	76	GPIO57_nIOIS16,
	77
	78	/* SDRAM and local bus */
	79	GPIO15_nCS_1,
	80	GPIO78_nCS_2,
	81	GPIO79_nCS_3,
	82	GPIO80_nCS_4,
	83	GPIO33_nCS_5,
	84	GPIO18_RDY,
	85
	86	/* GPIO */
	87	GPIO0_GPIO \| WAKEUP_ON_EDGE_BOTH,
	88	GPIO9_GPIO, /* PC card reset */
	89
	90	/* NAND controls */
	91	GPIO5_GPIO \| MFP_LPM_DRIVE_HIGH, /* NAND CE# */
	92	GPIO4_GPIO \| MFP_LPM_DRIVE_LOW, /* NAND ALE */
	93	GPIO3_GPIO \| MFP_LPM_DRIVE_LOW, /* NAND CLE */
	94	GPIO10_GPIO, /* NAND Ready/Busy */
	95
	96	/* interrupts */
	97	GPIO22_GPIO, /* DM9000 interrupt */
	98	};
	99
	100	#if defined(CONFIG_SPI_PXA2XX)
	101	static struct pxa2xx_spi_master pxa_ssp_master_info = {
	102	.num_chipselect = 1,
	103	};
	104
	105	static struct spi_board_info spi_board_info[] __initdata = {
	106	[0] = {
	107	.modalias = "rtc-max6902",
	108	.max_speed_hz = 1000000,
	109	.bus_num = 1,
	110	.chip_select = 0,
	111	},
	112	};
	113
	114	static void __init cmx255_init_rtc(void)
	115	{
	116	pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
117	spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
118	}
119	#else
120	static inline void cmx255_init_rtc(void) {}
121	#endif
122
49a7061d MR	123	#if defined(CONFIG_MTD_PHYSMAP) \|\| defined(CONFIG_MTD_PHYSMAP_MODULE)
	124	static struct mtd_partition cmx255_nor_partitions[] = {
	125	{
	126	.name = "ARMmon",
	127	.size = 0x00030000,
	128	.offset = 0,
	129	.mask_flags = MTD_WRITEABLE /* force read-only */
	130	} , {
	131	.name = "ARMmon setup block",
	132	.size = 0x00010000,
	133	.offset = MTDPART_OFS_APPEND,
	134	.mask_flags = MTD_WRITEABLE /* force read-only */
	135	} , {
	136	.name = "kernel",
	137	.size = 0x00160000,
	138	.offset = MTDPART_OFS_APPEND,
	139	} , {
	140	.name = "ramdisk",
	141	.size = MTDPART_SIZ_FULL,
	142	.offset = MTDPART_OFS_APPEND
	143	}
	144	};
	145
	146	static struct physmap_flash_data cmx255_nor_flash_data[] = {
	147	{
	148	.width = 2, /* bankwidth in bytes */
	149	.parts = cmx255_nor_partitions,
	150	.nr_parts = ARRAY_SIZE(cmx255_nor_partitions)
	151	}
	152	};
	153
	154	static struct resource cmx255_nor_resource = {
	155	.start = PXA_CS0_PHYS,
	156	.end = PXA_CS0_PHYS + SZ_8M - 1,
	157	.flags = IORESOURCE_MEM,
	158	};
	159
	160	static struct platform_device cmx255_nor = {
	161	.name = "physmap-flash",
	162	.id = -1,
	163	.dev = {
	164	.platform_data = cmx255_nor_flash_data,
	165	},
	166	.resource = &cmx255_nor_resource,
	167	.num_resources = 1,
	168	};
	169
	170	static void __init cmx255_init_nor(void)
	171	{
	172	platform_device_register(&cmx255_nor);
	173	}
	174	#else
	175	static inline void cmx255_init_nor(void) {}
	176	#endif
	177
	178	#if defined(CONFIG_MTD_NAND_GPIO) \|\| defined(CONFIG_MTD_NAND_GPIO_MODULE)
f3d0d8d9 LW	179
	180	static struct gpiod_lookup_table cmx255_nand_gpiod_table = {
	181	.dev_id = "gpio-nand",
	182	.table = {
	183	GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CS, "nce", GPIO_ACTIVE_HIGH),
	184	GPIO_LOOKUP("gpio-pxa", GPIO_NAND_CLE, "cle", GPIO_ACTIVE_HIGH),
	185	GPIO_LOOKUP("gpio-pxa", GPIO_NAND_ALE, "ale", GPIO_ACTIVE_HIGH),
	186	GPIO_LOOKUP("gpio-pxa", GPIO_NAND_RB, "rdy", GPIO_ACTIVE_HIGH),
	187	},
	188	};
	189
49a7061d MR	190	static struct resource cmx255_nand_resource[] = {
	191	[0] = {
	192	.start = PXA_CS1_PHYS,
	193	.end = PXA_CS1_PHYS + 11,
	194	.flags = IORESOURCE_MEM,
	195	},
	196	[1] = {
	197	.start = PXA_CS5_PHYS,
	198	.end = PXA_CS5_PHYS + 3,
	199	.flags = IORESOURCE_MEM,
	200	},
	201	};
	202
	203	static struct mtd_partition cmx255_nand_parts[] = {
	204	[0] = {
	205	.name = "cmx255-nand",
	206	.size = MTDPART_SIZ_FULL,
	207	.offset = 0,
	208	},
	209	};
	210
	211	static struct gpio_nand_platdata cmx255_nand_platdata = {
49a7061d MR	212	.parts = cmx255_nand_parts,
	213	.num_parts = ARRAY_SIZE(cmx255_nand_parts),
	214	.chip_delay = 25,
	215	};
	216
	217	static struct platform_device cmx255_nand = {
	218	.name = "gpio-nand",
	219	.num_resources = ARRAY_SIZE(cmx255_nand_resource),
	220	.resource = cmx255_nand_resource,
	221	.id = -1,
	222	.dev = {
	223	.platform_data = &cmx255_nand_platdata,
	224	}
	225	};
	226
	227	static void __init cmx255_init_nand(void)
	228	{
f3d0d8d9	229	gpiod_add_lookup_table(&cmx255_nand_gpiod_table);
49a7061d MR	230	platform_device_register(&cmx255_nand);
	231	}
	232	#else
	233	static inline void cmx255_init_nand(void) {}
	234	#endif
	235
a7f3f030 MR	236	void __init cmx255_init(void)
	237	{
	238	pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
	239
	240	cmx255_init_rtc();
49a7061d MR	241	cmx255_init_nor();
49a7061d MR	242	cmx255_init_nand();
a7f3f030	243	}