[mirror_ubuntu-zesty-kernel.git] / arch / arm / mach-pxa / cm-x2xx.c

/*
 * linux/arch/arm/mach-pxa/cm-x2xx.c
 *
 * Copyright (C) 2008 CompuLab, Ltd.
 * Mike Rapoport <mike@compulab.co.il>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/platform_device.h>
#include <linux/syscore_ops.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/regulator/machine.h>

#include <linux/dm9000.h>
#include <linux/leds.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>

#include "pxa25x.h"
#undef GPIO24_SSP1_SFRM
#undef GPIO86_GPIO
#undef GPIO87_GPIO
#undef GPIO88_GPIO
#undef GPIO89_GPIO
#include "pxa27x.h"
#undef GPIO24_SSP1_SFRM
#undef GPIO86_GPIO
#undef GPIO87_GPIO
#undef GPIO88_GPIO
#undef GPIO89_GPIO
#include <mach/audio.h>
#include <linux/platform_data/video-pxafb.h>
#include <mach/smemc.h>

#include <asm/hardware/it8152.h>

#include "generic.h"
#include "cm-x2xx-pci.h"

extern void cmx255_init(void);
extern void cmx270_init(void);

/* reserve IRQs for IT8152 */
#define CMX2XX_NR_IRQS		(IRQ_BOARD_START + 40)

/* virtual addresses for statically mapped regions */
#define CMX2XX_VIRT_BASE	(void __iomem *)(0xe8000000)
#define CMX2XX_IT8152_VIRT	(CMX2XX_VIRT_BASE)

/* physical address if local-bus attached devices */
#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
#define CMX270_DM9000_PHYS_BASE	(PXA_CS1_PHYS + (6 << 22))

/* leds */
#define CMX255_GPIO_RED		(27)
#define CMX255_GPIO_GREEN	(32)
#define CMX270_GPIO_RED		(93)
#define CMX270_GPIO_GREEN	(94)

/* GPIO IRQ usage */
#define GPIO22_ETHIRQ		(22)
#define GPIO10_ETHIRQ		(10)
#define CMX255_GPIO_IT8152_IRQ	(0)
#define CMX270_GPIO_IT8152_IRQ	(22)

#define CMX255_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
#define CMX270_ETHIRQ		PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)

#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
static struct resource cmx255_dm9000_resource[] = {
	[0] = {
		.start = CMX255_DM9000_PHYS_BASE,
		.end   = CMX255_DM9000_PHYS_BASE + 3,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CMX255_DM9000_PHYS_BASE + 4,
		.end   = CMX255_DM9000_PHYS_BASE + 4 + 500,
		.flags = IORESOURCE_MEM,
	},
	[2] = {
		.start = CMX255_ETHIRQ,
		.end   = CMX255_ETHIRQ,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	}
};

static struct resource cmx270_dm9000_resource[] = {
	[0] = {
		.start = CMX270_DM9000_PHYS_BASE,
		.end   = CMX270_DM9000_PHYS_BASE + 3,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = CMX270_DM9000_PHYS_BASE + 8,
		.end   = CMX270_DM9000_PHYS_BASE + 8 + 500,
		.flags = IORESOURCE_MEM,
	},
	[2] = {
		.start = CMX270_ETHIRQ,
		.end   = CMX270_ETHIRQ,
		.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	}
};

static struct dm9000_plat_data cmx270_dm9000_platdata = {
	.flags		= DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM,
};

static struct platform_device cmx2xx_dm9000_device = {
	.name		= "dm9000",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(cmx270_dm9000_resource),
	.dev		= {
		.platform_data = &cmx270_dm9000_platdata,
	}
};

static void __init cmx2xx_init_dm9000(void)
{
	if (cpu_is_pxa25x())
		cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
	else
		cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
	platform_device_register(&cmx2xx_dm9000_device);
}
#else
static inline void cmx2xx_init_dm9000(void) {}
#endif

/* UCB1400 touchscreen controller */
#if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
static struct platform_device cmx2xx_ts_device = {
	.name		= "ucb1400_core",
	.id		= -1,
};

static void __init cmx2xx_init_touchscreen(void)
{
	platform_device_register(&cmx2xx_ts_device);
}
#else
static inline void cmx2xx_init_touchscreen(void) {}
#endif

/* CM-X270 LEDs */
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
static struct gpio_led cmx2xx_leds[] = {
	[0] = {
		.name = "cm-x2xx:red",
		.default_trigger = "nand-disk",
		.active_low = 1,
	},
	[1] = {
		.name = "cm-x2xx:green",
		.default_trigger = "heartbeat",
		.active_low = 1,
	},
};

static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
	.num_leds = ARRAY_SIZE(cmx2xx_leds),
	.leds = cmx2xx_leds,
};

static struct platform_device cmx2xx_led_device = {
	.name		= "leds-gpio",
	.id		= -1,
	.dev		= {
		.platform_data = &cmx2xx_gpio_led_pdata,
	},
};

static void __init cmx2xx_init_leds(void)
{
	if (cpu_is_pxa25x()) {
		cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
		cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
	} else {
		cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
		cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
	}
	platform_device_register(&cmx2xx_led_device);
}
#else
static inline void cmx2xx_init_leds(void) {}
#endif

#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
/*
  Display definitions
  keep these for backwards compatibility, although symbolic names (as
  e.g. in lpd270.c) looks better
*/
#define MTYPE_STN320x240	0
#define MTYPE_TFT640x480	1
#define MTYPE_CRT640x480	2
#define MTYPE_CRT800x600	3
#define MTYPE_TFT320x240	6
#define MTYPE_STN640x480	7

static struct pxafb_mode_info generic_stn_320x240_mode = {
	.pixclock	= 76923,
	.bpp		= 8,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 3,
	.vsync_len	= 2,
	.left_margin	= 3,
	.upper_margin	= 0,
	.right_margin	= 3,
	.lower_margin	= 0,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_320x240 = {
	.modes		= &generic_stn_320x240_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\
			  LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 60,
	.vsync_len	= 2,
	.left_margin	= 70,
	.upper_margin	= 10,
	.right_margin	= 70,
	.lower_margin	= 5,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_640x480 = {
	.modes		= &generic_tft_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\
			  LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_640x480_mode = {
	.pixclock	= 38461,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 81,
	.upper_margin	= 33,
	.right_margin	= 16,
	.lower_margin	= 10,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_640x480 = {
	.modes		= &generic_crt_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_crt_800x600_mode = {
	.pixclock	= 28846,
	.bpp		= 8,
	.xres		= 800,
	.yres	  	= 600,
	.hsync_len	= 63,
	.vsync_len	= 2,
	.left_margin	= 26,
	.upper_margin	= 21,
	.right_margin	= 26,
	.lower_margin	= 11,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_crt_800x600 = {
	.modes		= &generic_crt_800x600_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_tft_320x240_mode = {
	.pixclock	= 134615,
	.bpp		= 16,
	.xres		= 320,
	.yres		= 240,
	.hsync_len	= 63,
	.vsync_len	= 7,
	.left_margin	= 75,
	.upper_margin	= 0,
	.right_margin	= 15,
	.lower_margin	= 15,
	.sync		= 0,
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_tft_320x240 = {
	.modes		= &generic_tft_320x240_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mode_info generic_stn_640x480_mode = {
	.pixclock	= 57692,
	.bpp		= 8,
	.xres		= 640,
	.yres		= 480,
	.hsync_len	= 4,
	.vsync_len	= 2,
	.left_margin	= 10,
	.upper_margin	= 5,
	.right_margin	= 10,
	.lower_margin	= 5,
	.sync		= (FB_SYNC_HOR_HIGH_ACT |
			   FB_SYNC_VERT_HIGH_ACT),
	.cmap_greyscale = 0,
};

static struct pxafb_mach_info generic_stn_640x480 = {
	.modes		= &generic_stn_640x480_mode,
	.num_modes	= 1,
	.lcd_conn	= LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff),
	.cmap_inverse	= 0,
	.cmap_static	= 0,
};

static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;

static int __init cmx2xx_set_display(char *str)
{
	int disp_type = simple_strtol(str, NULL, 0);
	switch (disp_type) {
	case MTYPE_STN320x240:
		cmx2xx_display = &generic_stn_320x240;
		break;
	case MTYPE_TFT640x480:
		cmx2xx_display = &generic_tft_640x480;
		break;
	case MTYPE_CRT640x480:
		cmx2xx_display = &generic_crt_640x480;
		break;
	case MTYPE_CRT800x600:
		cmx2xx_display = &generic_crt_800x600;
		break;
	case MTYPE_TFT320x240:
		cmx2xx_display = &generic_tft_320x240;
		break;
	case MTYPE_STN640x480:
		cmx2xx_display = &generic_stn_640x480;
		break;
	default: /* fallback to CRT 640x480 */
		cmx2xx_display = &generic_crt_640x480;
		break;
	}
	return 1;
}

/*
   This should be done really early to get proper configuration for
   frame buffer.
   Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
   has limitied line length for kernel command line, and also it will
   break compatibitlty with proprietary releases already in field.
*/
__setup("monitor=", cmx2xx_set_display);

static void __init cmx2xx_init_display(void)
{
	pxa_set_fb_info(NULL, cmx2xx_display);
}
#else
static inline void cmx2xx_init_display(void) {}
#endif

#ifdef CONFIG_PM
static unsigned long sleep_save_msc[10];

static int cmx2xx_suspend(void)
{
	cmx2xx_pci_suspend();

	/* save MSC registers */
	sleep_save_msc[0] = __raw_readl(MSC0);
	sleep_save_msc[1] = __raw_readl(MSC1);
	sleep_save_msc[2] = __raw_readl(MSC2);

	/* setup power saving mode registers */
	PCFR = 0x0;
	PSLR = 0xff400000;
	PMCR  = 0x00000005;
	PWER  = 0x80000000;
	PFER  = 0x00000000;
	PRER  = 0x00000000;
	PGSR0 = 0xC0018800;
	PGSR1 = 0x004F0002;
	PGSR2 = 0x6021C000;
	PGSR3 = 0x00020000;

	return 0;
}

static void cmx2xx_resume(void)
{
	cmx2xx_pci_resume();

	/* restore MSC registers */
	__raw_writel(sleep_save_msc[0], MSC0);
	__raw_writel(sleep_save_msc[1], MSC1);
	__raw_writel(sleep_save_msc[2], MSC2);
}

static struct syscore_ops cmx2xx_pm_syscore_ops = {
	.resume = cmx2xx_resume,
	.suspend = cmx2xx_suspend,
};

static int __init cmx2xx_pm_init(void)
{
	register_syscore_ops(&cmx2xx_pm_syscore_ops);

	return 0;
}
#else
static int __init cmx2xx_pm_init(void) { return 0; }
#endif

#if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE)
static void __init cmx2xx_init_ac97(void)
{
	pxa_set_ac97_info(NULL);
}
#else
static inline void cmx2xx_init_ac97(void) {}
#endif

static void __init cmx2xx_init(void)
{
	pxa_set_ffuart_info(NULL);
	pxa_set_btuart_info(NULL);
	pxa_set_stuart_info(NULL);

	cmx2xx_pm_init();

	if (cpu_is_pxa25x())
		cmx255_init();
	else
		cmx270_init();

	cmx2xx_init_dm9000();
	cmx2xx_init_display();
	cmx2xx_init_ac97();
	cmx2xx_init_touchscreen();
	cmx2xx_init_leds();

	regulator_has_full_constraints();
}

static void __init cmx2xx_init_irq(void)
{
	if (cpu_is_pxa25x()) {
		pxa25x_init_irq();
		cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
	} else {
		pxa27x_init_irq();
		cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
	}
}

#ifdef CONFIG_PCI
/* Map PCI companion statically */
static struct map_desc cmx2xx_io_desc[] __initdata = {
	[0] = { /* PCI bridge */
		.virtual	= (unsigned long)CMX2XX_IT8152_VIRT,
		.pfn		= __phys_to_pfn(PXA_CS4_PHYS),
		.length		= SZ_64M,
		.type		= MT_DEVICE
	},
};

static void __init cmx2xx_map_io(void)
{
	if (cpu_is_pxa25x())
		pxa25x_map_io();

	if (cpu_is_pxa27x())
		pxa27x_map_io();

	iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));

	it8152_base_address = CMX2XX_IT8152_VIRT;
}
#else
static void __init cmx2xx_map_io(void)
{
	if (cpu_is_pxa25x())
		pxa25x_map_io();

	if (cpu_is_pxa27x())
		pxa27x_map_io();
}
#endif

MACHINE_START(ARMCORE, "Compulab CM-X2XX")
	.atag_offset	= 0x100,
	.map_io		= cmx2xx_map_io,
	.nr_irqs	= CMX2XX_NR_IRQS,
	.init_irq	= cmx2xx_init_irq,
	/* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
	.handle_irq	= pxa25x_handle_irq,
	.init_time	= pxa_timer_init,
	.init_machine	= cmx2xx_init,
#ifdef CONFIG_PCI
	.dma_zone_size	= SZ_64M,
#endif
	.restart	= pxa_restart,
MACHINE_END
Commit	Line	Data
3696a8a4	1	/*
da591937	2	* linux/arch/arm/mach-pxa/cm-x2xx.c
3696a8a4	3	*
4adc5fb6	4	* Copyright (C) 2008 CompuLab, Ltd.
3696a8a4 MR	5	* Mike Rapoport <mike@compulab.co.il>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
3696a8a4	12	#include <linux/platform_device.h>
2eaa03b5	13	#include <linux/syscore_ops.h>
2f01a973 MR	14	#include <linux/irq.h>
2f01a973 MR	15	#include <linux/gpio.h>
a927ef89	16	#include <linux/regulator/machine.h>
3696a8a4 MR	17
3696a8a4 MR	18	#include <linux/dm9000.h>
2f01a973	19	#include <linux/leds.h>
3696a8a4 MR	20
	21	#include <asm/mach/arch.h>
	22	#include <asm/mach-types.h>
	23	#include <asm/mach/map.h>
	24
4c25c5d2	25	#include "pxa25x.h"
e0347c52	26	#undef GPIO24_SSP1_SFRM
f39c42f5 AB	27	#undef GPIO86_GPIO
	28	#undef GPIO87_GPIO
	29	#undef GPIO88_GPIO
	30	#undef GPIO89_GPIO
4c25c5d2	31	#include "pxa27x.h"
f39c42f5 AB	32	#undef GPIO24_SSP1_SFRM
	33	#undef GPIO86_GPIO
	34	#undef GPIO87_GPIO
	35	#undef GPIO88_GPIO
	36	#undef GPIO89_GPIO
a09e64fb	37	#include <mach/audio.h>
293b2da1	38	#include <linux/platform_data/video-pxafb.h>
ad68bb9f	39	#include <mach/smemc.h>
3696a8a4 MR	40
	41	#include <asm/hardware/it8152.h>
	42
	43	#include "generic.h"
7d76e3f1	44	#include "cm-x2xx-pci.h"
3696a8a4	45
a7f3f030	46	extern void cmx255_init(void);
4adc5fb6 MR	47	extern void cmx270_init(void);
4adc5fb6 MR	48
6ac6b817 HZ	49	/* reserve IRQs for IT8152 */
	50	#define CMX2XX_NR_IRQS (IRQ_BOARD_START + 40)
	51
2f01a973	52	/* virtual addresses for statically mapped regions */
97b09da4	53	#define CMX2XX_VIRT_BASE (void __iomem *)(0xe8000000)
da591937	54	#define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
2f01a973	55
4adc5fb6	56	/* physical address if local-bus attached devices */
a7f3f030	57	#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
da591937 MR	58	#define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
	59
	60	/* leds */
a7f3f030 MR	61	#define CMX255_GPIO_RED (27)
a7f3f030 MR	62	#define CMX255_GPIO_GREEN (32)
da591937 MR	63	#define CMX270_GPIO_RED (93)
da591937 MR	64	#define CMX270_GPIO_GREEN (94)
3696a8a4	65
2f01a973	66	/* GPIO IRQ usage */
a7f3f030	67	#define GPIO22_ETHIRQ (22)
2f01a973	68	#define GPIO10_ETHIRQ (10)
a7f3f030	69	#define CMX255_GPIO_IT8152_IRQ (0)
da591937	70	#define CMX270_GPIO_IT8152_IRQ (22)
2f01a973	71
6384fdad HZ	72	#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
6384fdad HZ	73	#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
2f01a973 MR	74
2f01a973 MR	75	#if defined(CONFIG_DM9000) \|\| defined(CONFIG_DM9000_MODULE)
a7f3f030 MR	76	static struct resource cmx255_dm9000_resource[] = {
	77	[0] = {
	78	.start = CMX255_DM9000_PHYS_BASE,
	79	.end = CMX255_DM9000_PHYS_BASE + 3,
	80	.flags = IORESOURCE_MEM,
	81	},
	82	[1] = {
	83	.start = CMX255_DM9000_PHYS_BASE + 4,
	84	.end = CMX255_DM9000_PHYS_BASE + 4 + 500,
	85	.flags = IORESOURCE_MEM,
	86	},
	87	[2] = {
	88	.start = CMX255_ETHIRQ,
	89	.end = CMX255_ETHIRQ,
	90	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
	91	}
	92	};
	93
2f01a973	94	static struct resource cmx270_dm9000_resource[] = {
3696a8a4	95	[0] = {
da591937 MR	96	.start = CMX270_DM9000_PHYS_BASE,
da591937 MR	97	.end = CMX270_DM9000_PHYS_BASE + 3,
3696a8a4 MR	98	.flags = IORESOURCE_MEM,
	99	},
	100	[1] = {
da591937 MR	101	.start = CMX270_DM9000_PHYS_BASE + 8,
da591937 MR	102	.end = CMX270_DM9000_PHYS_BASE + 8 + 500,
3696a8a4 MR	103	.flags = IORESOURCE_MEM,
	104	},
	105	[2] = {
	106	.start = CMX270_ETHIRQ,
	107	.end = CMX270_ETHIRQ,
2f01a973	108	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
3696a8a4 MR	109	}
	110	};
	111
2f01a973	112	static struct dm9000_plat_data cmx270_dm9000_platdata = {
bff22c9b	113	.flags = DM9000_PLATF_32BITONLY \| DM9000_PLATF_NO_EEPROM,
3696a8a4 MR	114	};
3696a8a4 MR	115
da591937	116	static struct platform_device cmx2xx_dm9000_device = {
3696a8a4 MR	117	.name = "dm9000",
3696a8a4 MR	118	.id = 0,
2f01a973	119	.num_resources = ARRAY_SIZE(cmx270_dm9000_resource),
3696a8a4	120	.dev = {
2f01a973	121	.platform_data = &cmx270_dm9000_platdata,
3696a8a4 MR	122	}
	123	};
	124
da591937	125	static void __init cmx2xx_init_dm9000(void)
2f01a973	126	{
a7f3f030 MR	127	if (cpu_is_pxa25x())
	128	cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
	129	else
	130	cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
da591937	131	platform_device_register(&cmx2xx_dm9000_device);
2f01a973 MR	132	}
2f01a973 MR	133	#else
da591937	134	static inline void cmx2xx_init_dm9000(void) {}
2f01a973 MR	135	#endif
	136
	137	/* UCB1400 touchscreen controller */
	138	#if defined(CONFIG_TOUCHSCREEN_UCB1400) \|\| defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE)
da591937	139	static struct platform_device cmx2xx_ts_device = {
50f6bb0a	140	.name = "ucb1400_core",
3696a8a4 MR	141	.id = -1,
	142	};
	143
da591937	144	static void __init cmx2xx_init_touchscreen(void)
2f01a973	145	{
da591937	146	platform_device_register(&cmx2xx_ts_device);
2f01a973 MR	147	}
2f01a973 MR	148	#else
da591937	149	static inline void cmx2xx_init_touchscreen(void) {}
2f01a973 MR	150	#endif
2f01a973 MR	151
2f01a973 MR	152	/* CM-X270 LEDs */
2f01a973 MR	153	#if defined(CONFIG_LEDS_GPIO) \|\| defined(CONFIG_LEDS_GPIO_MODULE)
da591937	154	static struct gpio_led cmx2xx_leds[] = {
2f01a973	155	[0] = {
da591937	156	.name = "cm-x2xx:red",
2f01a973	157	.default_trigger = "nand-disk",
2f01a973 MR	158	.active_low = 1,
	159	},
	160	[1] = {
da591937	161	.name = "cm-x2xx:green",
2f01a973	162	.default_trigger = "heartbeat",
2f01a973 MR	163	.active_low = 1,
	164	},
	165	};
	166
da591937 MR	167	static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = {
	168	.num_leds = ARRAY_SIZE(cmx2xx_leds),
	169	.leds = cmx2xx_leds,
2f01a973 MR	170	};
2f01a973 MR	171
da591937	172	static struct platform_device cmx2xx_led_device = {
2f01a973	173	.name = "leds-gpio",
3696a8a4	174	.id = -1,
2f01a973	175	.dev = {
da591937	176	.platform_data = &cmx2xx_gpio_led_pdata,
2f01a973	177	},
3696a8a4 MR	178	};
3696a8a4 MR	179
da591937	180	static void __init cmx2xx_init_leds(void)
2f01a973	181	{
a7f3f030 MR	182	if (cpu_is_pxa25x()) {
	183	cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
	184	cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
	185	} else {
	186	cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
	187	cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
	188	}
da591937	189	platform_device_register(&cmx2xx_led_device);
2f01a973 MR	190	}
2f01a973 MR	191	#else
da591937	192	static inline void cmx2xx_init_leds(void) {}
2f01a973 MR	193	#endif
2f01a973 MR	194
2f01a973	195	#if defined(CONFIG_FB_PXA) \|\| defined(CONFIG_FB_PXA_MODULE)
3696a8a4 MR	196	/*
	197	Display definitions
	198	keep these for backwards compatibility, although symbolic names (as
	199	e.g. in lpd270.c) looks better
	200	*/
	201	#define MTYPE_STN320x240 0
	202	#define MTYPE_TFT640x480 1
	203	#define MTYPE_CRT640x480 2
	204	#define MTYPE_CRT800x600 3
	205	#define MTYPE_TFT320x240 6
	206	#define MTYPE_STN640x480 7
	207
	208	static struct pxafb_mode_info generic_stn_320x240_mode = {
	209	.pixclock = 76923,
	210	.bpp = 8,
	211	.xres = 320,
	212	.yres = 240,
	213	.hsync_len = 3,
	214	.vsync_len = 2,
	215	.left_margin = 3,
	216	.upper_margin = 0,
	217	.right_margin = 3,
	218	.lower_margin = 0,
	219	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	220	FB_SYNC_VERT_HIGH_ACT),
	221	.cmap_greyscale = 0,
	222	};
	223
	224	static struct pxafb_mach_info generic_stn_320x240 = {
	225	.modes = &generic_stn_320x240_mode,
	226	.num_modes = 1,
9587319b EM	227	.lcd_conn = LCD_COLOR_STN_8BPP \| LCD_PCLK_EDGE_FALL \|\
9587319b EM	228	LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	229	.cmap_inverse = 0,
	230	.cmap_static = 0,
	231	};
	232
	233	static struct pxafb_mode_info generic_tft_640x480_mode = {
	234	.pixclock = 38461,
	235	.bpp = 8,
	236	.xres = 640,
	237	.yres = 480,
	238	.hsync_len = 60,
	239	.vsync_len = 2,
	240	.left_margin = 70,
	241	.upper_margin = 10,
	242	.right_margin = 70,
	243	.lower_margin = 5,
	244	.sync = 0,
	245	.cmap_greyscale = 0,
	246	};
	247
	248	static struct pxafb_mach_info generic_tft_640x480 = {
	249	.modes = &generic_tft_640x480_mode,
	250	.num_modes = 1,
9587319b EM	251	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_PCLK_EDGE_FALL \|\
9587319b EM	252	LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	253	.cmap_inverse = 0,
	254	.cmap_static = 0,
	255	};
	256
	257	static struct pxafb_mode_info generic_crt_640x480_mode = {
	258	.pixclock = 38461,
	259	.bpp = 8,
	260	.xres = 640,
	261	.yres = 480,
	262	.hsync_len = 63,
	263	.vsync_len = 2,
	264	.left_margin = 81,
	265	.upper_margin = 33,
	266	.right_margin = 16,
	267	.lower_margin = 10,
	268	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	269	FB_SYNC_VERT_HIGH_ACT),
	270	.cmap_greyscale = 0,
	271	};
	272
	273	static struct pxafb_mach_info generic_crt_640x480 = {
	274	.modes = &generic_crt_640x480_mode,
	275	.num_modes = 1,
9587319b	276	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	277	.cmap_inverse = 0,
	278	.cmap_static = 0,
	279	};
	280
	281	static struct pxafb_mode_info generic_crt_800x600_mode = {
	282	.pixclock = 28846,
	283	.bpp = 8,
	284	.xres = 800,
	285	.yres = 600,
	286	.hsync_len = 63,
	287	.vsync_len = 2,
	288	.left_margin = 26,
	289	.upper_margin = 21,
	290	.right_margin = 26,
	291	.lower_margin = 11,
	292	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	293	FB_SYNC_VERT_HIGH_ACT),
	294	.cmap_greyscale = 0,
	295	};
	296
	297	static struct pxafb_mach_info generic_crt_800x600 = {
	298	.modes = &generic_crt_800x600_mode,
	299	.num_modes = 1,
9587319b	300	.lcd_conn = LCD_COLOR_TFT_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	301	.cmap_inverse = 0,
	302	.cmap_static = 0,
	303	};
	304
	305	static struct pxafb_mode_info generic_tft_320x240_mode = {
	306	.pixclock = 134615,
	307	.bpp = 16,
	308	.xres = 320,
	309	.yres = 240,
	310	.hsync_len = 63,
	311	.vsync_len = 7,
	312	.left_margin = 75,
	313	.upper_margin = 0,
	314	.right_margin = 15,
	315	.lower_margin = 15,
	316	.sync = 0,
	317	.cmap_greyscale = 0,
	318	};
	319
	320	static struct pxafb_mach_info generic_tft_320x240 = {
	321	.modes = &generic_tft_320x240_mode,
	322	.num_modes = 1,
9587319b	323	.lcd_conn = LCD_COLOR_TFT_16BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	324	.cmap_inverse = 0,
	325	.cmap_static = 0,
	326	};
	327
	328	static struct pxafb_mode_info generic_stn_640x480_mode = {
	329	.pixclock = 57692,
	330	.bpp = 8,
	331	.xres = 640,
	332	.yres = 480,
	333	.hsync_len = 4,
	334	.vsync_len = 2,
	335	.left_margin = 10,
	336	.upper_margin = 5,
	337	.right_margin = 10,
	338	.lower_margin = 5,
	339	.sync = (FB_SYNC_HOR_HIGH_ACT \|
	340	FB_SYNC_VERT_HIGH_ACT),
	341	.cmap_greyscale = 0,
	342	};
	343
	344	static struct pxafb_mach_info generic_stn_640x480 = {
	345	.modes = &generic_stn_640x480_mode,
	346	.num_modes = 1,
9587319b	347	.lcd_conn = LCD_COLOR_STN_8BPP \| LCD_AC_BIAS_FREQ(0xff),
3696a8a4 MR	348	.cmap_inverse = 0,
	349	.cmap_static = 0,
	350	};
	351
da591937	352	static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480;
3696a8a4	353
da591937	354	static int __init cmx2xx_set_display(char *str)
3696a8a4 MR	355	{
	356	int disp_type = simple_strtol(str, NULL, 0);
	357	switch (disp_type) {
	358	case MTYPE_STN320x240:
da591937	359	cmx2xx_display = &generic_stn_320x240;
3696a8a4 MR	360	break;
3696a8a4 MR	361	case MTYPE_TFT640x480:
da591937	362	cmx2xx_display = &generic_tft_640x480;
3696a8a4 MR	363	break;
3696a8a4 MR	364	case MTYPE_CRT640x480:
da591937	365	cmx2xx_display = &generic_crt_640x480;
3696a8a4 MR	366	break;
3696a8a4 MR	367	case MTYPE_CRT800x600:
da591937	368	cmx2xx_display = &generic_crt_800x600;
3696a8a4 MR	369	break;
3696a8a4 MR	370	case MTYPE_TFT320x240:
da591937	371	cmx2xx_display = &generic_tft_320x240;
3696a8a4 MR	372	break;
3696a8a4 MR	373	case MTYPE_STN640x480:
da591937	374	cmx2xx_display = &generic_stn_640x480;
3696a8a4 MR	375	break;
3696a8a4 MR	376	default: /* fallback to CRT 640x480 */
da591937	377	cmx2xx_display = &generic_crt_640x480;
3696a8a4 MR	378	break;
	379	}
	380	return 1;
	381	}
	382
	383	/*
	384	This should be done really early to get proper configuration for
	385	frame buffer.
da591937	386	Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader
3696a8a4 MR	387	has limitied line length for kernel command line, and also it will
	388	break compatibitlty with proprietary releases already in field.
	389	*/
da591937	390	__setup("monitor=", cmx2xx_set_display);
3696a8a4	391
da591937	392	static void __init cmx2xx_init_display(void)
2f01a973	393	{
4321e1a1	394	pxa_set_fb_info(NULL, cmx2xx_display);
2f01a973 MR	395	}
2f01a973 MR	396	#else
da591937	397	static inline void cmx2xx_init_display(void) {}
2f01a973 MR	398	#endif
2f01a973 MR	399
3696a8a4 MR	400	#ifdef CONFIG_PM
	401	static unsigned long sleep_save_msc[10];
	402
2eaa03b5	403	static int cmx2xx_suspend(void)
3696a8a4	404	{
da591937	405	cmx2xx_pci_suspend();
3696a8a4 MR	406
3696a8a4 MR	407	/* save MSC registers */
ad68bb9f MV	408	sleep_save_msc[0] = __raw_readl(MSC0);
	409	sleep_save_msc[1] = __raw_readl(MSC1);
	410	sleep_save_msc[2] = __raw_readl(MSC2);
3696a8a4 MR	411
	412	/* setup power saving mode registers */
	413	PCFR = 0x0;
	414	PSLR = 0xff400000;
	415	PMCR = 0x00000005;
	416	PWER = 0x80000000;
	417	PFER = 0x00000000;
	418	PRER = 0x00000000;
	419	PGSR0 = 0xC0018800;
	420	PGSR1 = 0x004F0002;
	421	PGSR2 = 0x6021C000;
	422	PGSR3 = 0x00020000;
	423
	424	return 0;
	425	}
	426
2eaa03b5	427	static void cmx2xx_resume(void)
3696a8a4	428	{
da591937	429	cmx2xx_pci_resume();
3696a8a4 MR	430
3696a8a4 MR	431	/* restore MSC registers */
ad68bb9f MV	432	__raw_writel(sleep_save_msc[0], MSC0);
	433	__raw_writel(sleep_save_msc[1], MSC1);
	434	__raw_writel(sleep_save_msc[2], MSC2);
3696a8a4 MR	435	}
3696a8a4 MR	436
2eaa03b5	437	static struct syscore_ops cmx2xx_pm_syscore_ops = {
da591937 MR	438	.resume = cmx2xx_resume,
da591937 MR	439	.suspend = cmx2xx_suspend,
3696a8a4 MR	440	};
3696a8a4 MR	441
da591937	442	static int __init cmx2xx_pm_init(void)
3696a8a4	443	{
2eaa03b5 RW	444	register_syscore_ops(&cmx2xx_pm_syscore_ops);
	445
	446	return 0;
3696a8a4 MR	447	}
3696a8a4 MR	448	#else
da591937	449	static int __init cmx2xx_pm_init(void) { return 0; }
3696a8a4 MR	450	#endif
3696a8a4 MR	451
2f01a973	452	#if defined(CONFIG_SND_PXA2XX_AC97) \|\| defined(CONFIG_SND_PXA2XX_AC97_MODULE)
da591937	453	static void __init cmx2xx_init_ac97(void)
3696a8a4	454	{
9f19d638	455	pxa_set_ac97_info(NULL);
2f01a973 MR	456	}
2f01a973 MR	457	#else
da591937	458	static inline void cmx2xx_init_ac97(void) {}
2f01a973	459	#endif
3696a8a4	460
da591937 MR	461	static void __init cmx2xx_init(void)
da591937 MR	462	{
cc155c6f RK	463	pxa_set_ffuart_info(NULL);
	464	pxa_set_btuart_info(NULL);
	465	pxa_set_stuart_info(NULL);
	466
da591937 MR	467	cmx2xx_pm_init();
da591937 MR	468
a7f3f030 MR	469	if (cpu_is_pxa25x())
	470	cmx255_init();
	471	else
	472	cmx270_init();
da591937 MR	473
	474	cmx2xx_init_dm9000();
	475	cmx2xx_init_display();
	476	cmx2xx_init_ac97();
	477	cmx2xx_init_touchscreen();
	478	cmx2xx_init_leds();
a927ef89 RJ	479
a927ef89 RJ	480	regulator_has_full_constraints();
da591937 MR	481	}
	482
	483	static void __init cmx2xx_init_irq(void)
3696a8a4	484	{
a7f3f030 MR	485	if (cpu_is_pxa25x()) {
	486	pxa25x_init_irq();
	487	cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
	488	} else {
	489	pxa27x_init_irq();
	490	cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
	491	}
2f01a973	492	}
3696a8a4	493
2f01a973 MR	494	#ifdef CONFIG_PCI
2f01a973 MR	495	/* Map PCI companion statically */
da591937	496	static struct map_desc cmx2xx_io_desc[] __initdata = {
2f01a973	497	[0] = { /* PCI bridge */
97b09da4	498	.virtual = (unsigned long)CMX2XX_IT8152_VIRT,
2f01a973 MR	499	.pfn = __phys_to_pfn(PXA_CS4_PHYS),
	500	.length = SZ_64M,
	501	.type = MT_DEVICE
	502	},
	503	};
3696a8a4	504
da591937	505	static void __init cmx2xx_map_io(void)
2f01a973	506	{
851982c1 MV	507	if (cpu_is_pxa25x())
	508	pxa25x_map_io();
	509
	510	if (cpu_is_pxa27x())
	511	pxa27x_map_io();
	512
da591937	513	iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc));
3696a8a4	514
da591937	515	it8152_base_address = CMX2XX_IT8152_VIRT;
3696a8a4	516	}
2f01a973	517	#else
da591937	518	static void __init cmx2xx_map_io(void)
3696a8a4	519	{
851982c1 MV	520	if (cpu_is_pxa25x())
	521	pxa25x_map_io();
	522
	523	if (cpu_is_pxa27x())
	524	pxa27x_map_io();
3696a8a4	525	}
2f01a973	526	#endif
3696a8a4	527
da591937	528	MACHINE_START(ARMCORE, "Compulab CM-X2XX")
7375aba6	529	.atag_offset = 0x100,
da591937	530	.map_io = cmx2xx_map_io,
6ac6b817	531	.nr_irqs = CMX2XX_NR_IRQS,
da591937	532	.init_irq = cmx2xx_init_irq,
8a97ae2f EM	533	/* NOTE: pxa25x_handle_irq() works on PXA27x w/o camera support */
8a97ae2f EM	534	.handle_irq = pxa25x_handle_irq,
6bb27d73	535	.init_time = pxa_timer_init,
da591937	536	.init_machine = cmx2xx_init,
805e88dc NP	537	#ifdef CONFIG_PCI
	538	.dma_zone_size = SZ_64M,
	539	#endif
271a74fc	540	.restart = pxa_restart,
3696a8a4	541	MACHINE_END