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3696a8a4 | 1 | /* |
da591937 | 2 | * linux/arch/arm/mach-pxa/cm-x2xx.c |
3696a8a4 | 3 | * |
4adc5fb6 | 4 | * Copyright (C) 2008 CompuLab, Ltd. |
3696a8a4 MR |
5 | * Mike Rapoport <mike@compulab.co.il> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
3696a8a4 | 12 | #include <linux/platform_device.h> |
3696a8a4 | 13 | #include <linux/sysdev.h> |
2f01a973 MR |
14 | #include <linux/irq.h> |
15 | #include <linux/gpio.h> | |
3696a8a4 MR |
16 | |
17 | #include <linux/dm9000.h> | |
2f01a973 | 18 | #include <linux/leds.h> |
3696a8a4 MR |
19 | |
20 | #include <asm/mach/arch.h> | |
21 | #include <asm/mach-types.h> | |
22 | #include <asm/mach/map.h> | |
23 | ||
a09e64fb | 24 | #include <mach/pxa2xx-regs.h> |
a09e64fb RK |
25 | #include <mach/audio.h> |
26 | #include <mach/pxafb.h> | |
3696a8a4 MR |
27 | |
28 | #include <asm/hardware/it8152.h> | |
29 | ||
30 | #include "generic.h" | |
7d76e3f1 | 31 | #include "cm-x2xx-pci.h" |
3696a8a4 | 32 | |
a7f3f030 | 33 | extern void cmx255_init(void); |
4adc5fb6 MR |
34 | extern void cmx270_init(void); |
35 | ||
2f01a973 | 36 | /* virtual addresses for statically mapped regions */ |
da591937 MR |
37 | #define CMX2XX_VIRT_BASE (0xe8000000) |
38 | #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE) | |
2f01a973 | 39 | |
4adc5fb6 | 40 | /* physical address if local-bus attached devices */ |
a7f3f030 | 41 | #define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22)) |
da591937 MR |
42 | #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22)) |
43 | ||
44 | /* leds */ | |
a7f3f030 MR |
45 | #define CMX255_GPIO_RED (27) |
46 | #define CMX255_GPIO_GREEN (32) | |
da591937 MR |
47 | #define CMX270_GPIO_RED (93) |
48 | #define CMX270_GPIO_GREEN (94) | |
3696a8a4 | 49 | |
2f01a973 | 50 | /* GPIO IRQ usage */ |
a7f3f030 | 51 | #define GPIO22_ETHIRQ (22) |
2f01a973 | 52 | #define GPIO10_ETHIRQ (10) |
a7f3f030 | 53 | #define CMX255_GPIO_IT8152_IRQ (0) |
da591937 | 54 | #define CMX270_GPIO_IT8152_IRQ (22) |
2f01a973 | 55 | |
a7f3f030 | 56 | #define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) |
2f01a973 | 57 | #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) |
2f01a973 MR |
58 | |
59 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) | |
a7f3f030 MR |
60 | static struct resource cmx255_dm9000_resource[] = { |
61 | [0] = { | |
62 | .start = CMX255_DM9000_PHYS_BASE, | |
63 | .end = CMX255_DM9000_PHYS_BASE + 3, | |
64 | .flags = IORESOURCE_MEM, | |
65 | }, | |
66 | [1] = { | |
67 | .start = CMX255_DM9000_PHYS_BASE + 4, | |
68 | .end = CMX255_DM9000_PHYS_BASE + 4 + 500, | |
69 | .flags = IORESOURCE_MEM, | |
70 | }, | |
71 | [2] = { | |
72 | .start = CMX255_ETHIRQ, | |
73 | .end = CMX255_ETHIRQ, | |
74 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, | |
75 | } | |
76 | }; | |
77 | ||
2f01a973 | 78 | static struct resource cmx270_dm9000_resource[] = { |
3696a8a4 | 79 | [0] = { |
da591937 MR |
80 | .start = CMX270_DM9000_PHYS_BASE, |
81 | .end = CMX270_DM9000_PHYS_BASE + 3, | |
3696a8a4 MR |
82 | .flags = IORESOURCE_MEM, |
83 | }, | |
84 | [1] = { | |
da591937 MR |
85 | .start = CMX270_DM9000_PHYS_BASE + 8, |
86 | .end = CMX270_DM9000_PHYS_BASE + 8 + 500, | |
3696a8a4 MR |
87 | .flags = IORESOURCE_MEM, |
88 | }, | |
89 | [2] = { | |
90 | .start = CMX270_ETHIRQ, | |
91 | .end = CMX270_ETHIRQ, | |
2f01a973 | 92 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
3696a8a4 MR |
93 | } |
94 | }; | |
95 | ||
2f01a973 | 96 | static struct dm9000_plat_data cmx270_dm9000_platdata = { |
bff22c9b | 97 | .flags = DM9000_PLATF_32BITONLY | DM9000_PLATF_NO_EEPROM, |
3696a8a4 MR |
98 | }; |
99 | ||
da591937 | 100 | static struct platform_device cmx2xx_dm9000_device = { |
3696a8a4 MR |
101 | .name = "dm9000", |
102 | .id = 0, | |
2f01a973 | 103 | .num_resources = ARRAY_SIZE(cmx270_dm9000_resource), |
3696a8a4 | 104 | .dev = { |
2f01a973 | 105 | .platform_data = &cmx270_dm9000_platdata, |
3696a8a4 MR |
106 | } |
107 | }; | |
108 | ||
da591937 | 109 | static void __init cmx2xx_init_dm9000(void) |
2f01a973 | 110 | { |
a7f3f030 MR |
111 | if (cpu_is_pxa25x()) |
112 | cmx2xx_dm9000_device.resource = cmx255_dm9000_resource; | |
113 | else | |
114 | cmx2xx_dm9000_device.resource = cmx270_dm9000_resource; | |
da591937 | 115 | platform_device_register(&cmx2xx_dm9000_device); |
2f01a973 MR |
116 | } |
117 | #else | |
da591937 | 118 | static inline void cmx2xx_init_dm9000(void) {} |
2f01a973 MR |
119 | #endif |
120 | ||
121 | /* UCB1400 touchscreen controller */ | |
122 | #if defined(CONFIG_TOUCHSCREEN_UCB1400) || defined(CONFIG_TOUCHSCREEN_UCB1400_MODULE) | |
da591937 | 123 | static struct platform_device cmx2xx_ts_device = { |
3696a8a4 MR |
124 | .name = "ucb1400_ts", |
125 | .id = -1, | |
126 | }; | |
127 | ||
da591937 | 128 | static void __init cmx2xx_init_touchscreen(void) |
2f01a973 | 129 | { |
da591937 | 130 | platform_device_register(&cmx2xx_ts_device); |
2f01a973 MR |
131 | } |
132 | #else | |
da591937 | 133 | static inline void cmx2xx_init_touchscreen(void) {} |
2f01a973 MR |
134 | #endif |
135 | ||
2f01a973 MR |
136 | /* CM-X270 LEDs */ |
137 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
da591937 | 138 | static struct gpio_led cmx2xx_leds[] = { |
2f01a973 | 139 | [0] = { |
da591937 | 140 | .name = "cm-x2xx:red", |
2f01a973 | 141 | .default_trigger = "nand-disk", |
2f01a973 MR |
142 | .active_low = 1, |
143 | }, | |
144 | [1] = { | |
da591937 | 145 | .name = "cm-x2xx:green", |
2f01a973 | 146 | .default_trigger = "heartbeat", |
2f01a973 MR |
147 | .active_low = 1, |
148 | }, | |
149 | }; | |
150 | ||
da591937 MR |
151 | static struct gpio_led_platform_data cmx2xx_gpio_led_pdata = { |
152 | .num_leds = ARRAY_SIZE(cmx2xx_leds), | |
153 | .leds = cmx2xx_leds, | |
2f01a973 MR |
154 | }; |
155 | ||
da591937 | 156 | static struct platform_device cmx2xx_led_device = { |
2f01a973 | 157 | .name = "leds-gpio", |
3696a8a4 | 158 | .id = -1, |
2f01a973 | 159 | .dev = { |
da591937 | 160 | .platform_data = &cmx2xx_gpio_led_pdata, |
2f01a973 | 161 | }, |
3696a8a4 MR |
162 | }; |
163 | ||
da591937 | 164 | static void __init cmx2xx_init_leds(void) |
2f01a973 | 165 | { |
a7f3f030 MR |
166 | if (cpu_is_pxa25x()) { |
167 | cmx2xx_leds[0].gpio = CMX255_GPIO_RED; | |
168 | cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN; | |
169 | } else { | |
170 | cmx2xx_leds[0].gpio = CMX270_GPIO_RED; | |
171 | cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN; | |
172 | } | |
da591937 | 173 | platform_device_register(&cmx2xx_led_device); |
2f01a973 MR |
174 | } |
175 | #else | |
da591937 | 176 | static inline void cmx2xx_init_leds(void) {} |
2f01a973 MR |
177 | #endif |
178 | ||
2f01a973 | 179 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
3696a8a4 MR |
180 | /* |
181 | Display definitions | |
182 | keep these for backwards compatibility, although symbolic names (as | |
183 | e.g. in lpd270.c) looks better | |
184 | */ | |
185 | #define MTYPE_STN320x240 0 | |
186 | #define MTYPE_TFT640x480 1 | |
187 | #define MTYPE_CRT640x480 2 | |
188 | #define MTYPE_CRT800x600 3 | |
189 | #define MTYPE_TFT320x240 6 | |
190 | #define MTYPE_STN640x480 7 | |
191 | ||
192 | static struct pxafb_mode_info generic_stn_320x240_mode = { | |
193 | .pixclock = 76923, | |
194 | .bpp = 8, | |
195 | .xres = 320, | |
196 | .yres = 240, | |
197 | .hsync_len = 3, | |
198 | .vsync_len = 2, | |
199 | .left_margin = 3, | |
200 | .upper_margin = 0, | |
201 | .right_margin = 3, | |
202 | .lower_margin = 0, | |
203 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
204 | FB_SYNC_VERT_HIGH_ACT), | |
205 | .cmap_greyscale = 0, | |
206 | }; | |
207 | ||
208 | static struct pxafb_mach_info generic_stn_320x240 = { | |
209 | .modes = &generic_stn_320x240_mode, | |
210 | .num_modes = 1, | |
9587319b EM |
211 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_PCLK_EDGE_FALL |\ |
212 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
213 | .cmap_inverse = 0, |
214 | .cmap_static = 0, | |
215 | }; | |
216 | ||
217 | static struct pxafb_mode_info generic_tft_640x480_mode = { | |
218 | .pixclock = 38461, | |
219 | .bpp = 8, | |
220 | .xres = 640, | |
221 | .yres = 480, | |
222 | .hsync_len = 60, | |
223 | .vsync_len = 2, | |
224 | .left_margin = 70, | |
225 | .upper_margin = 10, | |
226 | .right_margin = 70, | |
227 | .lower_margin = 5, | |
228 | .sync = 0, | |
229 | .cmap_greyscale = 0, | |
230 | }; | |
231 | ||
232 | static struct pxafb_mach_info generic_tft_640x480 = { | |
233 | .modes = &generic_tft_640x480_mode, | |
234 | .num_modes = 1, | |
9587319b EM |
235 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_PCLK_EDGE_FALL |\ |
236 | LCD_AC_BIAS_FREQ(0xff), | |
3696a8a4 MR |
237 | .cmap_inverse = 0, |
238 | .cmap_static = 0, | |
239 | }; | |
240 | ||
241 | static struct pxafb_mode_info generic_crt_640x480_mode = { | |
242 | .pixclock = 38461, | |
243 | .bpp = 8, | |
244 | .xres = 640, | |
245 | .yres = 480, | |
246 | .hsync_len = 63, | |
247 | .vsync_len = 2, | |
248 | .left_margin = 81, | |
249 | .upper_margin = 33, | |
250 | .right_margin = 16, | |
251 | .lower_margin = 10, | |
252 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
253 | FB_SYNC_VERT_HIGH_ACT), | |
254 | .cmap_greyscale = 0, | |
255 | }; | |
256 | ||
257 | static struct pxafb_mach_info generic_crt_640x480 = { | |
258 | .modes = &generic_crt_640x480_mode, | |
259 | .num_modes = 1, | |
9587319b | 260 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
261 | .cmap_inverse = 0, |
262 | .cmap_static = 0, | |
263 | }; | |
264 | ||
265 | static struct pxafb_mode_info generic_crt_800x600_mode = { | |
266 | .pixclock = 28846, | |
267 | .bpp = 8, | |
268 | .xres = 800, | |
269 | .yres = 600, | |
270 | .hsync_len = 63, | |
271 | .vsync_len = 2, | |
272 | .left_margin = 26, | |
273 | .upper_margin = 21, | |
274 | .right_margin = 26, | |
275 | .lower_margin = 11, | |
276 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
277 | FB_SYNC_VERT_HIGH_ACT), | |
278 | .cmap_greyscale = 0, | |
279 | }; | |
280 | ||
281 | static struct pxafb_mach_info generic_crt_800x600 = { | |
282 | .modes = &generic_crt_800x600_mode, | |
283 | .num_modes = 1, | |
9587319b | 284 | .lcd_conn = LCD_COLOR_TFT_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
285 | .cmap_inverse = 0, |
286 | .cmap_static = 0, | |
287 | }; | |
288 | ||
289 | static struct pxafb_mode_info generic_tft_320x240_mode = { | |
290 | .pixclock = 134615, | |
291 | .bpp = 16, | |
292 | .xres = 320, | |
293 | .yres = 240, | |
294 | .hsync_len = 63, | |
295 | .vsync_len = 7, | |
296 | .left_margin = 75, | |
297 | .upper_margin = 0, | |
298 | .right_margin = 15, | |
299 | .lower_margin = 15, | |
300 | .sync = 0, | |
301 | .cmap_greyscale = 0, | |
302 | }; | |
303 | ||
304 | static struct pxafb_mach_info generic_tft_320x240 = { | |
305 | .modes = &generic_tft_320x240_mode, | |
306 | .num_modes = 1, | |
9587319b | 307 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
308 | .cmap_inverse = 0, |
309 | .cmap_static = 0, | |
310 | }; | |
311 | ||
312 | static struct pxafb_mode_info generic_stn_640x480_mode = { | |
313 | .pixclock = 57692, | |
314 | .bpp = 8, | |
315 | .xres = 640, | |
316 | .yres = 480, | |
317 | .hsync_len = 4, | |
318 | .vsync_len = 2, | |
319 | .left_margin = 10, | |
320 | .upper_margin = 5, | |
321 | .right_margin = 10, | |
322 | .lower_margin = 5, | |
323 | .sync = (FB_SYNC_HOR_HIGH_ACT | | |
324 | FB_SYNC_VERT_HIGH_ACT), | |
325 | .cmap_greyscale = 0, | |
326 | }; | |
327 | ||
328 | static struct pxafb_mach_info generic_stn_640x480 = { | |
329 | .modes = &generic_stn_640x480_mode, | |
330 | .num_modes = 1, | |
9587319b | 331 | .lcd_conn = LCD_COLOR_STN_8BPP | LCD_AC_BIAS_FREQ(0xff), |
3696a8a4 MR |
332 | .cmap_inverse = 0, |
333 | .cmap_static = 0, | |
334 | }; | |
335 | ||
da591937 | 336 | static struct pxafb_mach_info *cmx2xx_display = &generic_crt_640x480; |
3696a8a4 | 337 | |
da591937 | 338 | static int __init cmx2xx_set_display(char *str) |
3696a8a4 MR |
339 | { |
340 | int disp_type = simple_strtol(str, NULL, 0); | |
341 | switch (disp_type) { | |
342 | case MTYPE_STN320x240: | |
da591937 | 343 | cmx2xx_display = &generic_stn_320x240; |
3696a8a4 MR |
344 | break; |
345 | case MTYPE_TFT640x480: | |
da591937 | 346 | cmx2xx_display = &generic_tft_640x480; |
3696a8a4 MR |
347 | break; |
348 | case MTYPE_CRT640x480: | |
da591937 | 349 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
350 | break; |
351 | case MTYPE_CRT800x600: | |
da591937 | 352 | cmx2xx_display = &generic_crt_800x600; |
3696a8a4 MR |
353 | break; |
354 | case MTYPE_TFT320x240: | |
da591937 | 355 | cmx2xx_display = &generic_tft_320x240; |
3696a8a4 MR |
356 | break; |
357 | case MTYPE_STN640x480: | |
da591937 | 358 | cmx2xx_display = &generic_stn_640x480; |
3696a8a4 MR |
359 | break; |
360 | default: /* fallback to CRT 640x480 */ | |
da591937 | 361 | cmx2xx_display = &generic_crt_640x480; |
3696a8a4 MR |
362 | break; |
363 | } | |
364 | return 1; | |
365 | } | |
366 | ||
367 | /* | |
368 | This should be done really early to get proper configuration for | |
369 | frame buffer. | |
da591937 | 370 | Indeed, pxafb parameters can be used istead, but CM-X2XX bootloader |
3696a8a4 MR |
371 | has limitied line length for kernel command line, and also it will |
372 | break compatibitlty with proprietary releases already in field. | |
373 | */ | |
da591937 | 374 | __setup("monitor=", cmx2xx_set_display); |
3696a8a4 | 375 | |
da591937 | 376 | static void __init cmx2xx_init_display(void) |
2f01a973 | 377 | { |
da591937 | 378 | set_pxa_fb_info(cmx2xx_display); |
2f01a973 MR |
379 | } |
380 | #else | |
da591937 | 381 | static inline void cmx2xx_init_display(void) {} |
2f01a973 MR |
382 | #endif |
383 | ||
3696a8a4 MR |
384 | #ifdef CONFIG_PM |
385 | static unsigned long sleep_save_msc[10]; | |
386 | ||
da591937 | 387 | static int cmx2xx_suspend(struct sys_device *dev, pm_message_t state) |
3696a8a4 | 388 | { |
da591937 | 389 | cmx2xx_pci_suspend(); |
3696a8a4 MR |
390 | |
391 | /* save MSC registers */ | |
392 | sleep_save_msc[0] = MSC0; | |
393 | sleep_save_msc[1] = MSC1; | |
394 | sleep_save_msc[2] = MSC2; | |
395 | ||
396 | /* setup power saving mode registers */ | |
397 | PCFR = 0x0; | |
398 | PSLR = 0xff400000; | |
399 | PMCR = 0x00000005; | |
400 | PWER = 0x80000000; | |
401 | PFER = 0x00000000; | |
402 | PRER = 0x00000000; | |
403 | PGSR0 = 0xC0018800; | |
404 | PGSR1 = 0x004F0002; | |
405 | PGSR2 = 0x6021C000; | |
406 | PGSR3 = 0x00020000; | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
da591937 | 411 | static int cmx2xx_resume(struct sys_device *dev) |
3696a8a4 | 412 | { |
da591937 | 413 | cmx2xx_pci_resume(); |
3696a8a4 MR |
414 | |
415 | /* restore MSC registers */ | |
416 | MSC0 = sleep_save_msc[0]; | |
417 | MSC1 = sleep_save_msc[1]; | |
418 | MSC2 = sleep_save_msc[2]; | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
da591937 | 423 | static struct sysdev_class cmx2xx_pm_sysclass = { |
af5ca3f4 | 424 | .name = "pm", |
da591937 MR |
425 | .resume = cmx2xx_resume, |
426 | .suspend = cmx2xx_suspend, | |
3696a8a4 MR |
427 | }; |
428 | ||
da591937 MR |
429 | static struct sys_device cmx2xx_pm_device = { |
430 | .cls = &cmx2xx_pm_sysclass, | |
3696a8a4 MR |
431 | }; |
432 | ||
da591937 | 433 | static int __init cmx2xx_pm_init(void) |
3696a8a4 MR |
434 | { |
435 | int error; | |
da591937 | 436 | error = sysdev_class_register(&cmx2xx_pm_sysclass); |
3696a8a4 | 437 | if (error == 0) |
da591937 | 438 | error = sysdev_register(&cmx2xx_pm_device); |
3696a8a4 MR |
439 | return error; |
440 | } | |
441 | #else | |
da591937 | 442 | static int __init cmx2xx_pm_init(void) { return 0; } |
3696a8a4 MR |
443 | #endif |
444 | ||
2f01a973 | 445 | #if defined(CONFIG_SND_PXA2XX_AC97) || defined(CONFIG_SND_PXA2XX_AC97_MODULE) |
da591937 | 446 | static void __init cmx2xx_init_ac97(void) |
3696a8a4 | 447 | { |
9f19d638 | 448 | pxa_set_ac97_info(NULL); |
2f01a973 MR |
449 | } |
450 | #else | |
da591937 | 451 | static inline void cmx2xx_init_ac97(void) {} |
2f01a973 | 452 | #endif |
3696a8a4 | 453 | |
da591937 MR |
454 | static void __init cmx2xx_init(void) |
455 | { | |
456 | cmx2xx_pm_init(); | |
457 | ||
a7f3f030 MR |
458 | if (cpu_is_pxa25x()) |
459 | cmx255_init(); | |
460 | else | |
461 | cmx270_init(); | |
da591937 MR |
462 | |
463 | cmx2xx_init_dm9000(); | |
464 | cmx2xx_init_display(); | |
465 | cmx2xx_init_ac97(); | |
466 | cmx2xx_init_touchscreen(); | |
467 | cmx2xx_init_leds(); | |
468 | } | |
469 | ||
470 | static void __init cmx2xx_init_irq(void) | |
3696a8a4 MR |
471 | { |
472 | pxa27x_init_irq(); | |
473 | ||
a7f3f030 MR |
474 | if (cpu_is_pxa25x()) { |
475 | pxa25x_init_irq(); | |
476 | cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); | |
477 | } else { | |
478 | pxa27x_init_irq(); | |
479 | cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ); | |
480 | } | |
2f01a973 | 481 | } |
3696a8a4 | 482 | |
2f01a973 MR |
483 | #ifdef CONFIG_PCI |
484 | /* Map PCI companion statically */ | |
da591937 | 485 | static struct map_desc cmx2xx_io_desc[] __initdata = { |
2f01a973 | 486 | [0] = { /* PCI bridge */ |
da591937 | 487 | .virtual = CMX2XX_IT8152_VIRT, |
2f01a973 MR |
488 | .pfn = __phys_to_pfn(PXA_CS4_PHYS), |
489 | .length = SZ_64M, | |
490 | .type = MT_DEVICE | |
491 | }, | |
492 | }; | |
3696a8a4 | 493 | |
da591937 | 494 | static void __init cmx2xx_map_io(void) |
2f01a973 MR |
495 | { |
496 | pxa_map_io(); | |
da591937 | 497 | iotable_init(cmx2xx_io_desc, ARRAY_SIZE(cmx2xx_io_desc)); |
3696a8a4 | 498 | |
da591937 | 499 | it8152_base_address = CMX2XX_IT8152_VIRT; |
3696a8a4 | 500 | } |
2f01a973 | 501 | #else |
da591937 | 502 | static void __init cmx2xx_map_io(void) |
3696a8a4 MR |
503 | { |
504 | pxa_map_io(); | |
3696a8a4 | 505 | } |
2f01a973 | 506 | #endif |
3696a8a4 | 507 | |
da591937 | 508 | MACHINE_START(ARMCORE, "Compulab CM-X2XX") |
3696a8a4 MR |
509 | .boot_params = 0xa0000100, |
510 | .phys_io = 0x40000000, | |
511 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | |
da591937 MR |
512 | .map_io = cmx2xx_map_io, |
513 | .init_irq = cmx2xx_init_irq, | |
3696a8a4 | 514 | .timer = &pxa_timer, |
da591937 | 515 | .init_machine = cmx2xx_init, |
3696a8a4 | 516 | MACHINE_END |