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cf75d8d2 MR |
1 | /* |
2 | * linux/arch/arm/mach-pxa/cm-x300.c | |
3 | * | |
4 | * Support for the CompuLab CM-X300 modules | |
5 | * | |
14fd9e00 | 6 | * Copyright (C) 2008,2009 CompuLab Ltd. |
cf75d8d2 MR |
7 | * |
8 | * Mike Rapoport <mike@compulab.co.il> | |
14fd9e00 | 9 | * Igor Grinberg <grinberg@compulab.co.il> |
cf75d8d2 MR |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
32de50e2 | 15 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
cf75d8d2 MR |
16 | |
17 | #include <linux/module.h> | |
18 | #include <linux/kernel.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/init.h> | |
b3d01da6 | 21 | #include <linux/delay.h> |
cf75d8d2 | 22 | #include <linux/platform_device.h> |
1b43d8ed | 23 | #include <linux/clk.h> |
cf75d8d2 MR |
24 | |
25 | #include <linux/gpio.h> | |
26 | #include <linux/dm9000.h> | |
27 | #include <linux/leds.h> | |
1858ced3 | 28 | #include <linux/rtc-v3020.h> |
db205463 | 29 | #include <linux/pwm_backlight.h> |
cf75d8d2 MR |
30 | |
31 | #include <linux/i2c.h> | |
32 | #include <linux/i2c/pca953x.h> | |
b459396e | 33 | #include <linux/i2c/pxa-i2c.h> |
cf75d8d2 | 34 | |
9c017ca1 | 35 | #include <linux/mfd/da903x.h> |
d176d64b | 36 | #include <linux/regulator/machine.h> |
03ba7e07 IG |
37 | #include <linux/power_supply.h> |
38 | #include <linux/apm-emulation.h> | |
9c017ca1 | 39 | |
83e560ee IG |
40 | #include <linux/spi/spi.h> |
41 | #include <linux/spi/spi_gpio.h> | |
42 | #include <linux/spi/tdo24m.h> | |
43 | ||
cf75d8d2 MR |
44 | #include <asm/mach-types.h> |
45 | #include <asm/mach/arch.h> | |
b5a5c474 | 46 | #include <asm/setup.h> |
9f97da78 | 47 | #include <asm/system_info.h> |
cf75d8d2 | 48 | |
51c62982 | 49 | #include <mach/pxa300.h> |
edaa64c9 | 50 | #include <mach/pxa27x-udc.h> |
cf75d8d2 MR |
51 | #include <mach/pxafb.h> |
52 | #include <mach/mmc.h> | |
53 | #include <mach/ohci.h> | |
82b95ecb | 54 | #include <plat/pxa3xx_nand.h> |
74e74def | 55 | #include <mach/audio.h> |
1b43d8ed | 56 | #include <mach/pxa3xx-u2d.h> |
cf75d8d2 MR |
57 | |
58 | #include <asm/mach/map.h> | |
59 | ||
60 | #include "generic.h" | |
db205463 | 61 | #include "devices.h" |
cf75d8d2 MR |
62 | |
63 | #define CM_X300_ETH_PHYS 0x08000010 | |
64 | ||
0bff2fc3 MR |
65 | #define GPIO82_MMC_IRQ (82) |
66 | #define GPIO85_MMC_WP (85) | |
cf75d8d2 | 67 | |
6384fdad | 68 | #define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ) |
cf75d8d2 | 69 | |
1858ced3 MR |
70 | #define GPIO95_RTC_CS (95) |
71 | #define GPIO96_RTC_WR (96) | |
72 | #define GPIO97_RTC_RD (97) | |
73 | #define GPIO98_RTC_IO (98) | |
74 | ||
1b43d8ed IG |
75 | #define GPIO_ULPI_PHY_RST (127) |
76 | ||
def8252d | 77 | static mfp_cfg_t cm_x3xx_mfp_cfg[] __initdata = { |
cf75d8d2 MR |
78 | /* LCD */ |
79 | GPIO54_LCD_LDD_0, | |
80 | GPIO55_LCD_LDD_1, | |
81 | GPIO56_LCD_LDD_2, | |
82 | GPIO57_LCD_LDD_3, | |
83 | GPIO58_LCD_LDD_4, | |
84 | GPIO59_LCD_LDD_5, | |
85 | GPIO60_LCD_LDD_6, | |
86 | GPIO61_LCD_LDD_7, | |
87 | GPIO62_LCD_LDD_8, | |
88 | GPIO63_LCD_LDD_9, | |
89 | GPIO64_LCD_LDD_10, | |
90 | GPIO65_LCD_LDD_11, | |
91 | GPIO66_LCD_LDD_12, | |
92 | GPIO67_LCD_LDD_13, | |
93 | GPIO68_LCD_LDD_14, | |
94 | GPIO69_LCD_LDD_15, | |
95 | GPIO72_LCD_FCLK, | |
96 | GPIO73_LCD_LCLK, | |
97 | GPIO74_LCD_PCLK, | |
98 | GPIO75_LCD_BIAS, | |
99 | ||
100 | /* BTUART */ | |
101 | GPIO111_UART2_RTS, | |
102 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, | |
103 | GPIO113_UART2_TXD, | |
104 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, | |
105 | ||
106 | /* STUART */ | |
107 | GPIO109_UART3_TXD, | |
108 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, | |
109 | ||
110 | /* AC97 */ | |
111 | GPIO23_AC97_nACRESET, | |
112 | GPIO24_AC97_SYSCLK, | |
113 | GPIO29_AC97_BITCLK, | |
114 | GPIO25_AC97_SDATA_IN_0, | |
115 | GPIO27_AC97_SDATA_OUT, | |
116 | GPIO28_AC97_SYNC, | |
117 | ||
118 | /* Keypad */ | |
119 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, | |
120 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, | |
121 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, | |
122 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, | |
123 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, | |
124 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, | |
125 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, | |
126 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, | |
127 | GPIO121_KP_MKOUT_0, | |
128 | GPIO122_KP_MKOUT_1, | |
129 | GPIO123_KP_MKOUT_2, | |
130 | GPIO124_KP_MKOUT_3, | |
131 | GPIO125_KP_MKOUT_4, | |
132 | GPIO4_2_KP_MKOUT_5, | |
133 | ||
134 | /* MMC1 */ | |
135 | GPIO3_MMC1_DAT0, | |
136 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | |
137 | GPIO5_MMC1_DAT2, | |
138 | GPIO6_MMC1_DAT3, | |
139 | GPIO7_MMC1_CLK, | |
140 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | |
141 | ||
142 | /* MMC2 */ | |
143 | GPIO9_MMC2_DAT0, | |
144 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | |
145 | GPIO11_MMC2_DAT2, | |
146 | GPIO12_MMC2_DAT3, | |
147 | GPIO13_MMC2_CLK, | |
148 | GPIO14_MMC2_CMD, | |
149 | ||
150 | /* FFUART */ | |
151 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, | |
152 | GPIO31_UART1_TXD, | |
153 | GPIO32_UART1_CTS, | |
154 | GPIO37_UART1_RTS, | |
155 | GPIO33_UART1_DCD, | |
156 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, | |
157 | GPIO35_UART1_RI, | |
158 | GPIO36_UART1_DTR, | |
159 | ||
160 | /* GPIOs */ | |
cf75d8d2 MR |
161 | GPIO82_GPIO | MFP_PULL_HIGH, /* MMC CD */ |
162 | GPIO85_GPIO, /* MMC WP */ | |
163 | GPIO99_GPIO, /* Ethernet IRQ */ | |
6f584cfa | 164 | |
1858ced3 | 165 | /* RTC GPIOs */ |
6c7b3ea5 IG |
166 | GPIO95_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC CS */ |
167 | GPIO96_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC WR */ | |
168 | GPIO97_GPIO | MFP_LPM_DRIVE_HIGH, /* RTC RD */ | |
169 | GPIO98_GPIO, /* RTC IO */ | |
1858ced3 | 170 | |
6f584cfa EM |
171 | /* Standard I2C */ |
172 | GPIO21_I2C_SCL, | |
173 | GPIO22_I2C_SDA, | |
db205463 IG |
174 | |
175 | /* PWM Backlight */ | |
176 | GPIO19_PWM2_OUT, | |
cf75d8d2 MR |
177 | }; |
178 | ||
def8252d | 179 | static mfp_cfg_t cm_x3xx_rev_lt130_mfp_cfg[] __initdata = { |
55052ea2 IG |
180 | /* GPIOs */ |
181 | GPIO79_GPIO, /* LED */ | |
182 | GPIO77_GPIO, /* WiFi reset */ | |
183 | GPIO78_GPIO, /* BT reset */ | |
184 | }; | |
185 | ||
def8252d | 186 | static mfp_cfg_t cm_x3xx_rev_ge130_mfp_cfg[] __initdata = { |
55052ea2 IG |
187 | /* GPIOs */ |
188 | GPIO76_GPIO, /* LED */ | |
189 | GPIO71_GPIO, /* WiFi reset */ | |
190 | GPIO70_GPIO, /* BT reset */ | |
191 | }; | |
192 | ||
def8252d IG |
193 | static mfp_cfg_t cm_x310_mfp_cfg[] __initdata = { |
194 | /* USB PORT 2 */ | |
195 | ULPI_STP, | |
196 | ULPI_NXT, | |
197 | ULPI_DIR, | |
198 | GPIO30_ULPI_DATA_OUT_0, | |
199 | GPIO31_ULPI_DATA_OUT_1, | |
200 | GPIO32_ULPI_DATA_OUT_2, | |
201 | GPIO33_ULPI_DATA_OUT_3, | |
202 | GPIO34_ULPI_DATA_OUT_4, | |
203 | GPIO35_ULPI_DATA_OUT_5, | |
204 | GPIO36_ULPI_DATA_OUT_6, | |
205 | GPIO37_ULPI_DATA_OUT_7, | |
206 | GPIO38_ULPI_CLK, | |
207 | /* external PHY reset pin */ | |
208 | GPIO127_GPIO, | |
209 | ||
210 | /* USB PORT 3 */ | |
211 | GPIO77_USB_P3_1, | |
212 | GPIO78_USB_P3_2, | |
213 | GPIO79_USB_P3_3, | |
214 | GPIO80_USB_P3_4, | |
215 | GPIO81_USB_P3_5, | |
216 | GPIO82_USB_P3_6, | |
217 | GPIO0_2_USBH_PEN, | |
218 | }; | |
219 | ||
cf75d8d2 MR |
220 | #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) |
221 | static struct resource dm9000_resources[] = { | |
222 | [0] = { | |
223 | .start = CM_X300_ETH_PHYS, | |
224 | .end = CM_X300_ETH_PHYS + 0x3, | |
225 | .flags = IORESOURCE_MEM, | |
226 | }, | |
227 | [1] = { | |
228 | .start = CM_X300_ETH_PHYS + 0x4, | |
229 | .end = CM_X300_ETH_PHYS + 0x4 + 500, | |
230 | .flags = IORESOURCE_MEM, | |
231 | }, | |
232 | [2] = { | |
6384fdad HZ |
233 | .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), |
234 | .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)), | |
cf75d8d2 MR |
235 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
236 | } | |
237 | }; | |
238 | ||
239 | static struct dm9000_plat_data cm_x300_dm9000_platdata = { | |
bff22c9b | 240 | .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM, |
cf75d8d2 MR |
241 | }; |
242 | ||
243 | static struct platform_device dm9000_device = { | |
244 | .name = "dm9000", | |
245 | .id = 0, | |
246 | .num_resources = ARRAY_SIZE(dm9000_resources), | |
247 | .resource = dm9000_resources, | |
248 | .dev = { | |
249 | .platform_data = &cm_x300_dm9000_platdata, | |
250 | } | |
251 | ||
252 | }; | |
253 | ||
254 | static void __init cm_x300_init_dm9000(void) | |
255 | { | |
256 | platform_device_register(&dm9000_device); | |
257 | } | |
258 | #else | |
259 | static inline void cm_x300_init_dm9000(void) {} | |
260 | #endif | |
261 | ||
83e560ee | 262 | /* LCD */ |
cf75d8d2 MR |
263 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) |
264 | static struct pxafb_mode_info cm_x300_lcd_modes[] = { | |
265 | [0] = { | |
83e560ee | 266 | .pixclock = 38250, |
cf75d8d2 MR |
267 | .bpp = 16, |
268 | .xres = 480, | |
269 | .yres = 640, | |
270 | .hsync_len = 8, | |
271 | .vsync_len = 2, | |
272 | .left_margin = 8, | |
83e560ee | 273 | .upper_margin = 2, |
cf75d8d2 MR |
274 | .right_margin = 24, |
275 | .lower_margin = 4, | |
276 | .cmap_greyscale = 0, | |
277 | }, | |
278 | [1] = { | |
279 | .pixclock = 153800, | |
280 | .bpp = 16, | |
281 | .xres = 240, | |
282 | .yres = 320, | |
283 | .hsync_len = 8, | |
284 | .vsync_len = 2, | |
285 | .left_margin = 8, | |
286 | .upper_margin = 2, | |
287 | .right_margin = 88, | |
288 | .lower_margin = 2, | |
289 | .cmap_greyscale = 0, | |
290 | }, | |
291 | }; | |
292 | ||
293 | static struct pxafb_mach_info cm_x300_lcd = { | |
294 | .modes = cm_x300_lcd_modes, | |
83e560ee | 295 | .num_modes = ARRAY_SIZE(cm_x300_lcd_modes), |
cf75d8d2 MR |
296 | .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, |
297 | }; | |
298 | ||
299 | static void __init cm_x300_init_lcd(void) | |
300 | { | |
4321e1a1 | 301 | pxa_set_fb_info(NULL, &cm_x300_lcd); |
cf75d8d2 MR |
302 | } |
303 | #else | |
304 | static inline void cm_x300_init_lcd(void) {} | |
305 | #endif | |
306 | ||
db205463 IG |
307 | #if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE) |
308 | static struct platform_pwm_backlight_data cm_x300_backlight_data = { | |
309 | .pwm_id = 2, | |
310 | .max_brightness = 100, | |
311 | .dft_brightness = 100, | |
312 | .pwm_period_ns = 10000, | |
313 | }; | |
314 | ||
315 | static struct platform_device cm_x300_backlight_device = { | |
316 | .name = "pwm-backlight", | |
317 | .dev = { | |
318 | .parent = &pxa27x_device_pwm0.dev, | |
319 | .platform_data = &cm_x300_backlight_data, | |
320 | }, | |
321 | }; | |
322 | ||
323 | static void cm_x300_init_bl(void) | |
324 | { | |
325 | platform_device_register(&cm_x300_backlight_device); | |
326 | } | |
327 | #else | |
328 | static inline void cm_x300_init_bl(void) {} | |
329 | #endif | |
330 | ||
83e560ee IG |
331 | #if defined(CONFIG_SPI_GPIO) || defined(CONFIG_SPI_GPIO_MODULE) |
332 | #define GPIO_LCD_BASE (144) | |
333 | #define GPIO_LCD_DIN (GPIO_LCD_BASE + 8) /* aux_gpio3_0 */ | |
334 | #define GPIO_LCD_DOUT (GPIO_LCD_BASE + 9) /* aux_gpio3_1 */ | |
335 | #define GPIO_LCD_SCL (GPIO_LCD_BASE + 10) /* aux_gpio3_2 */ | |
336 | #define GPIO_LCD_CS (GPIO_LCD_BASE + 11) /* aux_gpio3_3 */ | |
337 | #define LCD_SPI_BUS_NUM (1) | |
338 | ||
339 | static struct spi_gpio_platform_data cm_x300_spi_gpio_pdata = { | |
340 | .sck = GPIO_LCD_SCL, | |
341 | .mosi = GPIO_LCD_DIN, | |
342 | .miso = GPIO_LCD_DOUT, | |
343 | .num_chipselect = 1, | |
344 | }; | |
345 | ||
346 | static struct platform_device cm_x300_spi_gpio = { | |
347 | .name = "spi_gpio", | |
348 | .id = LCD_SPI_BUS_NUM, | |
349 | .dev = { | |
350 | .platform_data = &cm_x300_spi_gpio_pdata, | |
351 | }, | |
352 | }; | |
353 | ||
354 | static struct tdo24m_platform_data cm_x300_tdo24m_pdata = { | |
355 | .model = TDO35S, | |
356 | }; | |
357 | ||
358 | static struct spi_board_info cm_x300_spi_devices[] __initdata = { | |
359 | { | |
360 | .modalias = "tdo24m", | |
361 | .max_speed_hz = 1000000, | |
362 | .bus_num = LCD_SPI_BUS_NUM, | |
363 | .chip_select = 0, | |
364 | .controller_data = (void *) GPIO_LCD_CS, | |
365 | .platform_data = &cm_x300_tdo24m_pdata, | |
366 | }, | |
367 | }; | |
368 | ||
369 | static void __init cm_x300_init_spi(void) | |
370 | { | |
371 | spi_register_board_info(cm_x300_spi_devices, | |
372 | ARRAY_SIZE(cm_x300_spi_devices)); | |
373 | platform_device_register(&cm_x300_spi_gpio); | |
374 | } | |
375 | #else | |
376 | static inline void cm_x300_init_spi(void) {} | |
377 | #endif | |
378 | ||
74e74def IG |
379 | #if defined(CONFIG_SND_PXA2XX_LIB_AC97) |
380 | static void __init cm_x300_init_ac97(void) | |
381 | { | |
382 | pxa_set_ac97_info(NULL); | |
383 | } | |
384 | #else | |
385 | static inline void cm_x300_init_ac97(void) {} | |
386 | #endif | |
387 | ||
cf75d8d2 MR |
388 | #if defined(CONFIG_MTD_NAND_PXA3xx) || defined(CONFIG_MTD_NAND_PXA3xx_MODULE) |
389 | static struct mtd_partition cm_x300_nand_partitions[] = { | |
390 | [0] = { | |
391 | .name = "OBM", | |
392 | .offset = 0, | |
393 | .size = SZ_256K, | |
394 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
395 | }, | |
396 | [1] = { | |
397 | .name = "U-Boot", | |
398 | .offset = MTDPART_OFS_APPEND, | |
399 | .size = SZ_256K, | |
400 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
401 | }, | |
402 | [2] = { | |
403 | .name = "Environment", | |
404 | .offset = MTDPART_OFS_APPEND, | |
405 | .size = SZ_256K, | |
406 | }, | |
407 | [3] = { | |
408 | .name = "reserved", | |
409 | .offset = MTDPART_OFS_APPEND, | |
410 | .size = SZ_256K + SZ_1M, | |
411 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | |
412 | }, | |
413 | [4] = { | |
414 | .name = "kernel", | |
415 | .offset = MTDPART_OFS_APPEND, | |
416 | .size = SZ_4M, | |
417 | }, | |
418 | [5] = { | |
419 | .name = "fs", | |
420 | .offset = MTDPART_OFS_APPEND, | |
421 | .size = MTDPART_SIZ_FULL, | |
422 | }, | |
423 | }; | |
424 | ||
425 | static struct pxa3xx_nand_platform_data cm_x300_nand_info = { | |
426 | .enable_arbiter = 1, | |
b3992b66 | 427 | .keep_config = 1, |
f3c8cfc2 LW |
428 | .num_cs = 1, |
429 | .parts[0] = cm_x300_nand_partitions, | |
430 | .nr_parts[0] = ARRAY_SIZE(cm_x300_nand_partitions), | |
cf75d8d2 MR |
431 | }; |
432 | ||
433 | static void __init cm_x300_init_nand(void) | |
434 | { | |
435 | pxa3xx_set_nand_info(&cm_x300_nand_info); | |
436 | } | |
437 | #else | |
438 | static inline void cm_x300_init_nand(void) {} | |
439 | #endif | |
440 | ||
441 | #if defined(CONFIG_MMC) || defined(CONFIG_MMC_MODULE) | |
0bff2fc3 | 442 | static struct pxamci_platform_data cm_x300_mci_platform_data = { |
f97cab28 | 443 | .detect_delay_ms = 200, |
0bff2fc3 MR |
444 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
445 | .gpio_card_detect = GPIO82_MMC_IRQ, | |
446 | .gpio_card_ro = GPIO85_MMC_WP, | |
447 | .gpio_power = -1, | |
448 | }; | |
449 | ||
450 | /* The second MMC slot of CM-X300 is hardwired to Libertas card and has | |
cf75d8d2 | 451 | no detection/ro pins */ |
0bff2fc3 MR |
452 | static int cm_x300_mci2_init(struct device *dev, |
453 | irq_handler_t cm_x300_detect_int, | |
454 | void *data) | |
cf75d8d2 MR |
455 | { |
456 | return 0; | |
457 | } | |
458 | ||
0bff2fc3 | 459 | static void cm_x300_mci2_exit(struct device *dev, void *data) |
cf75d8d2 MR |
460 | { |
461 | } | |
462 | ||
0bff2fc3 | 463 | static struct pxamci_platform_data cm_x300_mci2_platform_data = { |
f97cab28 | 464 | .detect_delay_ms = 200, |
7a648256 | 465 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, |
0bff2fc3 MR |
466 | .init = cm_x300_mci2_init, |
467 | .exit = cm_x300_mci2_exit, | |
7a648256 RJ |
468 | .gpio_card_detect = -1, |
469 | .gpio_card_ro = -1, | |
470 | .gpio_power = -1, | |
cf75d8d2 MR |
471 | }; |
472 | ||
cf75d8d2 MR |
473 | static void __init cm_x300_init_mmc(void) |
474 | { | |
475 | pxa_set_mci_info(&cm_x300_mci_platform_data); | |
476 | pxa3xx_set_mci2_info(&cm_x300_mci2_platform_data); | |
477 | } | |
478 | #else | |
479 | static inline void cm_x300_init_mmc(void) {} | |
480 | #endif | |
481 | ||
1b43d8ed IG |
482 | #if defined(CONFIG_PXA310_ULPI) |
483 | static struct clk *pout_clk; | |
484 | ||
485 | static int cm_x300_ulpi_phy_reset(void) | |
486 | { | |
487 | int err; | |
488 | ||
489 | /* reset the PHY */ | |
5a009df1 IG |
490 | err = gpio_request_one(GPIO_ULPI_PHY_RST, GPIOF_OUT_INIT_LOW, |
491 | "ulpi reset"); | |
1b43d8ed | 492 | if (err) { |
32de50e2 | 493 | pr_err("failed to request ULPI reset GPIO: %d\n", err); |
1b43d8ed IG |
494 | return err; |
495 | } | |
496 | ||
1b43d8ed IG |
497 | msleep(10); |
498 | gpio_set_value(GPIO_ULPI_PHY_RST, 1); | |
499 | msleep(10); | |
500 | ||
501 | gpio_free(GPIO_ULPI_PHY_RST); | |
502 | ||
503 | return 0; | |
504 | } | |
505 | ||
506 | static inline int cm_x300_u2d_init(struct device *dev) | |
507 | { | |
508 | int err = 0; | |
509 | ||
510 | if (cpu_is_pxa310()) { | |
511 | /* CLK_POUT is connected to the ULPI PHY */ | |
512 | pout_clk = clk_get(NULL, "CLK_POUT"); | |
513 | if (IS_ERR(pout_clk)) { | |
514 | err = PTR_ERR(pout_clk); | |
32de50e2 | 515 | pr_err("failed to get CLK_POUT: %d\n", err); |
1b43d8ed IG |
516 | return err; |
517 | } | |
518 | clk_enable(pout_clk); | |
519 | ||
520 | err = cm_x300_ulpi_phy_reset(); | |
521 | if (err) { | |
522 | clk_disable(pout_clk); | |
523 | clk_put(pout_clk); | |
524 | } | |
525 | } | |
526 | ||
527 | return err; | |
528 | } | |
529 | ||
530 | static void cm_x300_u2d_exit(struct device *dev) | |
531 | { | |
532 | if (cpu_is_pxa310()) { | |
533 | clk_disable(pout_clk); | |
534 | clk_put(pout_clk); | |
535 | } | |
536 | } | |
537 | ||
538 | static struct pxa3xx_u2d_platform_data cm_x300_u2d_platform_data = { | |
539 | .ulpi_mode = ULPI_SER_6PIN, | |
540 | .init = cm_x300_u2d_init, | |
541 | .exit = cm_x300_u2d_exit, | |
542 | }; | |
543 | ||
544 | static void cm_x300_init_u2d(void) | |
545 | { | |
546 | pxa3xx_set_u2d_info(&cm_x300_u2d_platform_data); | |
547 | } | |
548 | #else | |
549 | static inline void cm_x300_init_u2d(void) {} | |
550 | #endif | |
551 | ||
cf75d8d2 | 552 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
edaa64c9 IG |
553 | static int cm_x300_ohci_init(struct device *dev) |
554 | { | |
555 | if (cpu_is_pxa300()) | |
556 | UP2OCR = UP2OCR_HXS | |
557 | | UP2OCR_HXOE | UP2OCR_DMPDE | UP2OCR_DPPDE; | |
558 | ||
559 | return 0; | |
560 | } | |
561 | ||
cf75d8d2 MR |
562 | static struct pxaohci_platform_data cm_x300_ohci_platform_data = { |
563 | .port_mode = PMM_PERPORT_MODE, | |
edaa64c9 IG |
564 | .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW, |
565 | .init = cm_x300_ohci_init, | |
cf75d8d2 | 566 | }; |
097b5334 | 567 | |
cf75d8d2 MR |
568 | static void __init cm_x300_init_ohci(void) |
569 | { | |
570 | pxa_set_ohci_info(&cm_x300_ohci_platform_data); | |
571 | } | |
572 | #else | |
573 | static inline void cm_x300_init_ohci(void) {} | |
574 | #endif | |
575 | ||
576 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | |
577 | static struct gpio_led cm_x300_leds[] = { | |
578 | [0] = { | |
579 | .name = "cm-x300:green", | |
580 | .default_trigger = "heartbeat", | |
cf75d8d2 MR |
581 | .active_low = 1, |
582 | }, | |
583 | }; | |
584 | ||
585 | static struct gpio_led_platform_data cm_x300_gpio_led_pdata = { | |
586 | .num_leds = ARRAY_SIZE(cm_x300_leds), | |
587 | .leds = cm_x300_leds, | |
588 | }; | |
589 | ||
590 | static struct platform_device cm_x300_led_device = { | |
591 | .name = "leds-gpio", | |
592 | .id = -1, | |
593 | .dev = { | |
594 | .platform_data = &cm_x300_gpio_led_pdata, | |
595 | }, | |
596 | }; | |
597 | ||
598 | static void __init cm_x300_init_leds(void) | |
599 | { | |
55052ea2 IG |
600 | if (system_rev < 130) |
601 | cm_x300_leds[0].gpio = 79; | |
602 | else | |
603 | cm_x300_leds[0].gpio = 76; | |
604 | ||
cf75d8d2 MR |
605 | platform_device_register(&cm_x300_led_device); |
606 | } | |
607 | #else | |
608 | static inline void cm_x300_init_leds(void) {} | |
609 | #endif | |
610 | ||
611 | #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) | |
612 | /* PCA9555 */ | |
613 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_0 = { | |
614 | .gpio_base = 128, | |
615 | }; | |
616 | ||
617 | static struct pca953x_platform_data cm_x300_gpio_ext_pdata_1 = { | |
618 | .gpio_base = 144, | |
619 | }; | |
620 | ||
621 | static struct i2c_board_info cm_x300_gpio_ext_info[] = { | |
622 | [0] = { | |
623 | I2C_BOARD_INFO("pca9555", 0x24), | |
624 | .platform_data = &cm_x300_gpio_ext_pdata_0, | |
625 | }, | |
626 | [1] = { | |
627 | I2C_BOARD_INFO("pca9555", 0x25), | |
628 | .platform_data = &cm_x300_gpio_ext_pdata_1, | |
629 | }, | |
630 | }; | |
631 | ||
632 | static void __init cm_x300_init_i2c(void) | |
633 | { | |
634 | pxa_set_i2c_info(NULL); | |
635 | i2c_register_board_info(0, cm_x300_gpio_ext_info, | |
636 | ARRAY_SIZE(cm_x300_gpio_ext_info)); | |
637 | } | |
638 | #else | |
639 | static inline void cm_x300_init_i2c(void) {} | |
640 | #endif | |
641 | ||
1858ced3 MR |
642 | #if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) |
643 | struct v3020_platform_data cm_x300_v3020_pdata = { | |
644 | .use_gpio = 1, | |
645 | .gpio_cs = GPIO95_RTC_CS, | |
646 | .gpio_wr = GPIO96_RTC_WR, | |
647 | .gpio_rd = GPIO97_RTC_RD, | |
648 | .gpio_io = GPIO98_RTC_IO, | |
649 | }; | |
650 | ||
651 | static struct platform_device cm_x300_rtc_device = { | |
652 | .name = "v3020", | |
653 | .id = -1, | |
654 | .dev = { | |
655 | .platform_data = &cm_x300_v3020_pdata, | |
656 | } | |
657 | }; | |
658 | ||
659 | static void __init cm_x300_init_rtc(void) | |
660 | { | |
661 | platform_device_register(&cm_x300_rtc_device); | |
662 | } | |
663 | #else | |
664 | static inline void cm_x300_init_rtc(void) {} | |
665 | #endif | |
666 | ||
03ba7e07 IG |
667 | /* Battery */ |
668 | struct power_supply_info cm_x300_psy_info = { | |
669 | .name = "battery", | |
670 | .technology = POWER_SUPPLY_TECHNOLOGY_LIPO, | |
671 | .voltage_max_design = 4200000, | |
672 | .voltage_min_design = 3000000, | |
673 | .use_for_apm = 1, | |
674 | }; | |
675 | ||
676 | static void cm_x300_battery_low(void) | |
677 | { | |
678 | #if defined(CONFIG_APM_EMULATION) | |
679 | apm_queue_event(APM_LOW_BATTERY); | |
680 | #endif | |
681 | } | |
682 | ||
683 | static void cm_x300_battery_critical(void) | |
684 | { | |
685 | #if defined(CONFIG_APM_EMULATION) | |
686 | apm_queue_event(APM_CRITICAL_SUSPEND); | |
687 | #endif | |
688 | } | |
689 | ||
690 | struct da9030_battery_info cm_x300_battery_info = { | |
691 | .battery_info = &cm_x300_psy_info, | |
692 | ||
693 | .charge_milliamp = 1000, | |
694 | .charge_millivolt = 4200, | |
695 | ||
696 | .vbat_low = 3600, | |
697 | .vbat_crit = 3400, | |
698 | .vbat_charge_start = 4100, | |
699 | .vbat_charge_stop = 4200, | |
700 | .vbat_charge_restart = 4000, | |
701 | ||
702 | .vcharge_min = 3200, | |
703 | .vcharge_max = 5500, | |
704 | ||
705 | .tbat_low = 197, | |
706 | .tbat_high = 78, | |
707 | .tbat_restart = 100, | |
708 | ||
709 | .batmon_interval = 0, | |
710 | ||
711 | .battery_low = cm_x300_battery_low, | |
712 | .battery_critical = cm_x300_battery_critical, | |
713 | }; | |
714 | ||
d176d64b | 715 | static struct regulator_consumer_supply buck2_consumers[] = { |
0bf189ab | 716 | REGULATOR_SUPPLY("vcc_core", NULL), |
d176d64b IG |
717 | }; |
718 | ||
719 | static struct regulator_init_data buck2_data = { | |
720 | .constraints = { | |
721 | .min_uV = 1375000, | |
722 | .max_uV = 1375000, | |
723 | .state_mem = { | |
724 | .enabled = 0, | |
725 | }, | |
726 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, | |
727 | .apply_uV = 1, | |
728 | }, | |
729 | .num_consumer_supplies = ARRAY_SIZE(buck2_consumers), | |
730 | .consumer_supplies = buck2_consumers, | |
731 | }; | |
732 | ||
9c017ca1 IG |
733 | /* DA9030 */ |
734 | struct da903x_subdev_info cm_x300_da9030_subdevs[] = { | |
03ba7e07 IG |
735 | { |
736 | .name = "da903x-battery", | |
737 | .id = DA9030_ID_BAT, | |
738 | .platform_data = &cm_x300_battery_info, | |
739 | }, | |
d176d64b IG |
740 | { |
741 | .name = "da903x-regulator", | |
742 | .id = DA9030_ID_BUCK2, | |
743 | .platform_data = &buck2_data, | |
744 | }, | |
9c017ca1 IG |
745 | }; |
746 | ||
747 | static struct da903x_platform_data cm_x300_da9030_info = { | |
748 | .num_subdevs = ARRAY_SIZE(cm_x300_da9030_subdevs), | |
749 | .subdevs = cm_x300_da9030_subdevs, | |
750 | }; | |
751 | ||
752 | static struct i2c_board_info cm_x300_pmic_info = { | |
753 | I2C_BOARD_INFO("da9030", 0x49), | |
e4e30970 | 754 | .irq = IRQ_WAKEUP0, |
9c017ca1 IG |
755 | .platform_data = &cm_x300_da9030_info, |
756 | }; | |
757 | ||
758 | static struct i2c_pxa_platform_data cm_x300_pwr_i2c_info = { | |
759 | .use_pio = 1, | |
760 | }; | |
761 | ||
762 | static void __init cm_x300_init_da9030(void) | |
763 | { | |
764 | pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); | |
765 | i2c_register_board_info(1, &cm_x300_pmic_info, 1); | |
6845664a | 766 | irq_set_irq_wake(IRQ_WAKEUP0, 1); |
9c017ca1 IG |
767 | } |
768 | ||
5a009df1 IG |
769 | /* wi2wi gpio setting for system_rev >= 130 */ |
770 | static struct gpio cm_x300_wi2wi_gpios[] __initdata = { | |
771 | { 71, GPIOF_OUT_INIT_HIGH, "wlan en" }, | |
772 | { 70, GPIOF_OUT_INIT_HIGH, "bt reset" }, | |
773 | }; | |
774 | ||
b3d01da6 IG |
775 | static void __init cm_x300_init_wi2wi(void) |
776 | { | |
b3d01da6 IG |
777 | int err; |
778 | ||
779 | if (system_rev < 130) { | |
5a009df1 IG |
780 | cm_x300_wi2wi_gpios[0].gpio = 77; /* wlan en */ |
781 | cm_x300_wi2wi_gpios[1].gpio = 78; /* bt reset */ | |
b3d01da6 IG |
782 | } |
783 | ||
784 | /* Libertas and CSR reset */ | |
5a009df1 | 785 | err = gpio_request_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); |
b3d01da6 | 786 | if (err) { |
32de50e2 | 787 | pr_err("failed to request wifi/bt gpios: %d\n", err); |
5a009df1 | 788 | return; |
b3d01da6 IG |
789 | } |
790 | ||
5a009df1 | 791 | udelay(10); |
1a64200e | 792 | gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 0); |
5a009df1 | 793 | udelay(10); |
1a64200e | 794 | gpio_set_value(cm_x300_wi2wi_gpios[1].gpio, 1); |
5a009df1 | 795 | |
1a64200e | 796 | gpio_free_array(ARRAY_AND_SIZE(cm_x300_wi2wi_gpios)); |
b3d01da6 IG |
797 | } |
798 | ||
799 | /* MFP */ | |
55052ea2 | 800 | static void __init cm_x300_init_mfp(void) |
cf75d8d2 MR |
801 | { |
802 | /* board-processor specific GPIO initialization */ | |
def8252d | 803 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_mfp_cfg)); |
cf75d8d2 | 804 | |
55052ea2 | 805 | if (system_rev < 130) |
def8252d | 806 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_lt130_mfp_cfg)); |
55052ea2 | 807 | else |
def8252d IG |
808 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x3xx_rev_ge130_mfp_cfg)); |
809 | ||
810 | if (cpu_is_pxa310()) | |
811 | pxa3xx_mfp_config(ARRAY_AND_SIZE(cm_x310_mfp_cfg)); | |
55052ea2 IG |
812 | } |
813 | ||
814 | static void __init cm_x300_init(void) | |
815 | { | |
816 | cm_x300_init_mfp(); | |
817 | ||
cc155c6f RK |
818 | pxa_set_btuart_info(NULL); |
819 | pxa_set_stuart_info(NULL); | |
a6cd7eb3 IG |
820 | if (cpu_is_pxa300()) |
821 | pxa_set_ffuart_info(NULL); | |
cc155c6f | 822 | |
9c017ca1 | 823 | cm_x300_init_da9030(); |
cf75d8d2 MR |
824 | cm_x300_init_dm9000(); |
825 | cm_x300_init_lcd(); | |
1b43d8ed | 826 | cm_x300_init_u2d(); |
cf75d8d2 MR |
827 | cm_x300_init_ohci(); |
828 | cm_x300_init_mmc(); | |
829 | cm_x300_init_nand(); | |
830 | cm_x300_init_leds(); | |
831 | cm_x300_init_i2c(); | |
83e560ee | 832 | cm_x300_init_spi(); |
1858ced3 | 833 | cm_x300_init_rtc(); |
74e74def | 834 | cm_x300_init_ac97(); |
b3d01da6 | 835 | cm_x300_init_wi2wi(); |
db205463 | 836 | cm_x300_init_bl(); |
cf75d8d2 MR |
837 | } |
838 | ||
0744a3ee RK |
839 | static void __init cm_x300_fixup(struct tag *tags, char **cmdline, |
840 | struct meminfo *mi) | |
b5a5c474 | 841 | { |
81880975 IG |
842 | /* Make sure that mi->bank[0].start = PHYS_ADDR */ |
843 | for (; tags->hdr.size; tags = tag_next(tags)) | |
844 | if (tags->hdr.tag == ATAG_MEM && | |
845 | tags->u.mem.start == 0x80000000) { | |
846 | tags->u.mem.start = 0xa0000000; | |
847 | break; | |
848 | } | |
b5a5c474 MR |
849 | } |
850 | ||
cf75d8d2 | 851 | MACHINE_START(CM_X300, "CM-X300 module") |
7375aba6 | 852 | .atag_offset = 0x100, |
851982c1 | 853 | .map_io = pxa3xx_map_io, |
4e611091 | 854 | .nr_irqs = PXA_NR_IRQS, |
cf75d8d2 | 855 | .init_irq = pxa3xx_init_irq, |
8a97ae2f | 856 | .handle_irq = pxa3xx_handle_irq, |
cf75d8d2 MR |
857 | .timer = &pxa_timer, |
858 | .init_machine = cm_x300_init, | |
b5a5c474 | 859 | .fixup = cm_x300_fixup, |
271a74fc | 860 | .restart = pxa_restart, |
cf75d8d2 | 861 | MACHINE_END |